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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.3 by gbeauche, 2003-09-29T07:05:15Z vs.
Revision 1.6 by gbeauche, 2003-10-11T09:33:27Z

#	Line 71 | Line 71 | static void enter_mon(void)
71		// Interrupts in native mode?
72		#define INTERRUPTS_IN_NATIVE_MODE 1
73
74	–	// 68k Emulator Data
75	–	struct EmulatorData {
76	–	uint32  v[0x400];
77	–	};
78	–
79	–	// Kernel Data
80	–	struct KernelData {
81	–	uint32  v[0x400];
82	–	EmulatorData ed;
83	–	};
84	–
74		// Pointer to Kernel Data
75	<	static KernelData * const kernel_data = (KernelData *)0x68ffe000;
75	>	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
76
77
78		/**
#	Line 124 | Line 113 | public:
113		void get_resource(uint32 old_get_resource);
114
115		// Handle MacOS interrupt
116	<	void interrupt(uint32 entry, sheepshaver_cpu *cpu);
116	>	void interrupt(uint32 entry);
117
118		// spcflags for interrupts handling
119		static uint32 spcflags;
#	Line 232 | Line 221 | struct execute_nothing {
221		static inline void execute(powerpc_cpu *) { }
222		};
223
235	–	static void HandleInterrupt(void);
236	–
224		struct execute_spcflags_check {
225		static inline void execute(powerpc_cpu *cpu) {
226	+	#if !ASYNC_IRQ
227		if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) {
228		if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) {
229		SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON );
#	Line 250 | Line 238 | struct execute_spcflags_check {
238		SPCFLAGS_SET( SPCFLAG_DOINT );
239		}
240		}
241	+	#endif
242		}
243		};
244
#	Line 270 | Line 259 | void sheepshaver_cpu::execute(uint32 ent
259		}
260
261		// Handle MacOS interrupt
262	<	void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu)
262	>	void sheepshaver_cpu::interrupt(uint32 entry)
263		{
264	<	#if MULTICORE_CPU
276	<	// Initialize stack pointer from previous CPU running
277	<	gpr(1) = cpu->gpr(1);
278	<	#else
264	>	#if !MULTICORE_CPU
265		// Save program counters and branch registers
266		uint32 saved_pc = pc();
267		uint32 saved_lr = lr();
268		uint32 saved_ctr= ctr();
269	+	uint32 saved_sp = gpr(1);
270		#endif
271
272	<	// Create stack frame
273	<	gpr(1) -= 64;
272	>	// Initialize stack pointer to SheepShaver alternate stack base
273	>	gpr(1) = SheepStack1Base - 64;
274
275		// Build trampoline to return from interrupt
276	<	uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
276	>	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
277
278		// Prepare registers for nanokernel interrupt routine
279	<	kernel_data->v[0x004 >> 2] = gpr(1);
280	<	kernel_data->v[0x018 >> 2] = gpr(6);
279	>	kernel_data->v[0x004 >> 2] = htonl(gpr(1));
280	>	kernel_data->v[0x018 >> 2] = htonl(gpr(6));
281
282	<	gpr(6) = kernel_data->v[0x65c >> 2];
282	>	gpr(6) = ntohl(kernel_data->v[0x65c >> 2]);
283		assert(gpr(6) != 0);
284		WriteMacInt32(gpr(6) + 0x13c, gpr(7));
285		WriteMacInt32(gpr(6) + 0x144, gpr(8));
#	Line 303 | Line 290 | void sheepshaver_cpu::interrupt(uint32 e
290		WriteMacInt32(gpr(6) + 0x16c, gpr(13));
291
292		gpr(1)  = KernelDataAddr;
293	<	gpr(7)  = kernel_data->v[0x660 >> 2];
293	>	gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
294		gpr(8)  = 0;
295		gpr(10) = (uint32)trampoline;
296		gpr(12) = (uint32)trampoline;
#	Line 320 | Line 307 | void sheepshaver_cpu::interrupt(uint32 e
307		// Enter nanokernel
308		execute(entry);
309
323	–	// Cleanup stack
324	–	gpr(1) += 64;
325	–
310		#if !MULTICORE_CPU
311		// Restore program counters and branch registers
312		pc() = saved_pc;
313		lr() = saved_lr;
314		ctr()= saved_ctr;
315	+	gpr(1) = saved_sp;
316		#endif
317		}
318
#	Line 345 | Line 330 | void sheepshaver_cpu::execute_68k(uint32
330		uint32 saved_ctr= ctr();
331
332		// Create MacOS stack frame
333	+	// FIXME: make sure MacOS doesn't expect PPC registers to live on top
334		uint32 sp = gpr(1);
335	<	gpr(1) -= 56 + 19*4 + 18*8;
335	>	gpr(1) -= 56;
336		WriteMacInt32(gpr(1), sp);
337
338		// Save PowerPC registers
339	<	memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13));
339	>	uint32 saved_GPRs[19];
340	>	memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13));
341		#if SAVE_FP_EXEC_68K
342	<	memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14));
342	>	double saved_FPRs[18];
343	>	memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14));
344		#endif
345
346		// Setup registers for 68k emulator
#	Line 366 | Line 354 | void sheepshaver_cpu::execute_68k(uint32
354		gpr(25) = ReadMacInt32(XLM_68K_R25);            // MSB of SR
355		gpr(26) = 0;
356		gpr(28) = 0;                                                            // VBR
357	<	gpr(29) = kernel_data->ed.v[0x74 >> 2];         // Pointer to opcode table
358	<	gpr(30) = kernel_data->ed.v[0x78 >> 2];         // Address of emulator
357	>	gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]);          // Pointer to opcode table
358	>	gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]);          // Address of emulator
359		gpr(31) = KernelDataAddr + 0x1000;
360
361		// Push return address (points to EXEC_RETURN opcode) on stack
#	Line 399 | Line 387 | void sheepshaver_cpu::execute_68k(uint32
387		r->a[i] = gpr(16 + i);
388
389		// Restore PowerPC registers
390	<	memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13));
390	>	memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13));
391		#if SAVE_FP_EXEC_68K
392	<	memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14));
392	>	memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14));
393		#endif
394
395		// Cleanup stack
396	<	gpr(1) += 56 + 19*4 + 18*8;
396	>	gpr(1) += 56;
397
398		// Restore program counters and branch registers
399		pc() = saved_pc;
#	Line 422 | Line 410 | uint32 sheepshaver_cpu::execute_macos_co
410		uint32 saved_ctr= ctr();
411
412		// Build trampoline with EXEC_RETURN
413	<	uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
413	>	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
414		lr() = (uint32)trampoline;
415
416		gpr(1) -= 64;                                                           // Create stack frame
#	Line 462 | Line 450 | inline void sheepshaver_cpu::execute_ppc
450		{
451		// Save branch registers
452		uint32 saved_lr = lr();
465	–	uint32 saved_ctr= ctr();
466	–
467	–	const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
453
454	+	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
455		lr() = (uint32)trampoline;
456	<	ctr()= entry;
456	>
457		execute(entry);
458
459		// Restore branch registers
460		lr() = saved_lr;
475	–	ctr()= saved_ctr;
461		}
462
463		// Resource Manager thunk
464	<	extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h);
464	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
465
466		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
467		{
#	Line 488 | Line 473 | inline void sheepshaver_cpu::get_resourc
473
474		// Call old routine
475		execute_ppc(old_get_resource);
491	–	uint16 **handle = (uint16 **)gpr(3);
476
477		// Call CheckLoad()
478	+	uint32 handle = gpr(3);
479		check_load_invoc(type, id, handle);
480	<	gpr(3) = (uint32)handle;
480	>	gpr(3) = handle;
481
482		// Cleanup stack
483		gpr(1) += 56;
#	Line 585 | Line 570 | void init_emul_ppc(void)
570
571		// Install the handler for SIGSEGV
572		sigsegv_install_handler(sigsegv_handler);
573	<
573	>
574		#if ENABLE_MON
575		// Install "regs" command in cxmon
576		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 613 | Line 598 | extern int atomic_add(int *var, int v);
598		extern int atomic_and(int *var, int v);
599		extern int atomic_or(int *var, int v);
600
601	+	#if !ASYNC_IRQ
602		void TriggerInterrupt(void)
603		{
604		#if 0
#	Line 621 | Line 607 | void TriggerInterrupt(void)
607		SPCFLAGS_SET( SPCFLAG_INT );
608		#endif
609		}
610	+	#endif
611
612	<	static void HandleInterrupt(void)
612	>	void HandleInterrupt(void)
613		{
614		// Do nothing if interrupts are disabled
615		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
#	Line 659 | Line 646 | static void HandleInterrupt(void)
646		DisableInterrupt();
647		cpu_push(interrupt_cpu);
648		if (ROMType == ROMTYPE_NEWWORLD)
649	<	current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu);
649	>	current_cpu->interrupt(ROM_BASE + 0x312b1c);
650		else
651	<	current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu);
651	>	current_cpu->interrupt(ROM_BASE + 0x312a3c);
652		cpu_pop();
653		}
654		break;
#	Line 842 | Line 829 | void Execute68k(uint32 pc, M68kRegisters
829
830		void Execute68kTrap(uint16 trap, M68kRegisters *r)
831		{
832	<	uint16 proc[2] = {trap, M68K_RTS};
832	>	uint16 proc[2];
833	>	proc[0] = htons(trap);
834	>	proc[1] = htons(M68K_RTS);
835		Execute68k((uint32)proc, r);
836		}
837

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