28 |
|
#include "macos_util.h" |
29 |
|
#include "block-alloc.hpp" |
30 |
|
#include "sigsegv.h" |
31 |
– |
#include "spcflags.h" |
31 |
|
#include "cpu/ppc/ppc-cpu.hpp" |
32 |
|
#include "cpu/ppc/ppc-operations.hpp" |
33 |
+ |
#include "cpu/ppc/ppc-instructions.hpp" |
34 |
|
|
35 |
|
// Used for NativeOp trampolines |
36 |
|
#include "video.h" |
37 |
|
#include "name_registry.h" |
38 |
|
#include "serial.h" |
39 |
+ |
#include "ether.h" |
40 |
|
|
41 |
|
#include <stdio.h> |
42 |
|
|
45 |
|
#include "mon_disass.h" |
46 |
|
#endif |
47 |
|
|
48 |
< |
#define DEBUG 1 |
48 |
> |
#define DEBUG 0 |
49 |
|
#include "debug.h" |
50 |
|
|
51 |
+ |
// Emulation time statistics |
52 |
+ |
#define EMUL_TIME_STATS 1 |
53 |
+ |
|
54 |
+ |
#if EMUL_TIME_STATS |
55 |
+ |
static clock_t emul_start_time; |
56 |
+ |
static uint32 interrupt_count = 0; |
57 |
+ |
static clock_t interrupt_time = 0; |
58 |
+ |
static uint32 exec68k_count = 0; |
59 |
+ |
static clock_t exec68k_time = 0; |
60 |
+ |
static uint32 native_exec_count = 0; |
61 |
+ |
static clock_t native_exec_time = 0; |
62 |
+ |
static uint32 macos_exec_count = 0; |
63 |
+ |
static clock_t macos_exec_time = 0; |
64 |
+ |
#endif |
65 |
+ |
|
66 |
|
static void enter_mon(void) |
67 |
|
{ |
68 |
|
// Start up mon in real-mode |
73 |
|
} |
74 |
|
|
75 |
|
// Enable multicore (main/interrupts) cpu emulation? |
76 |
< |
#define MULTICORE_CPU 0 |
76 |
> |
#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
77 |
|
|
78 |
|
// Enable Execute68k() safety checks? |
79 |
|
#define SAFE_EXEC_68K 1 |
87 |
|
// Interrupts in native mode? |
88 |
|
#define INTERRUPTS_IN_NATIVE_MODE 1 |
89 |
|
|
90 |
< |
// 68k Emulator Data |
91 |
< |
struct EmulatorData { |
76 |
< |
uint32 v[0x400]; |
77 |
< |
}; |
90 |
> |
// Pointer to Kernel Data |
91 |
> |
static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
92 |
|
|
93 |
< |
// Kernel Data |
94 |
< |
struct KernelData { |
81 |
< |
uint32 v[0x400]; |
82 |
< |
EmulatorData ed; |
83 |
< |
}; |
93 |
> |
// SIGSEGV handler |
94 |
> |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
95 |
|
|
96 |
< |
// Pointer to Kernel Data |
97 |
< |
static KernelData * const kernel_data = (KernelData *)0x68ffe000; |
96 |
> |
// JIT Compiler enabled? |
97 |
> |
static inline bool enable_jit_p() |
98 |
> |
{ |
99 |
> |
return PrefsFindBool("jit"); |
100 |
> |
} |
101 |
|
|
102 |
|
|
103 |
|
/** |
104 |
|
* PowerPC emulator glue with special 'sheep' opcodes |
105 |
|
**/ |
106 |
|
|
107 |
< |
struct sheepshaver_exec_return { }; |
107 |
> |
enum { |
108 |
> |
PPC_I(SHEEP) = PPC_I(MAX), |
109 |
> |
PPC_I(SHEEP_MAX) |
110 |
> |
}; |
111 |
|
|
112 |
|
class sheepshaver_cpu |
113 |
|
: public powerpc_cpu |
117 |
|
|
118 |
|
public: |
119 |
|
|
120 |
< |
sheepshaver_cpu() |
121 |
< |
: powerpc_cpu() |
105 |
< |
{ init_decoder(); } |
120 |
> |
// Constructor |
121 |
> |
sheepshaver_cpu(); |
122 |
|
|
123 |
|
// Condition Register accessors |
124 |
|
uint32 get_cr() const { return cr().get(); } |
125 |
|
void set_cr(uint32 v) { cr().set(v); } |
126 |
|
|
111 |
– |
// Execution loop |
112 |
– |
void execute(uint32 pc); |
113 |
– |
|
127 |
|
// Execute 68k routine |
128 |
|
void execute_68k(uint32 entry, M68kRegisters *r); |
129 |
|
|
137 |
|
void get_resource(uint32 old_get_resource); |
138 |
|
|
139 |
|
// Handle MacOS interrupt |
140 |
< |
void interrupt(uint32 entry, sheepshaver_cpu *cpu); |
141 |
< |
|
129 |
< |
// spcflags for interrupts handling |
130 |
< |
static uint32 spcflags; |
140 |
> |
void interrupt(uint32 entry); |
141 |
> |
void handle_interrupt(); |
142 |
|
|
143 |
|
// Lazy memory allocator (one item at a time) |
144 |
|
void *operator new(size_t size) |
148 |
|
// FIXME: really make surre array allocation fail at link time? |
149 |
|
void *operator new[](size_t); |
150 |
|
void operator delete[](void *p); |
151 |
+ |
|
152 |
+ |
// Make sure the SIGSEGV handler can access CPU registers |
153 |
+ |
friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
154 |
|
}; |
155 |
|
|
142 |
– |
uint32 sheepshaver_cpu::spcflags = 0; |
156 |
|
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
157 |
|
|
158 |
+ |
sheepshaver_cpu::sheepshaver_cpu() |
159 |
+ |
: powerpc_cpu(enable_jit_p()) |
160 |
+ |
{ |
161 |
+ |
init_decoder(); |
162 |
+ |
} |
163 |
+ |
|
164 |
|
void sheepshaver_cpu::init_decoder() |
165 |
|
{ |
166 |
|
#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
172 |
|
|
173 |
|
static const instr_info_t sheep_ii_table[] = { |
174 |
|
{ "sheep", |
175 |
< |
(execute_fn)&sheepshaver_cpu::execute_sheep, |
175 |
> |
(execute_pmf)&sheepshaver_cpu::execute_sheep, |
176 |
|
NULL, |
177 |
< |
D_form, 6, 0, CFLOW_TRAP |
177 |
> |
PPC_I(SHEEP), |
178 |
> |
D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
179 |
|
} |
180 |
|
}; |
181 |
|
|
212 |
|
case 0: // EMUL_RETURN |
213 |
|
QuitEmulator(); |
214 |
|
break; |
215 |
< |
|
215 |
> |
|
216 |
|
case 1: // EXEC_RETURN |
217 |
< |
throw sheepshaver_exec_return(); |
217 |
> |
spcflags().set(SPCFLAG_CPU_EXEC_RETURN); |
218 |
|
break; |
219 |
|
|
220 |
|
case 2: // EXEC_NATIVE |
247 |
|
} |
248 |
|
} |
249 |
|
|
230 |
– |
// Checks for pending interrupts |
231 |
– |
struct execute_nothing { |
232 |
– |
static inline void execute(powerpc_cpu *) { } |
233 |
– |
}; |
234 |
– |
|
235 |
– |
static void HandleInterrupt(void); |
236 |
– |
|
237 |
– |
struct execute_spcflags_check { |
238 |
– |
static inline void execute(powerpc_cpu *cpu) { |
239 |
– |
if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) { |
240 |
– |
if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) { |
241 |
– |
SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON ); |
242 |
– |
enter_mon(); |
243 |
– |
} |
244 |
– |
if (SPCFLAGS_TEST( SPCFLAG_DOINT )) { |
245 |
– |
SPCFLAGS_CLEAR( SPCFLAG_DOINT ); |
246 |
– |
HandleInterrupt(); |
247 |
– |
} |
248 |
– |
if (SPCFLAGS_TEST( SPCFLAG_INT )) { |
249 |
– |
SPCFLAGS_CLEAR( SPCFLAG_INT ); |
250 |
– |
SPCFLAGS_SET( SPCFLAG_DOINT ); |
251 |
– |
} |
252 |
– |
} |
253 |
– |
} |
254 |
– |
}; |
255 |
– |
|
256 |
– |
// Execution loop |
257 |
– |
void sheepshaver_cpu::execute(uint32 entry) |
258 |
– |
{ |
259 |
– |
try { |
260 |
– |
pc() = entry; |
261 |
– |
powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>(); |
262 |
– |
} |
263 |
– |
catch (sheepshaver_exec_return const &) { |
264 |
– |
// Nothing, simply return |
265 |
– |
} |
266 |
– |
catch (...) { |
267 |
– |
printf("ERROR: execute() received an unknown exception!\n"); |
268 |
– |
QuitEmulator(); |
269 |
– |
} |
270 |
– |
} |
271 |
– |
|
250 |
|
// Handle MacOS interrupt |
251 |
< |
void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu) |
251 |
> |
void sheepshaver_cpu::interrupt(uint32 entry) |
252 |
|
{ |
253 |
< |
#if MULTICORE_CPU |
254 |
< |
// Initialize stack pointer from previous CPU running |
255 |
< |
gpr(1) = cpu->gpr(1); |
256 |
< |
#else |
253 |
> |
#if EMUL_TIME_STATS |
254 |
> |
interrupt_count++; |
255 |
> |
const clock_t interrupt_start = clock(); |
256 |
> |
#endif |
257 |
> |
|
258 |
> |
#if !MULTICORE_CPU |
259 |
|
// Save program counters and branch registers |
260 |
|
uint32 saved_pc = pc(); |
261 |
|
uint32 saved_lr = lr(); |
262 |
|
uint32 saved_ctr= ctr(); |
263 |
+ |
uint32 saved_sp = gpr(1); |
264 |
|
#endif |
265 |
|
|
266 |
< |
// Create stack frame |
267 |
< |
gpr(1) -= 64; |
266 |
> |
// Initialize stack pointer to SheepShaver alternate stack base |
267 |
> |
gpr(1) = SheepStack1Base - 64; |
268 |
|
|
269 |
|
// Build trampoline to return from interrupt |
270 |
< |
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
270 |
> |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
271 |
|
|
272 |
|
// Prepare registers for nanokernel interrupt routine |
273 |
< |
kernel_data->v[0x004 >> 2] = gpr(1); |
274 |
< |
kernel_data->v[0x018 >> 2] = gpr(6); |
273 |
> |
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
274 |
> |
kernel_data->v[0x018 >> 2] = htonl(gpr(6)); |
275 |
|
|
276 |
< |
gpr(6) = kernel_data->v[0x65c >> 2]; |
276 |
> |
gpr(6) = ntohl(kernel_data->v[0x65c >> 2]); |
277 |
|
assert(gpr(6) != 0); |
278 |
|
WriteMacInt32(gpr(6) + 0x13c, gpr(7)); |
279 |
|
WriteMacInt32(gpr(6) + 0x144, gpr(8)); |
284 |
|
WriteMacInt32(gpr(6) + 0x16c, gpr(13)); |
285 |
|
|
286 |
|
gpr(1) = KernelDataAddr; |
287 |
< |
gpr(7) = kernel_data->v[0x660 >> 2]; |
287 |
> |
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
288 |
|
gpr(8) = 0; |
289 |
|
gpr(10) = (uint32)trampoline; |
290 |
|
gpr(12) = (uint32)trampoline; |
291 |
< |
gpr(13) = cr().get(); |
291 |
> |
gpr(13) = get_cr(); |
292 |
|
|
293 |
|
// rlwimi. r7,r7,8,0,0 |
294 |
|
uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7)); |
296 |
|
gpr(7) = result; |
297 |
|
|
298 |
|
gpr(11) = 0xf072; // MSR (SRR1) |
299 |
< |
cr().set((gpr(11) & 0x0fff0000) | (cr().get() & ~0x0fff0000)); |
299 |
> |
cr().set((gpr(11) & 0x0fff0000) | (get_cr() & ~0x0fff0000)); |
300 |
|
|
301 |
|
// Enter nanokernel |
302 |
|
execute(entry); |
303 |
|
|
323 |
– |
// Cleanup stack |
324 |
– |
gpr(1) += 64; |
325 |
– |
|
304 |
|
#if !MULTICORE_CPU |
305 |
|
// Restore program counters and branch registers |
306 |
|
pc() = saved_pc; |
307 |
|
lr() = saved_lr; |
308 |
|
ctr()= saved_ctr; |
309 |
+ |
gpr(1) = saved_sp; |
310 |
+ |
#endif |
311 |
+ |
|
312 |
+ |
#if EMUL_TIME_STATS |
313 |
+ |
interrupt_time += (clock() - interrupt_start); |
314 |
|
#endif |
315 |
|
} |
316 |
|
|
317 |
|
// Execute 68k routine |
318 |
|
void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r) |
319 |
|
{ |
320 |
+ |
#if EMUL_TIME_STATS |
321 |
+ |
exec68k_count++; |
322 |
+ |
const clock_t exec68k_start = clock(); |
323 |
+ |
#endif |
324 |
+ |
|
325 |
|
#if SAFE_EXEC_68K |
326 |
|
if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP) |
327 |
|
printf("FATAL: Execute68k() not called from EMUL_OP mode\n"); |
331 |
|
uint32 saved_pc = pc(); |
332 |
|
uint32 saved_lr = lr(); |
333 |
|
uint32 saved_ctr= ctr(); |
334 |
+ |
uint32 saved_cr = get_cr(); |
335 |
|
|
336 |
|
// Create MacOS stack frame |
337 |
+ |
// FIXME: make sure MacOS doesn't expect PPC registers to live on top |
338 |
|
uint32 sp = gpr(1); |
339 |
< |
gpr(1) -= 56 + 19*4 + 18*8; |
339 |
> |
gpr(1) -= 56; |
340 |
|
WriteMacInt32(gpr(1), sp); |
341 |
|
|
342 |
|
// Save PowerPC registers |
343 |
< |
memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13)); |
343 |
> |
uint32 saved_GPRs[19]; |
344 |
> |
memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13)); |
345 |
|
#if SAVE_FP_EXEC_68K |
346 |
< |
memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14)); |
346 |
> |
double saved_FPRs[18]; |
347 |
> |
memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14)); |
348 |
|
#endif |
349 |
|
|
350 |
|
// Setup registers for 68k emulator |
358 |
|
gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR |
359 |
|
gpr(26) = 0; |
360 |
|
gpr(28) = 0; // VBR |
361 |
< |
gpr(29) = kernel_data->ed.v[0x74 >> 2]; // Pointer to opcode table |
362 |
< |
gpr(30) = kernel_data->ed.v[0x78 >> 2]; // Address of emulator |
361 |
> |
gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]); // Pointer to opcode table |
362 |
> |
gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]); // Address of emulator |
363 |
|
gpr(31) = KernelDataAddr + 0x1000; |
364 |
|
|
365 |
|
// Push return address (points to EXEC_RETURN opcode) on stack |
391 |
|
r->a[i] = gpr(16 + i); |
392 |
|
|
393 |
|
// Restore PowerPC registers |
394 |
< |
memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13)); |
394 |
> |
memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13)); |
395 |
|
#if SAVE_FP_EXEC_68K |
396 |
< |
memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14)); |
396 |
> |
memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14)); |
397 |
|
#endif |
398 |
|
|
399 |
|
// Cleanup stack |
400 |
< |
gpr(1) += 56 + 19*4 + 18*8; |
400 |
> |
gpr(1) += 56; |
401 |
|
|
402 |
|
// Restore program counters and branch registers |
403 |
|
pc() = saved_pc; |
404 |
|
lr() = saved_lr; |
405 |
|
ctr()= saved_ctr; |
406 |
+ |
set_cr(saved_cr); |
407 |
+ |
|
408 |
+ |
#if EMUL_TIME_STATS |
409 |
+ |
exec68k_time += (clock() - exec68k_start); |
410 |
+ |
#endif |
411 |
|
} |
412 |
|
|
413 |
|
// Call MacOS PPC code |
414 |
|
uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args) |
415 |
|
{ |
416 |
+ |
#if EMUL_TIME_STATS |
417 |
+ |
macos_exec_count++; |
418 |
+ |
const clock_t macos_exec_start = clock(); |
419 |
+ |
#endif |
420 |
+ |
|
421 |
|
// Save program counters and branch registers |
422 |
|
uint32 saved_pc = pc(); |
423 |
|
uint32 saved_lr = lr(); |
424 |
|
uint32 saved_ctr= ctr(); |
425 |
|
|
426 |
|
// Build trampoline with EXEC_RETURN |
427 |
< |
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
427 |
> |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
428 |
|
lr() = (uint32)trampoline; |
429 |
|
|
430 |
|
gpr(1) -= 64; // Create stack frame |
456 |
|
lr() = saved_lr; |
457 |
|
ctr()= saved_ctr; |
458 |
|
|
459 |
+ |
#if EMUL_TIME_STATS |
460 |
+ |
macos_exec_time += (clock() - macos_exec_start); |
461 |
+ |
#endif |
462 |
+ |
|
463 |
|
return retval; |
464 |
|
} |
465 |
|
|
468 |
|
{ |
469 |
|
// Save branch registers |
470 |
|
uint32 saved_lr = lr(); |
465 |
– |
uint32 saved_ctr= ctr(); |
466 |
– |
|
467 |
– |
const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
471 |
|
|
472 |
+ |
const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
473 |
|
lr() = (uint32)trampoline; |
474 |
< |
ctr()= entry; |
474 |
> |
|
475 |
|
execute(entry); |
476 |
|
|
477 |
|
// Restore branch registers |
478 |
|
lr() = saved_lr; |
475 |
– |
ctr()= saved_ctr; |
479 |
|
} |
480 |
|
|
481 |
|
// Resource Manager thunk |
482 |
< |
extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h); |
482 |
> |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
483 |
|
|
484 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
485 |
|
{ |
491 |
|
|
492 |
|
// Call old routine |
493 |
|
execute_ppc(old_get_resource); |
491 |
– |
uint16 **handle = (uint16 **)gpr(3); |
494 |
|
|
495 |
|
// Call CheckLoad() |
496 |
+ |
uint32 handle = gpr(3); |
497 |
|
check_load_invoc(type, id, handle); |
498 |
< |
gpr(3) = (uint32)handle; |
498 |
> |
gpr(3) = handle; |
499 |
|
|
500 |
|
// Cleanup stack |
501 |
|
gpr(1) += 56; |
510 |
|
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
511 |
|
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
512 |
|
|
513 |
+ |
void FlushCodeCache(uintptr start, uintptr end) |
514 |
+ |
{ |
515 |
+ |
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
516 |
+ |
main_cpu->invalidate_cache_range(start, end); |
517 |
+ |
#if MULTICORE_CPU |
518 |
+ |
interrupt_cpu->invalidate_cache_range(start, end); |
519 |
+ |
#endif |
520 |
+ |
} |
521 |
+ |
|
522 |
|
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
523 |
|
{ |
524 |
|
#if MULTICORE_CPU |
564 |
|
if ((addr - ROM_BASE) < ROM_SIZE) |
565 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
566 |
|
|
567 |
< |
// Ignore all other faults, if requested |
568 |
< |
if (PrefsFindBool("ignoresegv")) |
569 |
< |
return SIGSEGV_RETURN_FAILURE; |
567 |
> |
// Get program counter of target CPU |
568 |
> |
sheepshaver_cpu * const cpu = current_cpu; |
569 |
> |
const uint32 pc = cpu->pc(); |
570 |
> |
|
571 |
> |
// Fault in Mac ROM or RAM? |
572 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
573 |
> |
if (mac_fault) { |
574 |
> |
|
575 |
> |
// "VM settings" during MacOS 8 installation |
576 |
> |
if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000) |
577 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
578 |
> |
|
579 |
> |
// MacOS 8.5 installation |
580 |
> |
else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000) |
581 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
582 |
> |
|
583 |
> |
// MacOS 8 serial drivers on startup |
584 |
> |
else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000)) |
585 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
586 |
> |
|
587 |
> |
// MacOS 8.1 serial drivers on startup |
588 |
> |
else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
589 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
590 |
> |
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
591 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
592 |
> |
|
593 |
> |
// Ignore all other faults, if requested |
594 |
> |
if (PrefsFindBool("ignoresegv")) |
595 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
596 |
> |
} |
597 |
|
#else |
598 |
|
#error "FIXME: You don't have the capability to skip instruction within signal handlers" |
599 |
|
#endif |
624 |
|
|
625 |
|
// Install the handler for SIGSEGV |
626 |
|
sigsegv_install_handler(sigsegv_handler); |
627 |
< |
|
627 |
> |
|
628 |
|
#if ENABLE_MON |
629 |
|
// Install "regs" command in cxmon |
630 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
631 |
|
mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n"); |
632 |
|
#endif |
633 |
+ |
|
634 |
+ |
#if EMUL_TIME_STATS |
635 |
+ |
emul_start_time = clock(); |
636 |
+ |
#endif |
637 |
+ |
} |
638 |
+ |
|
639 |
+ |
/* |
640 |
+ |
* Deinitialize emulation |
641 |
+ |
*/ |
642 |
+ |
|
643 |
+ |
void exit_emul_ppc(void) |
644 |
+ |
{ |
645 |
+ |
#if EMUL_TIME_STATS |
646 |
+ |
clock_t emul_end_time = clock(); |
647 |
+ |
|
648 |
+ |
printf("### Statistics for SheepShaver emulation parts\n"); |
649 |
+ |
const clock_t emul_time = emul_end_time - emul_start_time; |
650 |
+ |
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
651 |
+ |
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
652 |
+ |
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
653 |
+ |
|
654 |
+ |
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
655 |
+ |
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
656 |
+ |
printf("Total " LABEL " time : %.1f sec (%.1f%%)\n", \ |
657 |
+ |
double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC), \ |
658 |
+ |
100.0 * double(VAR_PREFIX##_time) / double(emul_time)); \ |
659 |
+ |
} while (0) |
660 |
+ |
|
661 |
+ |
PRINT_STATS("Execute68k[Trap] execution", exec68k); |
662 |
+ |
PRINT_STATS("NativeOp execution", native_exec); |
663 |
+ |
PRINT_STATS("MacOS routine execution", macos_exec); |
664 |
+ |
|
665 |
+ |
#undef PRINT_STATS |
666 |
+ |
printf("\n"); |
667 |
+ |
#endif |
668 |
+ |
|
669 |
+ |
delete main_cpu; |
670 |
+ |
#if MULTICORE_CPU |
671 |
+ |
delete interrupt_cpu; |
672 |
+ |
#endif |
673 |
|
} |
674 |
|
|
675 |
|
/* |
679 |
|
void emul_ppc(uint32 entry) |
680 |
|
{ |
681 |
|
current_cpu = main_cpu; |
682 |
+ |
#if DEBUG |
683 |
|
current_cpu->start_log(); |
684 |
+ |
#endif |
685 |
+ |
// start emulation loop and enable code translation or caching |
686 |
|
current_cpu->execute(entry); |
687 |
|
} |
688 |
|
|
690 |
|
* Handle PowerPC interrupt |
691 |
|
*/ |
692 |
|
|
693 |
< |
// Atomic operations |
694 |
< |
extern int atomic_add(int *var, int v); |
695 |
< |
extern int atomic_and(int *var, int v); |
696 |
< |
extern int atomic_or(int *var, int v); |
697 |
< |
|
693 |
> |
#if ASYNC_IRQ |
694 |
> |
void HandleInterrupt(void) |
695 |
> |
{ |
696 |
> |
main_cpu->handle_interrupt(); |
697 |
> |
} |
698 |
> |
#else |
699 |
|
void TriggerInterrupt(void) |
700 |
|
{ |
701 |
|
#if 0 |
702 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
703 |
|
#else |
704 |
< |
SPCFLAGS_SET( SPCFLAG_INT ); |
704 |
> |
// Trigger interrupt to main cpu only |
705 |
> |
if (main_cpu) |
706 |
> |
main_cpu->trigger_interrupt(); |
707 |
|
#endif |
708 |
|
} |
709 |
+ |
#endif |
710 |
|
|
711 |
< |
static void HandleInterrupt(void) |
711 |
> |
void sheepshaver_cpu::handle_interrupt(void) |
712 |
|
{ |
713 |
|
// Do nothing if interrupts are disabled |
714 |
< |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
714 |
> |
if (*(int32 *)XLM_IRQ_NEST > 0) |
715 |
|
return; |
716 |
|
|
717 |
|
// Do nothing if there is no interrupt pending |
727 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
728 |
|
assert(current_cpu == main_cpu); |
729 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
730 |
< |
main_cpu->set_cr(main_cpu->get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
730 |
> |
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
731 |
|
break; |
732 |
|
|
733 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
734 |
|
case MODE_NATIVE: |
735 |
|
// 68k emulator inactive, in nanokernel? |
736 |
|
assert(current_cpu == main_cpu); |
737 |
< |
if (main_cpu->gpr(1) != KernelDataAddr) { |
737 |
> |
if (gpr(1) != KernelDataAddr) { |
738 |
|
// Prepare for 68k interrupt level 1 |
739 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
740 |
|
WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc, |
745 |
|
DisableInterrupt(); |
746 |
|
cpu_push(interrupt_cpu); |
747 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
748 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu); |
748 |
> |
current_cpu->interrupt(ROM_BASE + 0x312b1c); |
749 |
|
else |
750 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu); |
750 |
> |
current_cpu->interrupt(ROM_BASE + 0x312a3c); |
751 |
|
cpu_pop(); |
752 |
|
} |
753 |
|
break; |
822 |
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
823 |
|
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
824 |
|
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
825 |
+ |
POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE), |
826 |
|
}; |
827 |
|
|
828 |
|
static void get_resource(void); |
835 |
|
|
836 |
|
static void NativeOp(int selector) |
837 |
|
{ |
838 |
+ |
#if EMUL_TIME_STATS |
839 |
+ |
native_exec_count++; |
840 |
+ |
const clock_t native_exec_start = clock(); |
841 |
+ |
#endif |
842 |
+ |
|
843 |
|
switch (selector) { |
844 |
|
case NATIVE_PATCH_NAME_REGISTRY: |
845 |
|
DoPatchNameRegistry(); |
854 |
|
GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4), |
855 |
|
(void *)GPR(5), GPR(6), GPR(7)); |
856 |
|
break; |
857 |
< |
case NATIVE_GET_RESOURCE: |
858 |
< |
get_resource(); |
857 |
> |
#ifdef WORDS_BIGENDIAN |
858 |
> |
case NATIVE_ETHER_IRQ: |
859 |
> |
EtherIRQ(); |
860 |
|
break; |
861 |
< |
case NATIVE_GET_1_RESOURCE: |
862 |
< |
get_1_resource(); |
861 |
> |
case NATIVE_ETHER_INIT: |
862 |
> |
GPR(3) = InitStreamModule((void *)GPR(3)); |
863 |
|
break; |
864 |
< |
case NATIVE_GET_IND_RESOURCE: |
865 |
< |
get_ind_resource(); |
864 |
> |
case NATIVE_ETHER_TERM: |
865 |
> |
TerminateStreamModule(); |
866 |
|
break; |
867 |
< |
case NATIVE_GET_1_IND_RESOURCE: |
868 |
< |
get_1_ind_resource(); |
867 |
> |
case NATIVE_ETHER_OPEN: |
868 |
> |
GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7)); |
869 |
|
break; |
870 |
< |
case NATIVE_R_GET_RESOURCE: |
871 |
< |
r_get_resource(); |
870 |
> |
case NATIVE_ETHER_CLOSE: |
871 |
> |
GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5)); |
872 |
> |
break; |
873 |
> |
case NATIVE_ETHER_WPUT: |
874 |
> |
GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4)); |
875 |
> |
break; |
876 |
> |
case NATIVE_ETHER_RSRV: |
877 |
> |
GPR(3) = ether_rsrv((queue_t *)GPR(3)); |
878 |
> |
break; |
879 |
> |
#else |
880 |
> |
case NATIVE_ETHER_INIT: |
881 |
> |
// FIXME: needs more complicated thunks |
882 |
> |
GPR(3) = false; |
883 |
|
break; |
884 |
+ |
#endif |
885 |
|
case NATIVE_SERIAL_NOTHING: |
886 |
|
case NATIVE_SERIAL_OPEN: |
887 |
|
case NATIVE_SERIAL_PRIME_IN: |
902 |
|
GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4)); |
903 |
|
break; |
904 |
|
} |
905 |
+ |
case NATIVE_GET_RESOURCE: |
906 |
+ |
case NATIVE_GET_1_RESOURCE: |
907 |
+ |
case NATIVE_GET_IND_RESOURCE: |
908 |
+ |
case NATIVE_GET_1_IND_RESOURCE: |
909 |
+ |
case NATIVE_R_GET_RESOURCE: { |
910 |
+ |
typedef void (*GetResourceCallback)(void); |
911 |
+ |
static const GetResourceCallback get_resource_callbacks[] = { |
912 |
+ |
get_resource, |
913 |
+ |
get_1_resource, |
914 |
+ |
get_ind_resource, |
915 |
+ |
get_1_ind_resource, |
916 |
+ |
r_get_resource |
917 |
+ |
}; |
918 |
+ |
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
919 |
+ |
break; |
920 |
+ |
} |
921 |
|
case NATIVE_DISABLE_INTERRUPT: |
922 |
|
DisableInterrupt(); |
923 |
|
break; |
924 |
|
case NATIVE_ENABLE_INTERRUPT: |
925 |
|
EnableInterrupt(); |
926 |
|
break; |
927 |
+ |
case NATIVE_MAKE_EXECUTABLE: |
928 |
+ |
MakeExecutable(0, (void *)GPR(4), GPR(5)); |
929 |
+ |
break; |
930 |
|
default: |
931 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
932 |
|
QuitEmulator(); |
933 |
|
break; |
934 |
|
} |
935 |
+ |
|
936 |
+ |
#if EMUL_TIME_STATS |
937 |
+ |
native_exec_time += (clock() - native_exec_start); |
938 |
+ |
#endif |
939 |
|
} |
940 |
|
|
941 |
|
/* |
970 |
|
|
971 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
972 |
|
{ |
973 |
< |
uint16 proc[2] = {trap, M68K_RTS}; |
973 |
> |
uint16 proc[2]; |
974 |
> |
proc[0] = htons(trap); |
975 |
> |
proc[1] = htons(M68K_RTS); |
976 |
|
Execute68k((uint32)proc, r); |
977 |
|
} |
978 |
|
|
1028 |
|
} |
1029 |
|
|
1030 |
|
/* |
901 |
– |
* Atomic operations |
902 |
– |
*/ |
903 |
– |
|
904 |
– |
int atomic_add(int *var, int v) |
905 |
– |
{ |
906 |
– |
int ret = *var; |
907 |
– |
*var += v; |
908 |
– |
return ret; |
909 |
– |
} |
910 |
– |
|
911 |
– |
int atomic_and(int *var, int v) |
912 |
– |
{ |
913 |
– |
int ret = *var; |
914 |
– |
*var &= v; |
915 |
– |
return ret; |
916 |
– |
} |
917 |
– |
|
918 |
– |
int atomic_or(int *var, int v) |
919 |
– |
{ |
920 |
– |
int ret = *var; |
921 |
– |
*var |= v; |
922 |
– |
return ret; |
923 |
– |
} |
924 |
– |
|
925 |
– |
/* |
1031 |
|
* Resource Manager thunks |
1032 |
|
*/ |
1033 |
|
|