ViewVC Help

View File | Revision Log | Show Annotations | Revision Graph | Root Listing

root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.27 by gbeauche, 2004-02-15T17:17:36Z vs.
Revision 1.50 by gbeauche, 2004-07-11T07:54:56Z

#	Line 38 | Line 38
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+
46	+	#ifdef USE_SDL_VIDEO
47	+	#include <SDL_events.h>
48	+	#endif
49
50		#if ENABLE_MON
51		#include "mon.h"
#	Line 50 | Line 56
56		#include "debug.h"
57
58		// Emulation time statistics
59	<	#define EMUL_TIME_STATS 1
59	>	#ifndef EMUL_TIME_STATS
60	>	#define EMUL_TIME_STATS 0
61	>	#endif
62
63		#if EMUL_TIME_STATS
64		static clock_t emul_start_time;
65	<	static uint32 interrupt_count = 0;
65	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
66		static clock_t interrupt_time = 0;
67		static uint32 exec68k_count = 0;
68		static clock_t exec68k_time = 0;
#	Line 82 | Line 90 | extern "C" void check_load_invoc(uint32
90		// PowerPC EmulOp to exit from emulation looop
91		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
92
93	<	// Enable multicore (main/interrupts) cpu emulation?
94	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
93	>	// Enable interrupt routine safety checks?
94	>	#define SAFE_INTERRUPT_PPC 1
95
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
#	Line 101 | Line 109 | const uint32 POWERPC_EXEC_RETURN = POWER
109		static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110
111		// SIGSEGV handler
112	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>
114	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115	>	// Special trampolines for EmulOp and NativeOp
116	>	static uint8 *emul_op_trampoline;
117	>	static uint8 *native_op_trampoline;
118	>	#endif
119
120		// JIT Compiler enabled?
121		static inline bool enable_jit_p()
#	Line 125 | Line 139 | class sheepshaver_cpu
139		void init_decoder();
140		void execute_sheep(uint32 opcode);
141
142	+	// CPU context to preserve on interrupt
143	+	class interrupt_context {
144	+	uint32 gpr[32];
145	+	uint32 pc;
146	+	uint32 lr;
147	+	uint32 ctr;
148	+	uint32 cr;
149	+	uint32 xer;
150	+	sheepshaver_cpu *cpu;
151	+	const char *where;
152	+	public:
153	+	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
154	+	~interrupt_context();
155	+	};
156	+
157		public:
158
159		// Constructor
#	Line 136 | Line 165 | public:
165		uint32 get_xer() const          { return xer().get(); }
166		void set_xer(uint32 v)          { xer().set(v); }
167
168	+	// Execute NATIVE_OP routine
169	+	void execute_native_op(uint32 native_op);
170	+
171		// Execute EMUL_OP routine
172		void execute_emul_op(uint32 emul_op);
173
#	Line 149 | Line 181 | public:
181		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
182
183		// Compile one instruction
184	<	virtual bool compile1(codegen_context_t & cg_context);
184	>	virtual int compile1(codegen_context_t & cg_context);
185
186		// Resource manager thunk
187		void get_resource(uint32 old_get_resource);
#	Line 158 | Line 190 | public:
190		void interrupt(uint32 entry);
191		void handle_interrupt();
192
161	–	// Lazy memory allocator (one item at a time)
162	–	void *operator new(size_t size)
163	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
164	–	void operator delete(void *p)
165	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
166	–	// FIXME: really make surre array allocation fail at link time?
167	–	void *operator new[](size_t);
168	–	void operator delete[](void *p);
169	–
193		// Make sure the SIGSEGV handler can access CPU registers
194		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
195		};
196
197	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
197	>	// Memory allocator returning areas aligned on 16-byte boundaries
198	>	void *operator new(size_t size)
199	>	{
200	>	void *p;
201	>
202	>	#if defined(HAVE_POSIX_MEMALIGN)
203	>	if (posix_memalign(&p, 16, size) != 0)
204	>	throw std::bad_alloc();
205	>	#elif defined(HAVE_MEMALIGN)
206	>	p = memalign(16, size);
207	>	#elif defined(HAVE_VALLOC)
208	>	p = valloc(size); // page-aligned!
209	>	#else
210	>	/* XXX: handle padding ourselves */
211	>	p = malloc(size);
212	>	#endif
213	>
214	>	return p;
215	>	}
216	>
217	>	void operator delete(void *p)
218	>	{
219	>	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
220	>	#if defined(__GLIBC__)
221	>	// this is known to work only with GNU libc
222	>	free(p);
223	>	#endif
224	>	#else
225	>	free(p);
226	>	#endif
227	>	}
228
229		sheepshaver_cpu::sheepshaver_cpu()
230		: powerpc_cpu(enable_jit_p())
#	Line 199 | Line 252 | void sheepshaver_cpu::init_decoder()
252		}
253		}
254
202	–	// Forward declaration for native opcode handler
203	–	static void NativeOp(int selector);
204	–
255		/*              NativeOp instruction format:
256	<	+------------+--------------------------+--+----------+------------+
257	<	|      6     |                          |FN|    OP    |      2     |
258	<	+------------+--------------------------+--+----------+------------+
259	<	0         5 |6                       19 20 21      25 26        31
256	>	+------------+-------------------------+--+-----------+------------+
257	>	|      6     |                         |FN|    OP     |      2     |
258	>	+------------+-------------------------+--+-----------+------------+
259	>	0         5 |6                      18 19 20      25 26        31
260		*/
261
262	<	typedef bit_field< 20, 20 > FN_field;
263	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
262	>	typedef bit_field< 19, 19 > FN_field;
263	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
264		typedef bit_field< 26, 31 > EMUL_OP_field;
265
266		// Execute EMUL_OP routine
#	Line 253 | Line 303 | void sheepshaver_cpu::execute_sheep(uint
303		break;
304
305		case 2:         // EXEC_NATIVE
306	<	NativeOp(NATIVE_OP_field::extract(opcode));
306	>	execute_native_op(NATIVE_OP_field::extract(opcode));
307		if (FN_field::test(opcode))
308		pc() = lr();
309		else
#	Line 268 | Line 318 | void sheepshaver_cpu::execute_sheep(uint
318		}
319
320		// Compile one instruction
321	<	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
321	>	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
322		{
323		#if PPC_ENABLE_JIT
324		const instr_info_t *ii = cg_context.instr_info;
325		if (ii->mnemo != PPC_I(SHEEP))
326	<	return false;
326	>	return COMPILE_FAILURE;
327
328	<	bool compiled = false;
328	>	int status = COMPILE_FAILURE;
329		powerpc_dyngen & dg = cg_context.codegen;
330		uint32 opcode = cg_context.opcode;
331
332		switch (opcode & 0x3f) {
333		case 0:         // EMUL_RETURN
334		dg.gen_invoke(QuitEmulator);
335	<	compiled = true;
335	>	status = COMPILE_CODE_OK;
336		break;
337
338		case 1:         // EXEC_RETURN
339		dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
340	<	compiled = true;
340	>	// Don't check for pending interrupts, we do know we have to
341	>	// get out of this block ASAP
342	>	dg.gen_exec_return();
343	>	status = COMPILE_EPILOGUE_OK;
344		break;
345
346		case 2: {       // EXEC_NATIVE
347		uint32 selector = NATIVE_OP_field::extract(opcode);
348		switch (selector) {
349	+	#if !PPC_REENTRANT_JIT
350	+	// Filter out functions that may invoke Execute68k() or
351	+	// CallMacOS(), this would break reentrancy as they could
352	+	// invalidate the translation cache and even overwrite
353	+	// continuation code when we are done with them.
354		case NATIVE_PATCH_NAME_REGISTRY:
355		dg.gen_invoke(DoPatchNameRegistry);
356	<	compiled = true;
356	>	status = COMPILE_CODE_OK;
357		break;
358		case NATIVE_VIDEO_INSTALL_ACCEL:
359		dg.gen_invoke(VideoInstallAccel);
360	<	compiled = true;
360	>	status = COMPILE_CODE_OK;
361		break;
362		case NATIVE_VIDEO_VBL:
363		dg.gen_invoke(VideoVBL);
364	<	compiled = true;
364	>	status = COMPILE_CODE_OK;
365		break;
366		case NATIVE_GET_RESOURCE:
367		case NATIVE_GET_1_RESOURCE:
#	Line 321 | Line 379 | bool sheepshaver_cpu::compile1(codegen_c
379		typedef void (*func_t)(dyngen_cpu_base, uint32);
380		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
381		dg.gen_invoke_CPU_im(func, old_get_resource);
382	<	compiled = true;
382	>	status = COMPILE_CODE_OK;
383		break;
384		}
327	–	case NATIVE_DISABLE_INTERRUPT:
328	–	dg.gen_invoke(DisableInterrupt);
329	–	compiled = true;
330	–	break;
331	–	case NATIVE_ENABLE_INTERRUPT:
332	–	dg.gen_invoke(EnableInterrupt);
333	–	compiled = true;
334	–	break;
385		case NATIVE_CHECK_LOAD_INVOC:
386		dg.gen_load_T0_GPR(3);
387		dg.gen_load_T1_GPR(4);
388		dg.gen_se_16_32_T1();
389		dg.gen_load_T2_GPR(5);
390		dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
391	<	compiled = true;
391	>	status = COMPILE_CODE_OK;
392	>	break;
393	>	#endif
394	>	case NATIVE_BITBLT:
395	>	dg.gen_load_T0_GPR(3);
396	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
397	>	status = COMPILE_CODE_OK;
398	>	break;
399	>	case NATIVE_INVRECT:
400	>	dg.gen_load_T0_GPR(3);
401	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
402	>	status = COMPILE_CODE_OK;
403	>	break;
404	>	case NATIVE_FILLRECT:
405	>	dg.gen_load_T0_GPR(3);
406	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
407	>	status = COMPILE_CODE_OK;
408		break;
409		}
410	<	if (FN_field::test(opcode)) {
411	<	if (compiled) {
410	>	// Could we fully translate this NativeOp?
411	>	if (status == COMPILE_CODE_OK) {
412	>	if (!FN_field::test(opcode))
413	>	cg_context.done_compile = false;
414	>	else {
415		dg.gen_load_A0_LR();
416		dg.gen_set_PC_A0();
417	+	cg_context.done_compile = true;
418		}
419	<	cg_context.done_compile = true;
419	>	break;
420		}
421	<	else
421	>	#if PPC_REENTRANT_JIT
422	>	// Try to execute NativeOp trampoline
423	>	if (!FN_field::test(opcode))
424	>	dg.gen_set_PC_im(cg_context.pc + 4);
425	>	else {
426	>	dg.gen_load_A0_LR();
427	>	dg.gen_set_PC_A0();
428	>	}
429	>	dg.gen_mov_32_T0_im(selector);
430	>	dg.gen_jmp(native_op_trampoline);
431	>	cg_context.done_compile = true;
432	>	status = COMPILE_EPILOGUE_OK;
433	>	break;
434	>	#endif
435	>	// Invoke NativeOp handler
436	>	if (!FN_field::test(opcode)) {
437	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
438	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
439	>	dg.gen_invoke_CPU_im(func, selector);
440		cg_context.done_compile = false;
441	+	status = COMPILE_CODE_OK;
442	+	}
443	+	// Otherwise, let it generate a call to execute_sheep() which
444	+	// will cause necessary updates to the program counter
445		break;
446		}
447
448		default: {      // EMUL_OP
449	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
450	+	#if PPC_REENTRANT_JIT
451	+	// Try to execute EmulOp trampoline
452	+	dg.gen_set_PC_im(cg_context.pc + 4);
453	+	dg.gen_mov_32_T0_im(emul_op);
454	+	dg.gen_jmp(emul_op_trampoline);
455	+	cg_context.done_compile = true;
456	+	status = COMPILE_EPILOGUE_OK;
457	+	break;
458	+	#endif
459	+	// Invoke EmulOp handler
460		typedef void (*func_t)(dyngen_cpu_base, uint32);
461		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
462	<	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
462	>	dg.gen_invoke_CPU_im(func, emul_op);
463		cg_context.done_compile = false;
464	<	compiled = true;
464	>	status = COMPILE_CODE_OK;
465		break;
466		}
467		}
468	<	return compiled;
468	>	return status;
469	>	#endif
470	>	return COMPILE_FAILURE;
471	>	}
472	>
473	>	// CPU context to preserve on interrupt
474	>	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
475	>	{
476	>	#if SAFE_INTERRUPT_PPC >= 2
477	>	cpu = _cpu;
478	>	where = _where;
479	>
480	>	// Save interrupt context
481	>	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
482	>	pc = cpu->pc();
483	>	lr = cpu->lr();
484	>	ctr = cpu->ctr();
485	>	cr = cpu->get_cr();
486	>	xer = cpu->get_xer();
487	>	#endif
488	>	}
489	>
490	>	sheepshaver_cpu::interrupt_context::~interrupt_context()
491	>	{
492	>	#if SAFE_INTERRUPT_PPC >= 2
493	>	// Check whether CPU context was preserved by interrupt
494	>	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
495	>	printf("FATAL: %s: interrupt clobbers registers\n", where);
496	>	for (int i = 0; i < 32; i++)
497	>	if (gpr[i] != cpu->gpr(i))
498	>	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
499	>	}
500	>	if (pc != cpu->pc())
501	>	printf("FATAL: %s: interrupt clobbers PC\n", where);
502	>	if (lr != cpu->lr())
503	>	printf("FATAL: %s: interrupt clobbers LR\n", where);
504	>	if (ctr != cpu->ctr())
505	>	printf("FATAL: %s: interrupt clobbers CTR\n", where);
506	>	if (cr != cpu->get_cr())
507	>	printf("FATAL: %s: interrupt clobbers CR\n", where);
508	>	if (xer != cpu->get_xer())
509	>	printf("FATAL: %s: interrupt clobbers XER\n", where);
510		#endif
367	–	return false;
511		}
512
513		// Handle MacOS interrupt
514		void sheepshaver_cpu::interrupt(uint32 entry)
515		{
516		#if EMUL_TIME_STATS
517	<	interrupt_count++;
517	>	ppc_interrupt_count++;
518		const clock_t interrupt_start = clock();
519		#endif
520
521	<	#if !MULTICORE_CPU
521	>	#if SAFE_INTERRUPT_PPC
522	>	static int depth = 0;
523	>	if (depth != 0)
524	>	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
525	>	depth++;
526	>	#endif
527	>
528		// Save program counters and branch registers
529		uint32 saved_pc = pc();
530		uint32 saved_lr = lr();
531		uint32 saved_ctr= ctr();
532		uint32 saved_sp = gpr(1);
384	–	#endif
533
534		// Initialize stack pointer to SheepShaver alternate stack base
535		gpr(1) = SignalStackBase() - 64;
#	Line 421 | Line 569 | void sheepshaver_cpu::interrupt(uint32 e
569		// Enter nanokernel
570		execute(entry);
571
424	–	#if !MULTICORE_CPU
572		// Restore program counters and branch registers
573		pc() = saved_pc;
574		lr() = saved_lr;
575		ctr()= saved_ctr;
576		gpr(1) = saved_sp;
430	–	#endif
577
578		#if EMUL_TIME_STATS
579		interrupt_time += (clock() - interrupt_start);
580		#endif
581	+
582	+	#if SAFE_INTERRUPT_PPC
583	+	depth--;
584	+	#endif
585		}
586
587		// Execute 68k routine
#	Line 625 | Line 775 | inline void sheepshaver_cpu::get_resourc
775		*              SheepShaver CPU engine interface
776		**/
777
778	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
779	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
630	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
778	>	// PowerPC CPU emulator
779	>	static sheepshaver_cpu *ppc_cpu = NULL;
780
781		void FlushCodeCache(uintptr start, uintptr end)
782		{
783		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
784	<	main_cpu->invalidate_cache_range(start, end);
636	<	#if MULTICORE_CPU
637	<	interrupt_cpu->invalidate_cache_range(start, end);
638	<	#endif
639	<	}
640	<
641	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
642	<	{
643	<	#if MULTICORE_CPU
644	<	current_cpu = new_cpu;
645	<	#endif
646	<	}
647	<
648	<	static inline void cpu_pop()
649	<	{
650	<	#if MULTICORE_CPU
651	<	current_cpu = main_cpu;
652	<	#endif
784	>	ppc_cpu->invalidate_cache_range(start, end);
785		}
786
787		// Dump PPC registers
788		static void dump_registers(void)
789		{
790	<	current_cpu->dump_registers();
790	>	ppc_cpu->dump_registers();
791		}
792
793		// Dump log
794		static void dump_log(void)
795		{
796	<	current_cpu->dump_log();
796	>	ppc_cpu->dump_log();
797		}
798
799		/*
800		*  Initialize CPU emulation
801		*/
802
803	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
803	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
804		{
805		#if ENABLE_VOSF
806		// Handle screen fault
#	Line 684 | Line 816 | static sigsegv_return_t sigsegv_handler(
816		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
817
818		// Get program counter of target CPU
819	<	sheepshaver_cpu * const cpu = current_cpu;
819	>	sheepshaver_cpu * const cpu = ppc_cpu;
820		const uint32 pc = cpu->pc();
821
822		// Fault in Mac ROM or RAM?
823	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
823	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
824		if (mac_fault) {
825
826		// "VM settings" during MacOS 8 installation
#	Line 708 | Line 840 | static sigsegv_return_t sigsegv_handler(
840		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
841		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
842		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
843	+
844	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
845	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
846	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
847	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
848	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
849	+
850	+	// Ignore writes to the zero page
851	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
852	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
853
854		// Ignore all other faults, if requested
855		if (PrefsFindBool("ignoresegv"))
#	Line 720 | Line 862 | static sigsegv_return_t sigsegv_handler(
862		printf("SIGSEGV\n");
863		printf("  pc %p\n", fault_instruction);
864		printf("  ea %p\n", fault_address);
723	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
865		dump_registers();
866	<	current_cpu->dump_log();
866	>	ppc_cpu->dump_log();
867		enter_mon();
868		QuitEmulator();
869
#	Line 732 | Line 873 | static sigsegv_return_t sigsegv_handler(
873		void init_emul_ppc(void)
874		{
875		// Initialize main CPU emulator
876	<	main_cpu = new sheepshaver_cpu();
877	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
878	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
876	>	ppc_cpu = new sheepshaver_cpu();
877	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
878	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
879		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
880
740	–	#if MULTICORE_CPU
741	–	// Initialize alternate CPU emulator to handle interrupts
742	–	interrupt_cpu = new sheepshaver_cpu();
743	–	#endif
744	–
745	–	// Install the handler for SIGSEGV
746	–	sigsegv_install_handler(sigsegv_handler);
747	–
881		#if ENABLE_MON
882		// Install "regs" command in cxmon
883		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 770 | Line 903 | void exit_emul_ppc(void)
903		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
904		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
905		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
906	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
907	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
908
909		#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
910		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
#	Line 786 | Line 921 | void exit_emul_ppc(void)
921		printf("\n");
922		#endif
923
924	<	delete main_cpu;
925	<	#if MULTICORE_CPU
926	<	delete interrupt_cpu;
927	<	#endif
924	>	delete ppc_cpu;
925	>	}
926	>
927	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
928	>	// Initialize EmulOp trampolines
929	>	void init_emul_op_trampolines(basic_dyngen & dg)
930	>	{
931	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
932	>	func_t func;
933	>
934	>	// EmulOp
935	>	emul_op_trampoline = dg.gen_start();
936	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
937	>	dg.gen_invoke_CPU_T0(func);
938	>	dg.gen_exec_return();
939	>	dg.gen_end();
940	>
941	>	// NativeOp
942	>	native_op_trampoline = dg.gen_start();
943	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
944	>	dg.gen_invoke_CPU_T0(func);
945	>	dg.gen_exec_return();
946	>	dg.gen_end();
947	>
948	>	D(bug("EmulOp trampoline:   %p\n", emul_op_trampoline));
949	>	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
950		}
951	+	#endif
952
953		/*
954		*  Emulation loop
#	Line 798 | Line 956 | void exit_emul_ppc(void)
956
957		void emul_ppc(uint32 entry)
958		{
801	–	current_cpu = main_cpu;
959		#if 0
960	<	current_cpu->start_log();
960	>	ppc_cpu->start_log();
961		#endif
962		// start emulation loop and enable code translation or caching
963	<	current_cpu->execute(entry);
963	>	ppc_cpu->execute(entry);
964		}
965
966		/*
967		*  Handle PowerPC interrupt
968		*/
969
813	–	#if ASYNC_IRQ
814	–	void HandleInterrupt(void)
815	–	{
816	–	main_cpu->handle_interrupt();
817	–	}
818	–	#else
970		void TriggerInterrupt(void)
971		{
972		#if 0
973		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
974		#else
975		// Trigger interrupt to main cpu only
976	<	if (main_cpu)
977	<	main_cpu->trigger_interrupt();
976	>	if (ppc_cpu)
977	>	ppc_cpu->trigger_interrupt();
978		#endif
979		}
829	–	#endif
980
981		void sheepshaver_cpu::handle_interrupt(void)
982		{
983	+	#ifdef USE_SDL_VIDEO
984	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
985	+	SDL_PumpEvents();
986	+	#endif
987	+
988		// Do nothing if interrupts are disabled
989	<	if (*(int32 *)XLM_IRQ_NEST > 0)
989	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
990		return;
991
992	<	// Do nothing if there is no interrupt pending
993	<	if (InterruptFlags == 0)
994	<	return;
992	>	// Current interrupt nest level
993	>	static int interrupt_depth = 0;
994	>	++interrupt_depth;
995	>	#if EMUL_TIME_STATS
996	>	interrupt_count++;
997	>	#endif
998
999		// Disable MacOS stack sniffer
1000		WriteMacInt32(0x110, 0);
#	Line 845 | Line 1003 | void sheepshaver_cpu::handle_interrupt(v
1003		switch (ReadMacInt32(XLM_RUN_MODE)) {
1004		case MODE_68K:
1005		// 68k emulator active, trigger 68k interrupt level 1
848	–	assert(current_cpu == main_cpu);
1006		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1007		set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
1008		break;
#	Line 853 | Line 1010 | void sheepshaver_cpu::handle_interrupt(v
1010		#if INTERRUPTS_IN_NATIVE_MODE
1011		case MODE_NATIVE:
1012		// 68k emulator inactive, in nanokernel?
1013	<	assert(current_cpu == main_cpu);
1014	<	if (gpr(1) != KernelDataAddr) {
1013	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1014	>	interrupt_context ctx(this, "PowerPC mode");
1015	>
1016		// Prepare for 68k interrupt level 1
1017		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1018		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 863 | Line 1021 | void sheepshaver_cpu::handle_interrupt(v
1021
1022		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1023		DisableInterrupt();
866	–	cpu_push(interrupt_cpu);
1024		if (ROMType == ROMTYPE_NEWWORLD)
1025	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
1025	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1026		else
1027	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
871	<	cpu_pop();
1027	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1028		}
1029		break;
1030		#endif
#	Line 877 | Line 1033 | void sheepshaver_cpu::handle_interrupt(v
1033		case MODE_EMUL_OP:
1034		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1035		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1036	+	interrupt_context ctx(this, "68k mode");
1037	+	#if EMUL_TIME_STATS
1038	+	const clock_t interrupt_start = clock();
1039	+	#endif
1040		#if 1
1041		// Execute full 68k interrupt routine
1042		M68kRegisters r;
#	Line 902 | Line 1062 | void sheepshaver_cpu::handle_interrupt(v
1062		}
1063		}
1064		#endif
1065	+	#if EMUL_TIME_STATS
1066	+	interrupt_time += (clock() - interrupt_start);
1067	+	#endif
1068		}
1069		break;
1070		#endif
1071		}
1072	+
1073	+	// We are done with this interrupt
1074	+	--interrupt_depth;
1075		}
1076
1077		static void get_resource(void);
#	Line 914 | Line 1080 | static void get_ind_resource(void);
1080		static void get_1_ind_resource(void);
1081		static void r_get_resource(void);
1082
1083	<	#define GPR(REG) current_cpu->gpr(REG)
1084	<
919	<	static void NativeOp(int selector)
1083	>	// Execute NATIVE_OP routine
1084	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1085		{
1086		#if EMUL_TIME_STATS
1087		native_exec_count++;
#	Line 934 | Line 1099 | static void NativeOp(int selector)
1099		VideoVBL();
1100		break;
1101		case NATIVE_VIDEO_DO_DRIVER_IO:
1102	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
1103	<	(void *)GPR(5), GPR(6), GPR(7));
1102	>	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1103	>	(void *)gpr(5), gpr(6), gpr(7));
1104		break;
940	–	#ifdef WORDS_BIGENDIAN
1105		case NATIVE_ETHER_IRQ:
1106		EtherIRQ();
1107		break;
1108		case NATIVE_ETHER_INIT:
1109	<	GPR(3) = InitStreamModule((void *)GPR(3));
1109	>	gpr(3) = InitStreamModule((void *)gpr(3));
1110		break;
1111		case NATIVE_ETHER_TERM:
1112		TerminateStreamModule();
1113		break;
1114		case NATIVE_ETHER_OPEN:
1115	<	GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1115	>	gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1116		break;
1117		case NATIVE_ETHER_CLOSE:
1118	<	GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5));
1118	>	gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5));
1119		break;
1120		case NATIVE_ETHER_WPUT:
1121	<	GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4));
1121	>	gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4));
1122		break;
1123		case NATIVE_ETHER_RSRV:
1124	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1124	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1125		break;
1126	<	#else
1127	<	case NATIVE_ETHER_INIT:
1128	<	// FIXME: needs more complicated thunks
1129	<	GPR(3) = false;
1126	>	case NATIVE_SYNC_HOOK:
1127	>	gpr(3) = NQD_sync_hook(gpr(3));
1128	>	break;
1129	>	case NATIVE_BITBLT_HOOK:
1130	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1131	>	break;
1132	>	case NATIVE_BITBLT:
1133	>	NQD_bitblt(gpr(3));
1134	>	break;
1135	>	case NATIVE_FILLRECT_HOOK:
1136	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1137	>	break;
1138	>	case NATIVE_INVRECT:
1139	>	NQD_invrect(gpr(3));
1140	>	break;
1141	>	case NATIVE_FILLRECT:
1142	>	NQD_fillrect(gpr(3));
1143		break;
967	–	#endif
1144		case NATIVE_SERIAL_NOTHING:
1145		case NATIVE_SERIAL_OPEN:
1146		case NATIVE_SERIAL_PRIME_IN:
#	Line 982 | Line 1158 | static void NativeOp(int selector)
1158		SerialStatus,
1159		SerialClose
1160		};
1161	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1161	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1162		break;
1163		}
1164		case NATIVE_GET_RESOURCE:
#	Line 992 | Line 1168 | static void NativeOp(int selector)
1168		case NATIVE_R_GET_RESOURCE: {
1169		typedef void (*GetResourceCallback)(void);
1170		static const GetResourceCallback get_resource_callbacks[] = {
1171	<	get_resource,
1172	<	get_1_resource,
1173	<	get_ind_resource,
1174	<	get_1_ind_resource,
1175	<	r_get_resource
1171	>	::get_resource,
1172	>	::get_1_resource,
1173	>	::get_ind_resource,
1174	>	::get_1_ind_resource,
1175	>	::r_get_resource
1176		};
1177		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1178		break;
1179		}
1004	–	case NATIVE_DISABLE_INTERRUPT:
1005	–	DisableInterrupt();
1006	–	break;
1007	–	case NATIVE_ENABLE_INTERRUPT:
1008	–	EnableInterrupt();
1009	–	break;
1180		case NATIVE_MAKE_EXECUTABLE:
1181	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1181	>	MakeExecutable(0, (void *)gpr(4), gpr(5));
1182		break;
1183		case NATIVE_CHECK_LOAD_INVOC:
1184	<	check_load_invoc(GPR(3), GPR(4), GPR(5));
1184	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1185		break;
1186		default:
1187		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 1032 | Line 1202 | static void NativeOp(int selector)
1202
1203		void Execute68k(uint32 pc, M68kRegisters *r)
1204		{
1205	<	current_cpu->execute_68k(pc, r);
1205	>	ppc_cpu->execute_68k(pc, r);
1206		}
1207
1208		/*
#	Line 1055 | Line 1225 | void Execute68kTrap(uint16 trap, M68kReg
1225
1226		uint32 call_macos(uint32 tvect)
1227		{
1228	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1228	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1229		}
1230
1231		uint32 call_macos1(uint32 tvect, uint32 arg1)
1232		{
1233		const uint32 args[] = { arg1 };
1234	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1234	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1235		}
1236
1237		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1238		{
1239		const uint32 args[] = { arg1, arg2 };
1240	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1240	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1241		}
1242
1243		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1244		{
1245		const uint32 args[] = { arg1, arg2, arg3 };
1246	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1246	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1247		}
1248
1249		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1250		{
1251		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1252	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1252	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1253		}
1254
1255		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1256		{
1257		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1258	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1258	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1259		}
1260
1261		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1262		{
1263		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1264	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1264	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1265		}
1266
1267		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1268		{
1269		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1270	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1270	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1271		}
1272
1273		/*
#	Line 1106 | Line 1276 | uint32 call_macos7(uint32 tvect, uint32
1276
1277		void get_resource(void)
1278		{
1279	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1279	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1280		}
1281
1282		void get_1_resource(void)
1283		{
1284	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1284	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1285		}
1286
1287		void get_ind_resource(void)
1288		{
1289	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1289	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1290		}
1291
1292		void get_1_ind_resource(void)
1293		{
1294	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1294	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1295		}
1296
1297		void r_get_resource(void)
1298		{
1299	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1299	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1300		}

Diff Legend

–	Removed lines
+	Added lines
<	Changed lines
>	Changed lines