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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.27 by gbeauche, 2004-02-15T17:17:36Z vs.
Revision 1.41 by gbeauche, 2004-05-20T12:33:58Z

#	Line 38 | Line 38
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45
46		#if ENABLE_MON
47		#include "mon.h"
#	Line 82 | Line 84 | extern "C" void check_load_invoc(uint32
84		// PowerPC EmulOp to exit from emulation looop
85		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
86
87	<	// Enable multicore (main/interrupts) cpu emulation?
88	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87	>	// Enable interrupt routine safety checks?
88	>	#define SAFE_INTERRUPT_PPC 1
89
90		// Enable Execute68k() safety checks?
91		#define SAFE_EXEC_68K 1
#	Line 97 | Line 99 | const uint32 POWERPC_EXEC_RETURN = POWER
99		// Interrupts in native mode?
100		#define INTERRUPTS_IN_NATIVE_MODE 1
101
102	+	// Enable native EMUL_OPs to be run without a mode switch
103	+	#define ENABLE_NATIVE_EMUL_OP 1
104	+
105		// Pointer to Kernel Data
106		static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
107
108		// SIGSEGV handler
109		static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
110
111	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
112	+	// Special trampolines for EmulOp and NativeOp
113	+	static uint8 *emul_op_trampoline;
114	+	static uint8 *native_op_trampoline;
115	+	#endif
116	+
117		// JIT Compiler enabled?
118		static inline bool enable_jit_p()
119		{
#	Line 125 | Line 136 | class sheepshaver_cpu
136		void init_decoder();
137		void execute_sheep(uint32 opcode);
138
139	+	// Filter out EMUL_OP routines that only call native code
140	+	bool filter_execute_emul_op(uint32 emul_op);
141	+
142	+	// "Native" EMUL_OP routines
143	+	void execute_emul_op_microseconds();
144	+	void execute_emul_op_idle_time_1();
145	+	void execute_emul_op_idle_time_2();
146	+
147	+	// CPU context to preserve on interrupt
148	+	class interrupt_context {
149	+	uint32 gpr[32];
150	+	uint32 pc;
151	+	uint32 lr;
152	+	uint32 ctr;
153	+	uint32 cr;
154	+	uint32 xer;
155	+	sheepshaver_cpu *cpu;
156	+	const char *where;
157	+	public:
158	+	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
159	+	~interrupt_context();
160	+	};
161	+
162		public:
163
164		// Constructor
#	Line 136 | Line 170 | public:
170		uint32 get_xer() const          { return xer().get(); }
171		void set_xer(uint32 v)          { xer().set(v); }
172
173	+	// Execute NATIVE_OP routine
174	+	void execute_native_op(uint32 native_op);
175	+
176		// Execute EMUL_OP routine
177		void execute_emul_op(uint32 emul_op);
178
#	Line 149 | Line 186 | public:
186		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
187
188		// Compile one instruction
189	<	virtual bool compile1(codegen_context_t & cg_context);
189	>	virtual int compile1(codegen_context_t & cg_context);
190
191		// Resource manager thunk
192		void get_resource(uint32 old_get_resource);
#	Line 158 | Line 195 | public:
195		void interrupt(uint32 entry);
196		void handle_interrupt();
197
161	–	// Lazy memory allocator (one item at a time)
162	–	void *operator new(size_t size)
163	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
164	–	void operator delete(void *p)
165	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
166	–	// FIXME: really make surre array allocation fail at link time?
167	–	void *operator new[](size_t);
168	–	void operator delete[](void *p);
169	–
198		// Make sure the SIGSEGV handler can access CPU registers
199		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
200		};
201
202	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
202	>	// Memory allocator returning areas aligned on 16-byte boundaries
203	>	void *operator new(size_t size)
204	>	{
205	>	void *p;
206	>
207	>	#if defined(HAVE_POSIX_MEMALIGN)
208	>	if (posix_memalign(&p, 16, size) != 0)
209	>	throw std::bad_alloc();
210	>	#elif defined(HAVE_MEMALIGN)
211	>	p = memalign(16, size);
212	>	#elif defined(HAVE_VALLOC)
213	>	p = valloc(size); // page-aligned!
214	>	#else
215	>	/* XXX: handle padding ourselves */
216	>	p = malloc(size);
217	>	#endif
218	>
219	>	return p;
220	>	}
221	>
222	>	void operator delete(void *p)
223	>	{
224	>	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
225	>	#if defined(__GLIBC__)
226	>	// this is known to work only with GNU libc
227	>	free(p);
228	>	#endif
229	>	#else
230	>	free(p);
231	>	#endif
232	>	}
233
234		sheepshaver_cpu::sheepshaver_cpu()
235		: powerpc_cpu(enable_jit_p())
#	Line 199 | Line 257 | void sheepshaver_cpu::init_decoder()
257		}
258		}
259
202	–	// Forward declaration for native opcode handler
203	–	static void NativeOp(int selector);
204	–
260		/*              NativeOp instruction format:
261	<	+------------+--------------------------+--+----------+------------+
262	<	|      6     |                          |FN|    OP    |      2     |
263	<	+------------+--------------------------+--+----------+------------+
264	<	0         5 |6                       19 20 21      25 26        31
261	>	+------------+-------------------------+--+-----------+------------+
262	>	|      6     |                         |FN|    OP     |      2     |
263	>	+------------+-------------------------+--+-----------+------------+
264	>	0         5 |6                      18 19 20      25 26        31
265		*/
266
267	<	typedef bit_field< 20, 20 > FN_field;
268	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
267	>	typedef bit_field< 19, 19 > FN_field;
268	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
269		typedef bit_field< 26, 31 > EMUL_OP_field;
270
271	+	// "Native" EMUL_OP routines
272	+	#define GPR_A(REG) gpr(16 + (REG))
273	+	#define GPR_D(REG) gpr( 8 + (REG))
274	+
275	+	void sheepshaver_cpu::execute_emul_op_microseconds()
276	+	{
277	+	Microseconds(GPR_A(0), GPR_D(0));
278	+	}
279	+
280	+	void sheepshaver_cpu::execute_emul_op_idle_time_1()
281	+	{
282	+	// Sleep if no events pending
283	+	if (ReadMacInt32(0x14c) == 0)
284	+	Delay_usec(16667);
285	+	GPR_A(0) = ReadMacInt32(0x2b6);
286	+	}
287	+
288	+	void sheepshaver_cpu::execute_emul_op_idle_time_2()
289	+	{
290	+	// Sleep if no events pending
291	+	if (ReadMacInt32(0x14c) == 0)
292	+	Delay_usec(16667);
293	+	GPR_D(0) = (uint32)-2;
294	+	}
295	+
296	+	// Filter out EMUL_OP routines that only call native code
297	+	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
298	+	{
299	+	switch (emul_op) {
300	+	case OP_MICROSECONDS:
301	+	execute_emul_op_microseconds();
302	+	return true;
303	+	case OP_IDLE_TIME:
304	+	execute_emul_op_idle_time_1();
305	+	return true;
306	+	case OP_IDLE_TIME_2:
307	+	execute_emul_op_idle_time_2();
308	+	return true;
309	+	}
310	+	return false;
311	+	}
312	+
313		// Execute EMUL_OP routine
314		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
315		{
316	+	#if ENABLE_NATIVE_EMUL_OP
317	+	// First, filter out EMUL_OPs that can be executed without a mode switch
318	+	if (filter_execute_emul_op(emul_op))
319	+	return;
320	+	#endif
321	+
322		M68kRegisters r68;
323		WriteMacInt32(XLM_68K_R25, gpr(25));
324		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 253 | Line 356 | void sheepshaver_cpu::execute_sheep(uint
356		break;
357
358		case 2:         // EXEC_NATIVE
359	<	NativeOp(NATIVE_OP_field::extract(opcode));
359	>	execute_native_op(NATIVE_OP_field::extract(opcode));
360		if (FN_field::test(opcode))
361		pc() = lr();
362		else
#	Line 268 | Line 371 | void sheepshaver_cpu::execute_sheep(uint
371		}
372
373		// Compile one instruction
374	<	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
374	>	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
375		{
376		#if PPC_ENABLE_JIT
377		const instr_info_t *ii = cg_context.instr_info;
378		if (ii->mnemo != PPC_I(SHEEP))
379	<	return false;
379	>	return COMPILE_FAILURE;
380
381	<	bool compiled = false;
381	>	int status = COMPILE_FAILURE;
382		powerpc_dyngen & dg = cg_context.codegen;
383		uint32 opcode = cg_context.opcode;
384
385		switch (opcode & 0x3f) {
386		case 0:         // EMUL_RETURN
387		dg.gen_invoke(QuitEmulator);
388	<	compiled = true;
388	>	status = COMPILE_CODE_OK;
389		break;
390
391		case 1:         // EXEC_RETURN
392		dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
393	<	compiled = true;
393	>	// Don't check for pending interrupts, we do know we have to
394	>	// get out of this block ASAP
395	>	dg.gen_exec_return();
396	>	status = COMPILE_EPILOGUE_OK;
397		break;
398
399		case 2: {       // EXEC_NATIVE
400		uint32 selector = NATIVE_OP_field::extract(opcode);
401		switch (selector) {
402	+	#if !PPC_REENTRANT_JIT
403	+	// Filter out functions that may invoke Execute68k() or
404	+	// CallMacOS(), this would break reentrancy as they could
405	+	// invalidate the translation cache and even overwrite
406	+	// continuation code when we are done with them.
407		case NATIVE_PATCH_NAME_REGISTRY:
408		dg.gen_invoke(DoPatchNameRegistry);
409	<	compiled = true;
409	>	status = COMPILE_CODE_OK;
410		break;
411		case NATIVE_VIDEO_INSTALL_ACCEL:
412		dg.gen_invoke(VideoInstallAccel);
413	<	compiled = true;
413	>	status = COMPILE_CODE_OK;
414		break;
415		case NATIVE_VIDEO_VBL:
416		dg.gen_invoke(VideoVBL);
417	<	compiled = true;
417	>	status = COMPILE_CODE_OK;
418		break;
419		case NATIVE_GET_RESOURCE:
420		case NATIVE_GET_1_RESOURCE:
#	Line 321 | Line 432 | bool sheepshaver_cpu::compile1(codegen_c
432		typedef void (*func_t)(dyngen_cpu_base, uint32);
433		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
434		dg.gen_invoke_CPU_im(func, old_get_resource);
435	<	compiled = true;
435	>	status = COMPILE_CODE_OK;
436		break;
437		}
438	+	case NATIVE_CHECK_LOAD_INVOC:
439	+	dg.gen_load_T0_GPR(3);
440	+	dg.gen_load_T1_GPR(4);
441	+	dg.gen_se_16_32_T1();
442	+	dg.gen_load_T2_GPR(5);
443	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
444	+	status = COMPILE_CODE_OK;
445	+	break;
446	+	#endif
447		case NATIVE_DISABLE_INTERRUPT:
448		dg.gen_invoke(DisableInterrupt);
449	<	compiled = true;
449	>	status = COMPILE_CODE_OK;
450		break;
451		case NATIVE_ENABLE_INTERRUPT:
452		dg.gen_invoke(EnableInterrupt);
453	<	compiled = true;
453	>	status = COMPILE_CODE_OK;
454		break;
455	<	case NATIVE_CHECK_LOAD_INVOC:
455	>	case NATIVE_BITBLT:
456		dg.gen_load_T0_GPR(3);
457	<	dg.gen_load_T1_GPR(4);
458	<	dg.gen_se_16_32_T1();
459	<	dg.gen_load_T2_GPR(5);
460	<	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
461	<	compiled = true;
457	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
458	>	status = COMPILE_CODE_OK;
459	>	break;
460	>	case NATIVE_INVRECT:
461	>	dg.gen_load_T0_GPR(3);
462	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
463	>	status = COMPILE_CODE_OK;
464	>	break;
465	>	case NATIVE_FILLRECT:
466	>	dg.gen_load_T0_GPR(3);
467	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
468	>	status = COMPILE_CODE_OK;
469		break;
470		}
471	+	// Could we fully translate this NativeOp?
472		if (FN_field::test(opcode)) {
473	<	if (compiled) {
473	>	if (status != COMPILE_FAILURE) {
474		dg.gen_load_A0_LR();
475		dg.gen_set_PC_A0();
476		}
477		cg_context.done_compile = true;
478	+	break;
479		}
480	<	else
480	>	else if (status != COMPILE_FAILURE) {
481		cg_context.done_compile = false;
482	+	break;
483	+	}
484	+	#if PPC_REENTRANT_JIT
485	+	// Try to execute NativeOp trampoline
486	+	dg.gen_set_PC_im(cg_context.pc + 4);
487	+	dg.gen_mov_32_T0_im(selector);
488	+	dg.gen_jmp(native_op_trampoline);
489	+	cg_context.done_compile = true;
490	+	status = COMPILE_EPILOGUE_OK;
491	+	break;
492	+	#endif
493	+	// Invoke NativeOp handler
494	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
495	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
496	+	dg.gen_invoke_CPU_im(func, selector);
497	+	cg_context.done_compile = false;
498	+	status = COMPILE_CODE_OK;
499		break;
500		}
501
502		default: {      // EMUL_OP
503	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
504	+	#if ENABLE_NATIVE_EMUL_OP
505	+	typedef void (*emul_op_func_t)(dyngen_cpu_base);
506	+	emul_op_func_t emul_op_func = 0;
507	+	switch (emul_op) {
508	+	case OP_MICROSECONDS:
509	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
510	+	break;
511	+	case OP_IDLE_TIME:
512	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
513	+	break;
514	+	case OP_IDLE_TIME_2:
515	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
516	+	break;
517	+	}
518	+	if (emul_op_func) {
519	+	dg.gen_invoke_CPU(emul_op_func);
520	+	cg_context.done_compile = false;
521	+	status = COMPILE_CODE_OK;
522	+	break;
523	+	}
524	+	#endif
525	+	#if PPC_REENTRANT_JIT
526	+	// Try to execute EmulOp trampoline
527	+	dg.gen_set_PC_im(cg_context.pc + 4);
528	+	dg.gen_mov_32_T0_im(emul_op);
529	+	dg.gen_jmp(emul_op_trampoline);
530	+	cg_context.done_compile = true;
531	+	status = COMPILE_EPILOGUE_OK;
532	+	break;
533	+	#endif
534	+	// Invoke EmulOp handler
535		typedef void (*func_t)(dyngen_cpu_base, uint32);
536		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
537	<	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
537	>	dg.gen_invoke_CPU_im(func, emul_op);
538		cg_context.done_compile = false;
539	<	compiled = true;
539	>	status = COMPILE_CODE_OK;
540		break;
541		}
542		}
543	<	return compiled;
543	>	return status;
544	>	#endif
545	>	return COMPILE_FAILURE;
546	>	}
547	>
548	>	// CPU context to preserve on interrupt
549	>	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
550	>	{
551	>	#if SAFE_INTERRUPT_PPC >= 2
552	>	cpu = _cpu;
553	>	where = _where;
554	>
555	>	// Save interrupt context
556	>	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
557	>	pc = cpu->pc();
558	>	lr = cpu->lr();
559	>	ctr = cpu->ctr();
560	>	cr = cpu->get_cr();
561	>	xer = cpu->get_xer();
562	>	#endif
563	>	}
564	>
565	>	sheepshaver_cpu::interrupt_context::~interrupt_context()
566	>	{
567	>	#if SAFE_INTERRUPT_PPC >= 2
568	>	// Check whether CPU context was preserved by interrupt
569	>	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
570	>	printf("FATAL: %s: interrupt clobbers registers\n", where);
571	>	for (int i = 0; i < 32; i++)
572	>	if (gpr[i] != cpu->gpr(i))
573	>	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
574	>	}
575	>	if (pc != cpu->pc())
576	>	printf("FATAL: %s: interrupt clobbers PC\n", where);
577	>	if (lr != cpu->lr())
578	>	printf("FATAL: %s: interrupt clobbers LR\n", where);
579	>	if (ctr != cpu->ctr())
580	>	printf("FATAL: %s: interrupt clobbers CTR\n", where);
581	>	if (cr != cpu->get_cr())
582	>	printf("FATAL: %s: interrupt clobbers CR\n", where);
583	>	if (xer != cpu->get_xer())
584	>	printf("FATAL: %s: interrupt clobbers XER\n", where);
585		#endif
367	–	return false;
586		}
587
588		// Handle MacOS interrupt
#	Line 375 | Line 593 | void sheepshaver_cpu::interrupt(uint32 e
593		const clock_t interrupt_start = clock();
594		#endif
595
596	<	#if !MULTICORE_CPU
596	>	#if SAFE_INTERRUPT_PPC
597	>	static int depth = 0;
598	>	if (depth != 0)
599	>	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
600	>	depth++;
601	>	#endif
602	>
603		// Save program counters and branch registers
604		uint32 saved_pc = pc();
605		uint32 saved_lr = lr();
606		uint32 saved_ctr= ctr();
607		uint32 saved_sp = gpr(1);
384	–	#endif
608
609		// Initialize stack pointer to SheepShaver alternate stack base
610		gpr(1) = SignalStackBase() - 64;
#	Line 421 | Line 644 | void sheepshaver_cpu::interrupt(uint32 e
644		// Enter nanokernel
645		execute(entry);
646
424	–	#if !MULTICORE_CPU
647		// Restore program counters and branch registers
648		pc() = saved_pc;
649		lr() = saved_lr;
650		ctr()= saved_ctr;
651		gpr(1) = saved_sp;
430	–	#endif
652
653		#if EMUL_TIME_STATS
654		interrupt_time += (clock() - interrupt_start);
655		#endif
656	+
657	+	#if SAFE_INTERRUPT_PPC
658	+	depth--;
659	+	#endif
660		}
661
662		// Execute 68k routine
#	Line 625 | Line 850 | inline void sheepshaver_cpu::get_resourc
850		*              SheepShaver CPU engine interface
851		**/
852
853	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
854	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
630	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
853	>	// PowerPC CPU emulator
854	>	static sheepshaver_cpu *ppc_cpu = NULL;
855
856		void FlushCodeCache(uintptr start, uintptr end)
857		{
858		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
859	<	main_cpu->invalidate_cache_range(start, end);
636	<	#if MULTICORE_CPU
637	<	interrupt_cpu->invalidate_cache_range(start, end);
638	<	#endif
639	<	}
640	<
641	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
642	<	{
643	<	#if MULTICORE_CPU
644	<	current_cpu = new_cpu;
645	<	#endif
646	<	}
647	<
648	<	static inline void cpu_pop()
649	<	{
650	<	#if MULTICORE_CPU
651	<	current_cpu = main_cpu;
652	<	#endif
859	>	ppc_cpu->invalidate_cache_range(start, end);
860		}
861
862		// Dump PPC registers
863		static void dump_registers(void)
864		{
865	<	current_cpu->dump_registers();
865	>	ppc_cpu->dump_registers();
866		}
867
868		// Dump log
869		static void dump_log(void)
870		{
871	<	current_cpu->dump_log();
871	>	ppc_cpu->dump_log();
872		}
873
874		/*
#	Line 684 | Line 891 | static sigsegv_return_t sigsegv_handler(
891		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
892
893		// Get program counter of target CPU
894	<	sheepshaver_cpu * const cpu = current_cpu;
894	>	sheepshaver_cpu * const cpu = ppc_cpu;
895		const uint32 pc = cpu->pc();
896
897		// Fault in Mac ROM or RAM?
#	Line 709 | Line 916 | static sigsegv_return_t sigsegv_handler(
916		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
917		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
918
919	+	// Ignore writes to the zero page
920	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
921	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
922	+
923		// Ignore all other faults, if requested
924		if (PrefsFindBool("ignoresegv"))
925		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
#	Line 720 | Line 931 | static sigsegv_return_t sigsegv_handler(
931		printf("SIGSEGV\n");
932		printf("  pc %p\n", fault_instruction);
933		printf("  ea %p\n", fault_address);
723	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
934		dump_registers();
935	<	current_cpu->dump_log();
935	>	ppc_cpu->dump_log();
936		enter_mon();
937		QuitEmulator();
938
#	Line 732 | Line 942 | static sigsegv_return_t sigsegv_handler(
942		void init_emul_ppc(void)
943		{
944		// Initialize main CPU emulator
945	<	main_cpu = new sheepshaver_cpu();
946	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
947	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
945	>	ppc_cpu = new sheepshaver_cpu();
946	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
947	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
948		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
949
740	–	#if MULTICORE_CPU
741	–	// Initialize alternate CPU emulator to handle interrupts
742	–	interrupt_cpu = new sheepshaver_cpu();
743	–	#endif
744	–
950		// Install the handler for SIGSEGV
951		sigsegv_install_handler(sigsegv_handler);
952
#	Line 786 | Line 991 | void exit_emul_ppc(void)
991		printf("\n");
992		#endif
993
994	<	delete main_cpu;
995	<	#if MULTICORE_CPU
996	<	delete interrupt_cpu;
997	<	#endif
994	>	delete ppc_cpu;
995	>	}
996	>
997	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
998	>	// Initialize EmulOp trampolines
999	>	void init_emul_op_trampolines(basic_dyngen & dg)
1000	>	{
1001	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
1002	>	func_t func;
1003	>
1004	>	// EmulOp
1005	>	emul_op_trampoline = dg.gen_start();
1006	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
1007	>	dg.gen_invoke_CPU_T0(func);
1008	>	dg.gen_exec_return();
1009	>	dg.gen_end();
1010	>
1011	>	// NativeOp
1012	>	native_op_trampoline = dg.gen_start();
1013	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
1014	>	dg.gen_invoke_CPU_T0(func);
1015	>	dg.gen_exec_return();
1016	>	dg.gen_end();
1017	>
1018	>	D(bug("EmulOp trampoline:   %p\n", emul_op_trampoline));
1019	>	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
1020		}
1021	+	#endif
1022
1023		/*
1024		*  Emulation loop
#	Line 798 | Line 1026 | void exit_emul_ppc(void)
1026
1027		void emul_ppc(uint32 entry)
1028		{
801	–	current_cpu = main_cpu;
1029		#if 0
1030	<	current_cpu->start_log();
1030	>	ppc_cpu->start_log();
1031		#endif
1032		// start emulation loop and enable code translation or caching
1033	<	current_cpu->execute(entry);
1033	>	ppc_cpu->execute(entry);
1034		}
1035
1036		/*
1037		*  Handle PowerPC interrupt
1038		*/
1039
813	–	#if ASYNC_IRQ
814	–	void HandleInterrupt(void)
815	–	{
816	–	main_cpu->handle_interrupt();
817	–	}
818	–	#else
1040		void TriggerInterrupt(void)
1041		{
1042		#if 0
1043		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
1044		#else
1045		// Trigger interrupt to main cpu only
1046	<	if (main_cpu)
1047	<	main_cpu->trigger_interrupt();
1046	>	if (ppc_cpu)
1047	>	ppc_cpu->trigger_interrupt();
1048		#endif
1049		}
829	–	#endif
1050
1051		void sheepshaver_cpu::handle_interrupt(void)
1052		{
#	Line 838 | Line 1058 | void sheepshaver_cpu::handle_interrupt(v
1058		if (InterruptFlags == 0)
1059		return;
1060
1061	+	// Current interrupt nest level
1062	+	static int interrupt_depth = 0;
1063	+	++interrupt_depth;
1064	+
1065		// Disable MacOS stack sniffer
1066		WriteMacInt32(0x110, 0);
1067
#	Line 845 | Line 1069 | void sheepshaver_cpu::handle_interrupt(v
1069		switch (ReadMacInt32(XLM_RUN_MODE)) {
1070		case MODE_68K:
1071		// 68k emulator active, trigger 68k interrupt level 1
848	–	assert(current_cpu == main_cpu);
1072		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1073		set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
1074		break;
#	Line 853 | Line 1076 | void sheepshaver_cpu::handle_interrupt(v
1076		#if INTERRUPTS_IN_NATIVE_MODE
1077		case MODE_NATIVE:
1078		// 68k emulator inactive, in nanokernel?
1079	<	assert(current_cpu == main_cpu);
1080	<	if (gpr(1) != KernelDataAddr) {
1079	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1080	>	interrupt_context ctx(this, "PowerPC mode");
1081	>
1082		// Prepare for 68k interrupt level 1
1083		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1084		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 863 | Line 1087 | void sheepshaver_cpu::handle_interrupt(v
1087
1088		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1089		DisableInterrupt();
866	–	cpu_push(interrupt_cpu);
1090		if (ROMType == ROMTYPE_NEWWORLD)
1091	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
1091	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1092		else
1093	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
871	<	cpu_pop();
1093	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1094		}
1095		break;
1096		#endif
#	Line 877 | Line 1099 | void sheepshaver_cpu::handle_interrupt(v
1099		case MODE_EMUL_OP:
1100		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1101		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1102	+	interrupt_context ctx(this, "68k mode");
1103		#if 1
1104		// Execute full 68k interrupt routine
1105		M68kRegisters r;
#	Line 906 | Line 1129 | void sheepshaver_cpu::handle_interrupt(v
1129		break;
1130		#endif
1131		}
1132	+
1133	+	// We are done with this interrupt
1134	+	--interrupt_depth;
1135		}
1136
1137		static void get_resource(void);
#	Line 914 | Line 1140 | static void get_ind_resource(void);
1140		static void get_1_ind_resource(void);
1141		static void r_get_resource(void);
1142
1143	<	#define GPR(REG) current_cpu->gpr(REG)
1144	<
919	<	static void NativeOp(int selector)
1143	>	// Execute NATIVE_OP routine
1144	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1145		{
1146		#if EMUL_TIME_STATS
1147		native_exec_count++;
#	Line 934 | Line 1159 | static void NativeOp(int selector)
1159		VideoVBL();
1160		break;
1161		case NATIVE_VIDEO_DO_DRIVER_IO:
1162	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
1163	<	(void *)GPR(5), GPR(6), GPR(7));
1162	>	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1163	>	(void *)gpr(5), gpr(6), gpr(7));
1164		break;
1165		#ifdef WORDS_BIGENDIAN
1166		case NATIVE_ETHER_IRQ:
1167		EtherIRQ();
1168		break;
1169		case NATIVE_ETHER_INIT:
1170	<	GPR(3) = InitStreamModule((void *)GPR(3));
1170	>	gpr(3) = InitStreamModule((void *)gpr(3));
1171		break;
1172		case NATIVE_ETHER_TERM:
1173		TerminateStreamModule();
1174		break;
1175		case NATIVE_ETHER_OPEN:
1176	<	GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1176	>	gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1177		break;
1178		case NATIVE_ETHER_CLOSE:
1179	<	GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5));
1179	>	gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5));
1180		break;
1181		case NATIVE_ETHER_WPUT:
1182	<	GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4));
1182	>	gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4));
1183		break;
1184		case NATIVE_ETHER_RSRV:
1185	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1185	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1186		break;
1187		#else
1188		case NATIVE_ETHER_INIT:
1189		// FIXME: needs more complicated thunks
1190	<	GPR(3) = false;
1190	>	gpr(3) = false;
1191		break;
1192		#endif
1193	+	case NATIVE_SYNC_HOOK:
1194	+	gpr(3) = NQD_sync_hook(gpr(3));
1195	+	break;
1196	+	case NATIVE_BITBLT_HOOK:
1197	+	gpr(3) = NQD_bitblt_hook(gpr(3));
1198	+	break;
1199	+	case NATIVE_BITBLT:
1200	+	NQD_bitblt(gpr(3));
1201	+	break;
1202	+	case NATIVE_FILLRECT_HOOK:
1203	+	gpr(3) = NQD_fillrect_hook(gpr(3));
1204	+	break;
1205	+	case NATIVE_INVRECT:
1206	+	NQD_invrect(gpr(3));
1207	+	break;
1208	+	case NATIVE_FILLRECT:
1209	+	NQD_fillrect(gpr(3));
1210	+	break;
1211		case NATIVE_SERIAL_NOTHING:
1212		case NATIVE_SERIAL_OPEN:
1213		case NATIVE_SERIAL_PRIME_IN:
#	Line 982 | Line 1225 | static void NativeOp(int selector)
1225		SerialStatus,
1226		SerialClose
1227		};
1228	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1228	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1229		break;
1230		}
1231		case NATIVE_GET_RESOURCE:
#	Line 992 | Line 1235 | static void NativeOp(int selector)
1235		case NATIVE_R_GET_RESOURCE: {
1236		typedef void (*GetResourceCallback)(void);
1237		static const GetResourceCallback get_resource_callbacks[] = {
1238	<	get_resource,
1239	<	get_1_resource,
1240	<	get_ind_resource,
1241	<	get_1_ind_resource,
1242	<	r_get_resource
1238	>	::get_resource,
1239	>	::get_1_resource,
1240	>	::get_ind_resource,
1241	>	::get_1_ind_resource,
1242	>	::r_get_resource
1243		};
1244		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1245		break;
#	Line 1008 | Line 1251 | static void NativeOp(int selector)
1251		EnableInterrupt();
1252		break;
1253		case NATIVE_MAKE_EXECUTABLE:
1254	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1254	>	MakeExecutable(0, (void *)gpr(4), gpr(5));
1255		break;
1256		case NATIVE_CHECK_LOAD_INVOC:
1257	<	check_load_invoc(GPR(3), GPR(4), GPR(5));
1257	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1258		break;
1259		default:
1260		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 1032 | Line 1275 | static void NativeOp(int selector)
1275
1276		void Execute68k(uint32 pc, M68kRegisters *r)
1277		{
1278	<	current_cpu->execute_68k(pc, r);
1278	>	ppc_cpu->execute_68k(pc, r);
1279		}
1280
1281		/*
#	Line 1055 | Line 1298 | void Execute68kTrap(uint16 trap, M68kReg
1298
1299		uint32 call_macos(uint32 tvect)
1300		{
1301	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1301	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1302		}
1303
1304		uint32 call_macos1(uint32 tvect, uint32 arg1)
1305		{
1306		const uint32 args[] = { arg1 };
1307	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1307	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1308		}
1309
1310		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1311		{
1312		const uint32 args[] = { arg1, arg2 };
1313	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1313	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1314		}
1315
1316		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1317		{
1318		const uint32 args[] = { arg1, arg2, arg3 };
1319	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1319	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1320		}
1321
1322		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1323		{
1324		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1325	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1325	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1326		}
1327
1328		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1329		{
1330		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1331	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1331	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1332		}
1333
1334		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1335		{
1336		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1337	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1337	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1338		}
1339
1340		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1341		{
1342		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1343	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1343	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1344		}
1345
1346		/*
#	Line 1106 | Line 1349 | uint32 call_macos7(uint32 tvect, uint32
1349
1350		void get_resource(void)
1351		{
1352	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1352	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1353		}
1354
1355		void get_1_resource(void)
1356		{
1357	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1357	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1358		}
1359
1360		void get_ind_resource(void)
1361		{
1362	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1362	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1363		}
1364
1365		void get_1_ind_resource(void)
1366		{
1367	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1367	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1368		}
1369
1370		void r_get_resource(void)
1371		{
1372	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1372	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1373		}

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