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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp
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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.27 by gbeauche, 2004-02-15T17:17:36Z vs.
Revision 1.36 by gbeauche, 2004-05-12T15:54:23Z

# Line 40 | Line 40
40   #include "ether.h"
41  
42   #include <stdio.h>
43 + #include <stdlib.h>
44  
45   #if ENABLE_MON
46   #include "mon.h"
# Line 85 | Line 86 | const uint32 POWERPC_EXEC_RETURN = POWER
86   // Enable multicore (main/interrupts) cpu emulation?
87   #define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
88  
89 + // Enable interrupt routine safety checks?
90 + #define SAFE_INTERRUPT_PPC 1
91 +
92   // Enable Execute68k() safety checks?
93   #define SAFE_EXEC_68K 1
94  
# Line 158 | Line 162 | public:
162          void interrupt(uint32 entry);
163          void handle_interrupt();
164  
161 –        // Lazy memory allocator (one item at a time)
162 –        void *operator new(size_t size)
163 –                { return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
164 –        void operator delete(void *p)
165 –                { allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
166 –        // FIXME: really make surre array allocation fail at link time?
167 –        void *operator new[](size_t);
168 –        void operator delete[](void *p);
169 –
165          // Make sure the SIGSEGV handler can access CPU registers
166          friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
167   };
168  
169 < lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
169 > // Memory allocator returning areas aligned on 16-byte boundaries
170 > void *operator new(size_t size)
171 > {
172 >        void *p;
173 >
174 > #if defined(HAVE_POSIX_MEMALIGN)
175 >        if (posix_memalign(&p, 16, size) != 0)
176 >                throw std::bad_alloc();
177 > #elif defined(HAVE_MEMALIGN)
178 >        p = memalign(16, size);
179 > #elif defined(HAVE_VALLOC)
180 >        p = valloc(size); // page-aligned!
181 > #else
182 >        /* XXX: handle padding ourselves */
183 >        p = malloc(size);
184 > #endif
185 >
186 >        return p;
187 > }
188 >
189 > void operator delete(void *p)
190 > {
191 > #if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
192 > #if defined(__GLIBC__)
193 >        // this is known to work only with GNU libc
194 >        free(p);
195 > #endif
196 > #else
197 >        free(p);
198 > #endif
199 > }
200  
201   sheepshaver_cpu::sheepshaver_cpu()
202          : powerpc_cpu(enable_jit_p())
# Line 203 | Line 228 | void sheepshaver_cpu::init_decoder()
228   static void NativeOp(int selector);
229  
230   /*              NativeOp instruction format:
231 <                +------------+--------------------------+--+----------+------------+
232 <                |      6     |                          |FN|    OP    |      2     |
233 <                +------------+--------------------------+--+----------+------------+
234 <                 0         5 |6                       19 20 21      25 26        31
231 >                +------------+-------------------------+--+-----------+------------+
232 >                |      6     |                         |FN|    OP     |      2     |
233 >                +------------+-------------------------+--+-----------+------------+
234 >                 0         5 |6                      18 19 20      25 26        31
235   */
236  
237 < typedef bit_field< 20, 20 > FN_field;
238 < typedef bit_field< 21, 25 > NATIVE_OP_field;
237 > typedef bit_field< 19, 19 > FN_field;
238 > typedef bit_field< 20, 25 > NATIVE_OP_field;
239   typedef bit_field< 26, 31 > EMUL_OP_field;
240  
241   // Execute EMUL_OP routine
# Line 340 | Line 365 | bool sheepshaver_cpu::compile1(codegen_c
365                          dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
366                          compiled = true;
367                          break;
368 +                case NATIVE_BITBLT:
369 +                        dg.gen_load_T0_GPR(3);
370 +                        dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
371 +                        compiled = true;
372 +                        break;
373 +                case NATIVE_INVRECT:
374 +                        dg.gen_load_T0_GPR(3);
375 +                        dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
376 +                        compiled = true;
377 +                        break;
378 +                case NATIVE_FILLRECT:
379 +                        dg.gen_load_T0_GPR(3);
380 +                        dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
381 +                        compiled = true;
382 +                        break;
383                  }
384                  if (FN_field::test(opcode)) {
385                          if (compiled) {
# Line 375 | Line 415 | void sheepshaver_cpu::interrupt(uint32 e
415          const clock_t interrupt_start = clock();
416   #endif
417  
418 + #if SAFE_INTERRUPT_PPC
419 +        static int depth = 0;
420 +        if (depth != 0)
421 +                printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
422 +        depth++;
423 + #endif
424 + #if SAFE_INTERRUPT_PPC >= 2
425 +        uint32 saved_regs[32];
426 +        memcpy(&saved_regs[0], &gpr(0), sizeof(saved_regs));
427 + #endif
428 +
429   #if !MULTICORE_CPU
430          // Save program counters and branch registers
431          uint32 saved_pc = pc();
# Line 432 | Line 483 | void sheepshaver_cpu::interrupt(uint32 e
483   #if EMUL_TIME_STATS
484          interrupt_time += (clock() - interrupt_start);
485   #endif
486 +
487 + #if SAFE_INTERRUPT_PPC >= 2
488 +        if (memcmp(&saved_regs[0], &gpr(0), sizeof(saved_regs)) != 0)
489 +                printf("FATAL: dirty PowerPC registers\n");
490 + #endif
491 + #if SAFE_INTERRUPT_PPC
492 +        depth--;
493 + #endif
494   }
495  
496   // Execute 68k routine
# Line 709 | Line 768 | static sigsegv_return_t sigsegv_handler(
768                  else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
769                          return SIGSEGV_RETURN_SKIP_INSTRUCTION;
770  
771 +                // Ignore writes to the zero page
772 +                else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
773 +                        return SIGSEGV_RETURN_SKIP_INSTRUCTION;
774 +
775                  // Ignore all other faults, if requested
776                  if (PrefsFindBool("ignoresegv"))
777                          return SIGSEGV_RETURN_SKIP_INSTRUCTION;
# Line 965 | Line 1028 | static void NativeOp(int selector)
1028                  GPR(3) = false;
1029                  break;
1030   #endif
1031 +        case NATIVE_SYNC_HOOK:
1032 +                GPR(3) = NQD_sync_hook(GPR(3));
1033 +                break;
1034 +        case NATIVE_BITBLT_HOOK:
1035 +                GPR(3) = NQD_bitblt_hook(GPR(3));
1036 +                break;
1037 +        case NATIVE_BITBLT:
1038 +                NQD_bitblt(GPR(3));
1039 +                break;
1040 +        case NATIVE_FILLRECT_HOOK:
1041 +                GPR(3) = NQD_fillrect_hook(GPR(3));
1042 +                break;
1043 +        case NATIVE_INVRECT:
1044 +                NQD_invrect(GPR(3));
1045 +                break;
1046 +        case NATIVE_FILLRECT:
1047 +                NQD_fillrect(GPR(3));
1048 +                break;
1049          case NATIVE_SERIAL_NOTHING:
1050          case NATIVE_SERIAL_OPEN:
1051          case NATIVE_SERIAL_PRIME_IN:

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