[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.1 by gbeauche, 2003-09-07T14:25:01Z vs.
Revision 1.27 by gbeauche, 2004-02-15T17:17:36Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 21 \| Line 21
21		#include "sysdeps.h"
22		#include "cpu_emulation.h"
23		#include "main.h"
24	+	#include "prefs.h"
25		#include "xlowmem.h"
26		#include "emul_op.h"
27		#include "rom_patches.h"
#	Line 29 \| Line 30
30		#include "sigsegv.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41
42		#include <stdio.h>
43
#	Line 42 \| Line 46
46		#include "mon_disass.h"
47		#endif
48
49	<	#define DEBUG 1
49	>	#define DEBUG 0
50		#include "debug.h"
51
52	+	// Emulation time statistics
53	+	#define EMUL_TIME_STATS 1
54	+
55	+	#if EMUL_TIME_STATS
56	+	static clock_t emul_start_time;
57	+	static uint32 interrupt_count = 0;
58	+	static clock_t interrupt_time = 0;
59	+	static uint32 exec68k_count = 0;
60	+	static clock_t exec68k_time = 0;
61	+	static uint32 native_exec_count = 0;
62	+	static clock_t native_exec_time = 0;
63	+	static uint32 macos_exec_count = 0;
64	+	static clock_t macos_exec_time = 0;
65	+	#endif
66	+
67		static void enter_mon(void)
68		{
69		// Start up mon in real-mode
#	Line 54 \| Line 73 \| static void enter_mon(void)
73		#endif
74		}
75
76	+	// From main_*.cpp
77	+	extern uintptr SignalStackBase();
78	+
79	+	// From rsrc_patches.cpp
80	+	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
81	+
82	+	// PowerPC EmulOp to exit from emulation looop
83	+	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
84	+
85	+	// Enable multicore (main/interrupts) cpu emulation?
86	+	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87	+
88		// Enable Execute68k() safety checks?
89		#define SAFE_EXEC_68K 1
90
#	Line 66 \| Line 97 \| static void enter_mon(void)
97		// Interrupts in native mode?
98		#define INTERRUPTS_IN_NATIVE_MODE 1
99
100	<	// 68k Emulator Data
101	<	struct EmulatorData {
71	<	uint32 v[0x400];
72	<	};
100	>	// Pointer to Kernel Data
101	>	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
102
103	<	// Kernel Data
104	<	struct KernelData {
76	<	uint32 v[0x400];
77	<	EmulatorData ed;
78	<	};
103	>	// SIGSEGV handler
104	>	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
105
106	<	// Pointer to Kernel Data
107	<	static KernelData * const kernel_data = (KernelData *)0x68ffe000;
106	>	// JIT Compiler enabled?
107	>	static inline bool enable_jit_p()
108	>	{
109	>	return PrefsFindBool("jit");
110	>	}
111
112
113		/**
114		* PowerPC emulator glue with special 'sheep' opcodes
115		**/
116
117	<	struct sheepshaver_exec_return { };
117	>	enum {
118	>	PPC_I(SHEEP) = PPC_I(MAX),
119	>	PPC_I(SHEEP_MAX)
120	>	};
121
122		class sheepshaver_cpu
123		: public powerpc_cpu
#	Line 95 \| Line 127 \| class sheepshaver_cpu
127
128		public:
129
130	<	sheepshaver_cpu()
131	<	: powerpc_cpu()
100	<	{ init_decoder(); }
101	<
102	<	// Stack pointer accessors
103	<	uint32 get_sp() const { return gpr(1); }
104	<	void set_sp(uint32 v) { gpr(1) = v; }
130	>	// Constructor
131	>	sheepshaver_cpu();
132
133	<	// Condition Register accessors
133	>	// CR & XER accessors
134		uint32 get_cr() const { return cr().get(); }
135		void set_cr(uint32 v) { cr().set(v); }
136	+	uint32 get_xer() const { return xer().get(); }
137	+	void set_xer(uint32 v) { xer().set(v); }
138
139	<	// Execution loop
140	<	void execute(uint32 pc);
139	>	// Execute EMUL_OP routine
140	>	void execute_emul_op(uint32 emul_op);
141
142		// Execute 68k routine
143		void execute_68k(uint32 entry, M68kRegisters *r);
144
145	+	// Execute ppc routine
146	+	void execute_ppc(uint32 entry);
147	+
148		// Execute MacOS/PPC code
149		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
150
151	+	// Compile one instruction
152	+	virtual bool compile1(codegen_context_t & cg_context);
153	+
154		// Resource manager thunk
155		void get_resource(uint32 old_get_resource);
156
157		// Handle MacOS interrupt
158	<	void interrupt(uint32 entry, uint32 sp);
158	>	void interrupt(uint32 entry);
159	>	void handle_interrupt();
160
161		// Lazy memory allocator (one item at a time)
162		void *operator new(size_t size)
#	Line 130 \| Line 166 \| public:
166		// FIXME: really make surre array allocation fail at link time?
167		void *operator new[](size_t);
168		void operator delete[](void *p);
169	+
170	+	// Make sure the SIGSEGV handler can access CPU registers
171	+	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
172		};
173
174		lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
175
176	<	void sheepshaver_cpu::init_decoder()
176	>	sheepshaver_cpu::sheepshaver_cpu()
177	>	: powerpc_cpu(enable_jit_p())
178		{
179	<	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
180	<	static bool initialized = false;
141	<	if (initialized)
142	<	return;
143	<	initialized = true;
144	<	#endif
179	>	init_decoder();
180	>	}
181
182	+	void sheepshaver_cpu::init_decoder()
183	+	{
184		static const instr_info_t sheep_ii_table[] = {
185		{ "sheep",
186	<	(execute_fn)&sheepshaver_cpu::execute_sheep,
186	>	(execute_pmf)&sheepshaver_cpu::execute_sheep,
187		NULL,
188	<	D_form, 6, 0, CFLOW_TRAP
188	>	PPC_I(SHEEP),
189	>	D_form, 6, 0, CFLOW_JUMP \| CFLOW_TRAP
190		}
191		};
192
#	Line 163 \| Line 202 \| void sheepshaver_cpu::init_decoder()
202		// Forward declaration for native opcode handler
203		static void NativeOp(int selector);
204
205	+	/* NativeOp instruction format:
206	+	+------------+--------------------------+--+----------+------------+
207	+	\| 6 \| \|FN\| OP \| 2 \|
208	+	+------------+--------------------------+--+----------+------------+
209	+	0 5 \|6 19 20 21 25 26 31
210	+	*/
211	+
212	+	typedef bit_field< 20, 20 > FN_field;
213	+	typedef bit_field< 21, 25 > NATIVE_OP_field;
214	+	typedef bit_field< 26, 31 > EMUL_OP_field;
215	+
216	+	// Execute EMUL_OP routine
217	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
218	+	{
219	+	M68kRegisters r68;
220	+	WriteMacInt32(XLM_68K_R25, gpr(25));
221	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
222	+	for (int i = 0; i < 8; i++)
223	+	r68.d[i] = gpr(8 + i);
224	+	for (int i = 0; i < 7; i++)
225	+	r68.a[i] = gpr(16 + i);
226	+	r68.a[7] = gpr(1);
227	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
228	+	uint32 saved_xer = get_xer();
229	+	EmulOp(&r68, gpr(24), emul_op);
230	+	set_cr(saved_cr);
231	+	set_xer(saved_xer);
232	+	for (int i = 0; i < 8; i++)
233	+	gpr(8 + i) = r68.d[i];
234	+	for (int i = 0; i < 7; i++)
235	+	gpr(16 + i) = r68.a[i];
236	+	gpr(1) = r68.a[7];
237	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
238	+	}
239	+
240		// Execute SheepShaver instruction
241		void sheepshaver_cpu::execute_sheep(uint32 opcode)
242		{
#	Line 173 \| Line 247 \| void sheepshaver_cpu::execute_sheep(uint
247		case 0: // EMUL_RETURN
248		QuitEmulator();
249		break;
250	<
250	>
251		case 1: // EXEC_RETURN
252	<	throw sheepshaver_exec_return();
252	>	spcflags().set(SPCFLAG_CPU_EXEC_RETURN);
253		break;
254
255		case 2: // EXEC_NATIVE
256	<	NativeOp((opcode >> 6) & 0x1f);
257	<	pc() = lr();
256	>	NativeOp(NATIVE_OP_field::extract(opcode));
257	>	if (FN_field::test(opcode))
258	>	pc() = lr();
259	>	else
260	>	pc() += 4;
261		break;
262
263	<	default: { // EMUL_OP
264	<	M68kRegisters r68;
188	<	WriteMacInt32(XLM_68K_R25, gpr(25));
189	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
190	<	for (int i = 0; i < 8; i++)
191	<	r68.d[i] = gpr(8 + i);
192	<	for (int i = 0; i < 7; i++)
193	<	r68.a[i] = gpr(16 + i);
194	<	r68.a[7] = gpr(1);
195	<	EmulOp(&r68, gpr(24), (opcode & 0x3f) - 3);
196	<	for (int i = 0; i < 8; i++)
197	<	gpr(8 + i) = r68.d[i];
198	<	for (int i = 0; i < 7; i++)
199	<	gpr(16 + i) = r68.a[i];
200	<	gpr(1) = r68.a[7];
201	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
263	>	default: // EMUL_OP
264	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
265		pc() += 4;
266		break;
267		}
205	–	}
268		}
269
270	<	// Execution loop
271	<	void sheepshaver_cpu::execute(uint32 entry)
270	>	// Compile one instruction
271	>	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
272		{
273	<	try {
274	<	pc() = entry;
275	<	powerpc_cpu::execute();
273	>	#if PPC_ENABLE_JIT
274	>	const instr_info_t *ii = cg_context.instr_info;
275	>	if (ii->mnemo != PPC_I(SHEEP))
276	>	return false;
277	>
278	>	bool compiled = false;
279	>	powerpc_dyngen & dg = cg_context.codegen;
280	>	uint32 opcode = cg_context.opcode;
281	>
282	>	switch (opcode & 0x3f) {
283	>	case 0: // EMUL_RETURN
284	>	dg.gen_invoke(QuitEmulator);
285	>	compiled = true;
286	>	break;
287	>
288	>	case 1: // EXEC_RETURN
289	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
290	>	compiled = true;
291	>	break;
292	>
293	>	case 2: { // EXEC_NATIVE
294	>	uint32 selector = NATIVE_OP_field::extract(opcode);
295	>	switch (selector) {
296	>	case NATIVE_PATCH_NAME_REGISTRY:
297	>	dg.gen_invoke(DoPatchNameRegistry);
298	>	compiled = true;
299	>	break;
300	>	case NATIVE_VIDEO_INSTALL_ACCEL:
301	>	dg.gen_invoke(VideoInstallAccel);
302	>	compiled = true;
303	>	break;
304	>	case NATIVE_VIDEO_VBL:
305	>	dg.gen_invoke(VideoVBL);
306	>	compiled = true;
307	>	break;
308	>	case NATIVE_GET_RESOURCE:
309	>	case NATIVE_GET_1_RESOURCE:
310	>	case NATIVE_GET_IND_RESOURCE:
311	>	case NATIVE_GET_1_IND_RESOURCE:
312	>	case NATIVE_R_GET_RESOURCE: {
313	>	static const uint32 get_resource_ptr[] = {
314	>	XLM_GET_RESOURCE,
315	>	XLM_GET_1_RESOURCE,
316	>	XLM_GET_IND_RESOURCE,
317	>	XLM_GET_1_IND_RESOURCE,
318	>	XLM_R_GET_RESOURCE
319	>	};
320	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
321	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
322	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
323	>	dg.gen_invoke_CPU_im(func, old_get_resource);
324	>	compiled = true;
325	>	break;
326	>	}
327	>	case NATIVE_DISABLE_INTERRUPT:
328	>	dg.gen_invoke(DisableInterrupt);
329	>	compiled = true;
330	>	break;
331	>	case NATIVE_ENABLE_INTERRUPT:
332	>	dg.gen_invoke(EnableInterrupt);
333	>	compiled = true;
334	>	break;
335	>	case NATIVE_CHECK_LOAD_INVOC:
336	>	dg.gen_load_T0_GPR(3);
337	>	dg.gen_load_T1_GPR(4);
338	>	dg.gen_se_16_32_T1();
339	>	dg.gen_load_T2_GPR(5);
340	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
341	>	compiled = true;
342	>	break;
343	>	}
344	>	if (FN_field::test(opcode)) {
345	>	if (compiled) {
346	>	dg.gen_load_A0_LR();
347	>	dg.gen_set_PC_A0();
348	>	}
349	>	cg_context.done_compile = true;
350	>	}
351	>	else
352	>	cg_context.done_compile = false;
353	>	break;
354		}
355	<	catch (sheepshaver_exec_return const &) {
356	<	// Nothing, simply return
355	>
356	>	default: { // EMUL_OP
357	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
358	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
359	>	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
360	>	cg_context.done_compile = false;
361	>	compiled = true;
362	>	break;
363		}
218	–	catch (...) {
219	–	printf("ERROR: execute() received an unknown exception!\n");
220	–	QuitEmulator();
364		}
365	+	return compiled;
366	+	#endif
367	+	return false;
368		}
369
370		// Handle MacOS interrupt
371	<	void sheepshaver_cpu::interrupt(uint32 entry, uint32 sp)
371	>	void sheepshaver_cpu::interrupt(uint32 entry)
372		{
373	<	// Create stack frame
374	<	gpr(1) = sp - 64;
373	>	#if EMUL_TIME_STATS
374	>	interrupt_count++;
375	>	const clock_t interrupt_start = clock();
376	>	#endif
377	>
378	>	#if !MULTICORE_CPU
379	>	// Save program counters and branch registers
380	>	uint32 saved_pc = pc();
381	>	uint32 saved_lr = lr();
382	>	uint32 saved_ctr= ctr();
383	>	uint32 saved_sp = gpr(1);
384	>	#endif
385	>
386	>	// Initialize stack pointer to SheepShaver alternate stack base
387	>	gpr(1) = SignalStackBase() - 64;
388
389		// Build trampoline to return from interrupt
390	<	uint32 trampoline[] = { POWERPC_EMUL_OP \| 1 };
390	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
391
392		// Prepare registers for nanokernel interrupt routine
393	<	kernel_data->v[0x004 >> 2] = gpr(1);
394	<	kernel_data->v[0x018 >> 2] = gpr(6);
393	>	kernel_data->v[0x004 >> 2] = htonl(gpr(1));
394	>	kernel_data->v[0x018 >> 2] = htonl(gpr(6));
395
396	<	gpr(6) = kernel_data->v[0x65c >> 2];
396	>	gpr(6) = ntohl(kernel_data->v[0x65c >> 2]);
397	>	assert(gpr(6) != 0);
398		WriteMacInt32(gpr(6) + 0x13c, gpr(7));
399		WriteMacInt32(gpr(6) + 0x144, gpr(8));
400		WriteMacInt32(gpr(6) + 0x14c, gpr(9));
#	Line 244 \| Line 404 \| void sheepshaver_cpu::interrupt(uint32 e
404		WriteMacInt32(gpr(6) + 0x16c, gpr(13));
405
406		gpr(1) = KernelDataAddr;
407	<	gpr(7) = kernel_data->v[0x660 >> 2];
407	>	gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
408		gpr(8) = 0;
409	<	gpr(10) = (uint32)trampoline;
410	<	gpr(12) = (uint32)trampoline;
411	<	gpr(13) = cr().get();
409	>	gpr(10) = trampoline.addr();
410	>	gpr(12) = trampoline.addr();
411	>	gpr(13) = get_cr();
412
413		// rlwimi. r7,r7,8,0,0
414		uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7));
#	Line 256 \| Line 416 \| void sheepshaver_cpu::interrupt(uint32 e
416		gpr(7) = result;
417
418		gpr(11) = 0xf072; // MSR (SRR1)
419	<	cr().set((gpr(11) & 0x0fff0000) \| (cr().get() & ~0x0fff0000));
419	>	cr().set((gpr(11) & 0x0fff0000) \| (get_cr() & ~0x0fff0000));
420
421		// Enter nanokernel
422		execute(entry);
423
424	<	// Cleanup stack
425	<	gpr(1) += 64;
424	>	#if !MULTICORE_CPU
425	>	// Restore program counters and branch registers
426	>	pc() = saved_pc;
427	>	lr() = saved_lr;
428	>	ctr()= saved_ctr;
429	>	gpr(1) = saved_sp;
430	>	#endif
431	>
432	>	#if EMUL_TIME_STATS
433	>	interrupt_time += (clock() - interrupt_start);
434	>	#endif
435		}
436
437		// Execute 68k routine
438		void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r)
439		{
440	+	#if EMUL_TIME_STATS
441	+	exec68k_count++;
442	+	const clock_t exec68k_start = clock();
443	+	#endif
444	+
445		#if SAFE_EXEC_68K
446		if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP)
447		printf("FATAL: Execute68k() not called from EMUL_OP mode\n");
#	Line 277 \| Line 451 \| void sheepshaver_cpu::execute_68k(uint32
451		uint32 saved_pc = pc();
452		uint32 saved_lr = lr();
453		uint32 saved_ctr= ctr();
454	+	uint32 saved_cr = get_cr();
455
456		// Create MacOS stack frame
457	+	// FIXME: make sure MacOS doesn't expect PPC registers to live on top
458		uint32 sp = gpr(1);
459	<	gpr(1) -= 56 + 194 + 188;
459	>	gpr(1) -= 56;
460		WriteMacInt32(gpr(1), sp);
461
462		// Save PowerPC registers
463	<	memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13));
463	>	uint32 saved_GPRs[19];
464	>	memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13));
465		#if SAVE_FP_EXEC_68K
466	<	memcpy(Mac2HostAddr(gpr(1)+56+194), &fpr(14), sizeof(double)(32-14));
466	>	double saved_FPRs[18];
467	>	memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14));
468		#endif
469
470		// Setup registers for 68k emulator
471	<	cr().set(0);
294	<	cr().set(2, 1); // Supervisor mode
471	>	cr().set(CR_SO_field<2>::mask()); // Supervisor mode
472		for (int i = 0; i < 8; i++) // d[0]..d[7]
473		gpr(8 + i) = r->d[i];
474		for (int i = 0; i < 7; i++) // a[0]..a[6]
#	Line 301 \| Line 478 \| void sheepshaver_cpu::execute_68k(uint32
478		gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR
479		gpr(26) = 0;
480		gpr(28) = 0; // VBR
481	<	gpr(29) = kernel_data->ed.v[0x74 >> 2]; // Pointer to opcode table
482	<	gpr(30) = kernel_data->ed.v[0x78 >> 2]; // Address of emulator
481	>	gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]); // Pointer to opcode table
482	>	gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]); // Address of emulator
483		gpr(31) = KernelDataAddr + 0x1000;
484
485		// Push return address (points to EXEC_RETURN opcode) on stack
#	Line 334 \| Line 511 \| void sheepshaver_cpu::execute_68k(uint32
511		r->a[i] = gpr(16 + i);
512
513		// Restore PowerPC registers
514	<	memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13));
514	>	memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13));
515		#if SAVE_FP_EXEC_68K
516	<	memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+194), sizeof(double)(32-14));
516	>	memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14));
517		#endif
518
519		// Cleanup stack
520	<	gpr(1) += 56 + 194 + 188;
520	>	gpr(1) += 56;
521
522		// Restore program counters and branch registers
523		pc() = saved_pc;
524		lr() = saved_lr;
525		ctr()= saved_ctr;
526	+	set_cr(saved_cr);
527	+
528	+	#if EMUL_TIME_STATS
529	+	exec68k_time += (clock() - exec68k_start);
530	+	#endif
531		}
532
533		// Call MacOS PPC code
534		uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args)
535		{
536	+	#if EMUL_TIME_STATS
537	+	macos_exec_count++;
538	+	const clock_t macos_exec_start = clock();
539	+	#endif
540	+
541		// Save program counters and branch registers
542		uint32 saved_pc = pc();
543		uint32 saved_lr = lr();
544		uint32 saved_ctr= ctr();
545
546		// Build trampoline with EXEC_RETURN
547	<	uint32 trampoline[] = { POWERPC_EMUL_OP \| 1 };
548	<	lr() = (uint32)trampoline;
547	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
548	>	lr() = trampoline.addr();
549
550		gpr(1) -= 64; // Create stack frame
551		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 389 \| Line 576 \| uint32 sheepshaver_cpu::execute_macos_co
576		lr() = saved_lr;
577		ctr()= saved_ctr;
578
579	+	#if EMUL_TIME_STATS
580	+	macos_exec_time += (clock() - macos_exec_start);
581	+	#endif
582	+
583		return retval;
584		}
585
586	+	// Execute ppc routine
587	+	inline void sheepshaver_cpu::execute_ppc(uint32 entry)
588	+	{
589	+	// Save branch registers
590	+	uint32 saved_lr = lr();
591	+
592	+	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
593	+	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
594	+	lr() = trampoline.addr();
595	+
596	+	execute(entry);
597	+
598	+	// Restore branch registers
599	+	lr() = saved_lr;
600	+	}
601	+
602		// Resource Manager thunk
603		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
604		{
605	<	printf("ERROR: get_resource() unimplemented\n");
606	<	QuitEmulator();
605	>	uint32 type = gpr(3);
606	>	int16 id = gpr(4);
607	>
608	>	// Create stack frame
609	>	gpr(1) -= 56;
610	>
611	>	// Call old routine
612	>	execute_ppc(old_get_resource);
613	>
614	>	// Call CheckLoad()
615	>	uint32 handle = gpr(3);
616	>	check_load_invoc(type, id, handle);
617	>	gpr(3) = handle;
618	>
619	>	// Cleanup stack
620	>	gpr(1) += 56;
621		}
622
623
#	Line 408 \| Line 629 \| *static sheepshaver_cpu main_cpu = NULL;**
629		static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
630		static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
631
632	+	void FlushCodeCache(uintptr start, uintptr end)
633	+	{
634	+	D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
635	+	main_cpu->invalidate_cache_range(start, end);
636	+	#if MULTICORE_CPU
637	+	interrupt_cpu->invalidate_cache_range(start, end);
638	+	#endif
639	+	}
640	+
641	+	static inline void cpu_push(sheepshaver_cpu *new_cpu)
642	+	{
643	+	#if MULTICORE_CPU
644	+	current_cpu = new_cpu;
645	+	#endif
646	+	}
647	+
648	+	static inline void cpu_pop()
649	+	{
650	+	#if MULTICORE_CPU
651	+	current_cpu = main_cpu;
652	+	#endif
653	+	}
654	+
655		// Dump PPC registers
656		static void dump_registers(void)
657		{
#	Line 424 \| Line 668 \| static void dump_log(void)
668		* Initialize CPU emulation
669		*/
670
671	<	static struct sigaction sigsegv_action;
428	<
429	<	#if defined(__powerpc__)
430	<	#include <sys/ucontext.h>
431	<	#endif
432	<
433	<	static void sigsegv_handler(int sig, siginfo_t sip, void scp)
671	>	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
672		{
435	–	const uintptr addr = (uintptr)sip->si_addr;
673		#if ENABLE_VOSF
674	<	// Handle screen fault.
675	<	extern bool Screen_fault_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction);
676	<	if (Screen_fault_handler((sigsegv_address_t)addr, SIGSEGV_INVALID_PC))
677	<	return;
674	>	// Handle screen fault
675	>	extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
676	>	if (Screen_fault_handler(fault_address, fault_instruction))
677	>	return SIGSEGV_RETURN_SUCCESS;
678		#endif
679	<	#if defined(__powerpc__)
680	<	if (addr >= ROM_BASE && addr < ROM_BASE + ROM_SIZE) {
681	<	printf("IGNORE write access to ROM at %08x\n", addr);
682	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
683	<	return;
684	<	}
685	<	if (addr >= 0xf3012000 && addr < 0xf3014000 && 0) {
686	<	printf("IGNORE write access to ROM at %08x\n", addr);
687	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
688	<	return;
679	>
680	>	const uintptr addr = (uintptr)fault_address;
681	>	#if HAVE_SIGSEGV_SKIP_INSTRUCTION
682	>	// Ignore writes to ROM
683	>	if ((addr - ROM_BASE) < ROM_SIZE)
684	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
685	>
686	>	// Get program counter of target CPU
687	>	sheepshaver_cpu * const cpu = current_cpu;
688	>	const uint32 pc = cpu->pc();
689	>
690	>	// Fault in Mac ROM or RAM?
691	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
692	>	if (mac_fault) {
693	>
694	>	// "VM settings" during MacOS 8 installation
695	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
696	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
697	>
698	>	// MacOS 8.5 installation
699	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
700	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
701	>
702	>	// MacOS 8 serial drivers on startup
703	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 \|\| cpu->gpr(8) == 0xf3012000))
704	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
705	>
706	>	// MacOS 8.1 serial drivers on startup
707	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
708	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
709	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
710	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
711	>
712	>	// Ignore all other faults, if requested
713	>	if (PrefsFindBool("ignoresegv"))
714	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
715		}
453	–	#endif
454	–	printf("Caught SIGSEGV at address %p\n", sip->si_addr);
455	–	printf("Native PC: %08x\n", (((ucontext_t *)scp)->uc_mcontext.regs)->nip);
456	–	printf("Current CPU: %s\n", current_cpu == main_cpu ? "main" : "interrupts");
457	–	#if 1
458	–	dump_registers();
716		#else
717	<	printf("Main CPU context\n");
461	<	main_cpu->dump_registers();
462	<	printf("Interrupts CPU context\n");
463	<	interrupt_cpu->dump_registers();
717	>	#error "FIXME: You don't have the capability to skip instruction within signal handlers"
718		#endif
719	+
720	+	printf("SIGSEGV\n");
721	+	printf(" pc %p\n", fault_instruction);
722	+	printf(" ea %p\n", fault_address);
723	+	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
724	+	dump_registers();
725		current_cpu->dump_log();
466	–	WriteMacInt32(XLM_IRQ_NEST, 1);
726		enter_mon();
727		QuitEmulator();
728	+
729	+	return SIGSEGV_RETURN_FAILURE;
730		}
731
732		void init_emul_ppc(void)
#	Line 473 \| Line 734 \| void init_emul_ppc(void)
734		// Initialize main CPU emulator
735		main_cpu = new sheepshaver_cpu();
736		main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
737	+	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
738		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
739
740	+	#if MULTICORE_CPU
741		// Initialize alternate CPU emulator to handle interrupts
742		interrupt_cpu = new sheepshaver_cpu();
743	+	#endif
744
745	<	// Install SIGSEGV handler
746	<	sigemptyset(&sigsegv_action.sa_mask);
483	<	sigsegv_action.sa_sigaction = sigsegv_handler;
484	<	sigsegv_action.sa_flags = SA_SIGINFO;
485	<	sigsegv_action.sa_restorer = NULL;
486	<	sigaction(SIGSEGV, &sigsegv_action, NULL);
745	>	// Install the handler for SIGSEGV
746	>	sigsegv_install_handler(sigsegv_handler);
747
748		#if ENABLE_MON
749		// Install "regs" command in cxmon
750		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
751		mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n");
752		#endif
753	+
754	+	#if EMUL_TIME_STATS
755	+	emul_start_time = clock();
756	+	#endif
757	+	}
758	+
759	+	/*
760	+	* Deinitialize emulation
761	+	*/
762	+
763	+	void exit_emul_ppc(void)
764	+	{
765	+	#if EMUL_TIME_STATS
766	+	clock_t emul_end_time = clock();
767	+
768	+	printf("### Statistics for SheepShaver emulation parts\n");
769	+	const clock_t emul_time = emul_end_time - emul_start_time;
770	+	printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
771	+	printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
772	+	(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
773	+
774	+	#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
775	+	printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
776	+	printf("Total " LABEL " time : %.1f sec (%.1f%%)\n", \
777	+	double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC), \
778	+	100.0 * double(VAR_PREFIX##_time) / double(emul_time)); \
779	+	} while (0)
780	+
781	+	PRINT_STATS("Execute68k[Trap] execution", exec68k);
782	+	PRINT_STATS("NativeOp execution", native_exec);
783	+	PRINT_STATS("MacOS routine execution", macos_exec);
784	+
785	+	#undef PRINT_STATS
786	+	printf("\n");
787	+	#endif
788	+
789	+	delete main_cpu;
790	+	#if MULTICORE_CPU
791	+	delete interrupt_cpu;
792	+	#endif
793		}
794
795		/*
#	Line 499 \| Line 799 \| void init_emul_ppc(void)
799		void emul_ppc(uint32 entry)
800		{
801		current_cpu = main_cpu;
802	+	#if 0
803		current_cpu->start_log();
804	+	#endif
805	+	// start emulation loop and enable code translation or caching
806		current_cpu->execute(entry);
807		}
808
#	Line 507 \| Line 810 \| void emul_ppc(uint32 entry)
810		* Handle PowerPC interrupt
811		*/
812
813	<	// Atomic operations
511	<	extern int atomic_add(int *var, int v);
512	<	extern int atomic_and(int *var, int v);
513	<	extern int atomic_or(int *var, int v);
514	<
813	>	#if ASYNC_IRQ
814		void HandleInterrupt(void)
815		{
816	+	main_cpu->handle_interrupt();
817	+	}
818	+	#else
819	+	void TriggerInterrupt(void)
820	+	{
821	+	#if 0
822	+	WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
823	+	#else
824	+	// Trigger interrupt to main cpu only
825	+	if (main_cpu)
826	+	main_cpu->trigger_interrupt();
827	+	#endif
828	+	}
829	+	#endif
830	+
831	+	void sheepshaver_cpu::handle_interrupt(void)
832	+	{
833		// Do nothing if interrupts are disabled
834	<	if (ReadMacInt32(XLM_IRQ_NEST) > 0 \|\| InterruptFlags == 0)
834	>	if ((int32 )XLM_IRQ_NEST > 0)
835		return;
836
837	<	// Do nothing if CPU objects are not initialized yet
838	<	if (current_cpu == NULL)
837	>	// Do nothing if there is no interrupt pending
838	>	if (InterruptFlags == 0)
839		return;
840
841		// Disable MacOS stack sniffer
#	Line 531 \| Line 847 \| void HandleInterrupt(void)
847		// 68k emulator active, trigger 68k interrupt level 1
848		assert(current_cpu == main_cpu);
849		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
850	<	main_cpu->set_cr(main_cpu->get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
850	>	set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
851		break;
852
853		#if INTERRUPTS_IN_NATIVE_MODE
854		case MODE_NATIVE:
855		// 68k emulator inactive, in nanokernel?
856		assert(current_cpu == main_cpu);
857	<	if (main_cpu->gpr(1) != KernelDataAddr) {
857	>	if (gpr(1) != KernelDataAddr) {
858		// Prepare for 68k interrupt level 1
859		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
860		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 546 \| Line 862 \| void HandleInterrupt(void)
862		\| tswap32(kernel_data->v[0x674 >> 2]));
863
864		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
865	<	atomic_add((int32 *)XLM_IRQ_NEST, htonl(1));
866	<	current_cpu = interrupt_cpu;
865	>	DisableInterrupt();
866	>	cpu_push(interrupt_cpu);
867		if (ROMType == ROMTYPE_NEWWORLD)
868	<	current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu->get_sp());
868	>	current_cpu->interrupt(ROM_BASE + 0x312b1c);
869		else
870	<	current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu->get_sp());
871	<	current_cpu = main_cpu;
870	>	current_cpu->interrupt(ROM_BASE + 0x312a3c);
871	>	cpu_pop();
872		}
873		break;
874		#endif
#	Line 566 \| Line 882 \| void HandleInterrupt(void)
882		M68kRegisters r;
883		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
884		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
885	<	static const uint16 proc[] = {
886	<	0x3f3c, 0x0000, // move.w #$0000,-(sp) (fake format word)
887	<	0x487a, 0x000a, // pea @1(pc) (return address)
888	<	0x40e7, // move sr,-(sp) (saved SR)
889	<	0x2078, 0x0064, // move.l $64,a0
890	<	0x4ed0, // jmp (a0)
891	<	M68K_RTS // @1
885	>	static const uint8 proc[] = {
886	>	0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
887	>	0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
888	>	0x40, 0xe7, // move sr,-(sp) (saved SR)
889	>	0x20, 0x78, 0x00, 0x064, // move.l $64,a0
890	>	0x4e, 0xd0, // jmp (a0)
891	>	M68K_RTS >> 8, M68K_RTS & 0xff // @1
892		};
893		Execute68k((uint32)proc, &r);
894		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
#	Line 582 \| Line 898 \| void HandleInterrupt(void)
898		if (InterruptFlags & INTFLAG_VIA) {
899		ClearInterruptFlag(INTFLAG_VIA);
900		ADBInterrupt();
901	<	ExecutePPC(VideoVBL);
901	>	ExecuteNative(NATIVE_VIDEO_VBL);
902		}
903		}
904		#endif
#	Line 592 \| Line 908 \| void HandleInterrupt(void)
908		}
909		}
910
595	–	/*
596	–	* Execute NATIVE_OP opcode (called by PowerPC emulator)
597	–	*/
598	–
599	–	#define POWERPC_NATIVE_OP(selector) \
600	–	{ tswap32(POWERPC_EMUL_OP \| 2 \| (((uint32)selector) << 6)) }
601	–
602	–	// FIXME: Make sure 32-bit relocations are used
603	–	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
604	–	POWERPC_NATIVE_OP(NATIVE_PATCH_NAME_REGISTRY),
605	–	POWERPC_NATIVE_OP(NATIVE_VIDEO_INSTALL_ACCEL),
606	–	POWERPC_NATIVE_OP(NATIVE_VIDEO_VBL),
607	–	POWERPC_NATIVE_OP(NATIVE_VIDEO_DO_DRIVER_IO),
608	–	POWERPC_NATIVE_OP(NATIVE_ETHER_IRQ),
609	–	POWERPC_NATIVE_OP(NATIVE_ETHER_INIT),
610	–	POWERPC_NATIVE_OP(NATIVE_ETHER_TERM),
611	–	POWERPC_NATIVE_OP(NATIVE_ETHER_OPEN),
612	–	POWERPC_NATIVE_OP(NATIVE_ETHER_CLOSE),
613	–	POWERPC_NATIVE_OP(NATIVE_ETHER_WPUT),
614	–	POWERPC_NATIVE_OP(NATIVE_ETHER_RSRV),
615	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_NOTHING),
616	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_OPEN),
617	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_PRIME_IN),
618	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_PRIME_OUT),
619	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_CONTROL),
620	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_STATUS),
621	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_CLOSE),
622	–	POWERPC_NATIVE_OP(NATIVE_GET_RESOURCE),
623	–	POWERPC_NATIVE_OP(NATIVE_GET_1_RESOURCE),
624	–	POWERPC_NATIVE_OP(NATIVE_GET_IND_RESOURCE),
625	–	POWERPC_NATIVE_OP(NATIVE_GET_1_IND_RESOURCE),
626	–	POWERPC_NATIVE_OP(NATIVE_R_GET_RESOURCE),
627	–	};
628	–
911		static void get_resource(void);
912		static void get_1_resource(void);
913		static void get_ind_resource(void);
#	Line 636 \| Line 918 \| static void r_get_resource(void);
918
919		static void NativeOp(int selector)
920		{
921	+	#if EMUL_TIME_STATS
922	+	native_exec_count++;
923	+	const clock_t native_exec_start = clock();
924	+	#endif
925	+
926		switch (selector) {
927		case NATIVE_PATCH_NAME_REGISTRY:
928		DoPatchNameRegistry();
#	Line 650 \| Line 937 \| static void NativeOp(int selector)
937		GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
938		(void *)GPR(5), GPR(6), GPR(7));
939		break;
940	<	case NATIVE_GET_RESOURCE:
941	<	get_resource();
940	>	#ifdef WORDS_BIGENDIAN
941	>	case NATIVE_ETHER_IRQ:
942	>	EtherIRQ();
943		break;
944	<	case NATIVE_GET_1_RESOURCE:
945	<	get_1_resource();
944	>	case NATIVE_ETHER_INIT:
945	>	GPR(3) = InitStreamModule((void *)GPR(3));
946		break;
947	<	case NATIVE_GET_IND_RESOURCE:
948	<	get_ind_resource();
947	>	case NATIVE_ETHER_TERM:
948	>	TerminateStreamModule();
949		break;
950	<	case NATIVE_GET_1_IND_RESOURCE:
951	<	get_1_ind_resource();
950	>	case NATIVE_ETHER_OPEN:
951	>	GPR(3) = ether_open((queue_t )GPR(3), (void )GPR(4), GPR(5), GPR(6), (void*)GPR(7));
952	>	break;
953	>	case NATIVE_ETHER_CLOSE:
954	>	GPR(3) = ether_close((queue_t )GPR(3), GPR(4), (void )GPR(5));
955	>	break;
956	>	case NATIVE_ETHER_WPUT:
957	>	GPR(3) = ether_wput((queue_t )GPR(3), (mblk_t )GPR(4));
958		break;
959	<	case NATIVE_R_GET_RESOURCE:
960	<	r_get_resource();
959	>	case NATIVE_ETHER_RSRV:
960	>	GPR(3) = ether_rsrv((queue_t *)GPR(3));
961		break;
962	+	#else
963	+	case NATIVE_ETHER_INIT:
964	+	// FIXME: needs more complicated thunks
965	+	GPR(3) = false;
966	+	break;
967	+	#endif
968		case NATIVE_SERIAL_NOTHING:
969		case NATIVE_SERIAL_OPEN:
970		case NATIVE_SERIAL_PRIME_IN:
#	Line 685 \| Line 985 \| static void NativeOp(int selector)
985		GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
986		break;
987		}
988	+	case NATIVE_GET_RESOURCE:
989	+	case NATIVE_GET_1_RESOURCE:
990	+	case NATIVE_GET_IND_RESOURCE:
991	+	case NATIVE_GET_1_IND_RESOURCE:
992	+	case NATIVE_R_GET_RESOURCE: {
993	+	typedef void (*GetResourceCallback)(void);
994	+	static const GetResourceCallback get_resource_callbacks[] = {
995	+	get_resource,
996	+	get_1_resource,
997	+	get_ind_resource,
998	+	get_1_ind_resource,
999	+	r_get_resource
1000	+	};
1001	+	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1002	+	break;
1003	+	}
1004	+	case NATIVE_DISABLE_INTERRUPT:
1005	+	DisableInterrupt();
1006	+	break;
1007	+	case NATIVE_ENABLE_INTERRUPT:
1008	+	EnableInterrupt();
1009	+	break;
1010	+	case NATIVE_MAKE_EXECUTABLE:
1011	+	MakeExecutable(0, (void *)GPR(4), GPR(5));
1012	+	break;
1013	+	case NATIVE_CHECK_LOAD_INVOC:
1014	+	check_load_invoc(GPR(3), GPR(4), GPR(5));
1015	+	break;
1016		default:
1017		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1018		QuitEmulator();
1019		break;
1020		}
693	–	}
1021
1022	<	/*
1023	<	* Execute native subroutine (LR must contain return address)
1024	<	*/
698	<
699	<	void ExecuteNative(int selector)
700	<	{
701	<	uint32 tvect[2];
702	<	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
703	<	tvect[1] = 0; // Fake TVECT
704	<	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
705	<	M68kRegisters r;
706	<	Execute68k((uint32)&desc, &r);
1022	>	#if EMUL_TIME_STATS
1023	>	native_exec_time += (clock() - native_exec_start);
1024	>	#endif
1025		}
1026
1027		/*
#	Line 724 \| Line 1042 \| void Execute68k(uint32 pc, M68kRegisters
1042
1043		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1044		{
1045	<	uint16 proc[2] = {trap, M68K_RTS};
1046	<	Execute68k((uint32)proc, r);
1045	>	SheepVar proc_var(4);
1046	>	uint32 proc = proc_var.addr();
1047	>	WriteMacInt16(proc, trap);
1048	>	WriteMacInt16(proc + 2, M68K_RTS);
1049	>	Execute68k(proc, r);
1050		}
1051
1052		/*
#	Line 780 \| Line 1101 \| uint32 call_macos7(uint32 tvect, uint32
1101		}
1102
1103		/*
783	–	* Atomic operations
784	–	*/
785	–
786	–	int atomic_add(int *var, int v)
787	–	{
788	–	int ret = *var;
789	–	*var += v;
790	–	return ret;
791	–	}
792	–
793	–	int atomic_and(int *var, int v)
794	–	{
795	–	int ret = *var;
796	–	*var &= v;
797	–	return ret;
798	–	}
799	–
800	–	int atomic_or(int *var, int v)
801	–	{
802	–	int ret = *var;
803	–	*var \|= v;
804	–	return ret;
805	–	}
806	–
807	–	/*
1104		* Resource Manager thunks
1105		*/
1106
811	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h);
812	–
1107		void get_resource(void)
1108		{
1109		current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));

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+Removed lines
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+Changed lines
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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.1 by gbeauche, 2003-09-07T14:25:01Z vs. Revision 1.27 by gbeauche, 2004-02-15T17:17:36Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.1 by gbeauche, 2003-09-07T14:25:01Z vs.
Revision 1.27 by gbeauche, 2004-02-15T17:17:36Z