| 31 |
|
#include "cpu/ppc/ppc-cpu.hpp" |
| 32 |
|
#include "cpu/ppc/ppc-operations.hpp" |
| 33 |
|
#include "cpu/ppc/ppc-instructions.hpp" |
| 34 |
+ |
#include "thunks.h" |
| 35 |
|
|
| 36 |
|
// Used for NativeOp trampolines |
| 37 |
|
#include "video.h" |
| 73 |
|
#endif |
| 74 |
|
} |
| 75 |
|
|
| 76 |
+ |
// PowerPC EmulOp to exit from emulation looop |
| 77 |
+ |
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
| 78 |
+ |
|
| 79 |
|
// Enable multicore (main/interrupts) cpu emulation? |
| 80 |
|
#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
| 81 |
|
|
| 268 |
|
#endif |
| 269 |
|
|
| 270 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
| 271 |
< |
gpr(1) = SheepStack1Base - 64; |
| 271 |
> |
SheepArray<64> stack_area; |
| 272 |
> |
gpr(1) = stack_area.addr(); |
| 273 |
|
|
| 274 |
|
// Build trampoline to return from interrupt |
| 275 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
| 275 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
| 276 |
|
|
| 277 |
|
// Prepare registers for nanokernel interrupt routine |
| 278 |
|
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
| 291 |
|
gpr(1) = KernelDataAddr; |
| 292 |
|
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
| 293 |
|
gpr(8) = 0; |
| 294 |
< |
gpr(10) = (uint32)trampoline; |
| 295 |
< |
gpr(12) = (uint32)trampoline; |
| 294 |
> |
gpr(10) = trampoline.addr(); |
| 295 |
> |
gpr(12) = trampoline.addr(); |
| 296 |
|
gpr(13) = get_cr(); |
| 297 |
|
|
| 298 |
|
// rlwimi. r7,r7,8,0,0 |
| 429 |
|
uint32 saved_ctr= ctr(); |
| 430 |
|
|
| 431 |
|
// Build trampoline with EXEC_RETURN |
| 432 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
| 433 |
< |
lr() = (uint32)trampoline; |
| 432 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
| 433 |
> |
lr() = trampoline.addr(); |
| 434 |
|
|
| 435 |
|
gpr(1) -= 64; // Create stack frame |
| 436 |
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
| 474 |
|
// Save branch registers |
| 475 |
|
uint32 saved_lr = lr(); |
| 476 |
|
|
| 477 |
< |
const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
| 478 |
< |
lr() = (uint32)trampoline; |
| 477 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
| 478 |
> |
WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN); |
| 479 |
> |
lr() = trampoline.addr(); |
| 480 |
|
|
| 481 |
|
execute(entry); |
| 482 |
|
|
| 784 |
|
if (InterruptFlags & INTFLAG_VIA) { |
| 785 |
|
ClearInterruptFlag(INTFLAG_VIA); |
| 786 |
|
ADBInterrupt(); |
| 787 |
< |
ExecutePPC(VideoVBL); |
| 787 |
> |
ExecuteNative(NATIVE_VIDEO_VBL); |
| 788 |
|
} |
| 789 |
|
} |
| 790 |
|
#endif |
| 794 |
|
} |
| 795 |
|
} |
| 796 |
|
|
| 791 |
– |
/* |
| 792 |
– |
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
| 793 |
– |
*/ |
| 794 |
– |
|
| 795 |
– |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
| 796 |
– |
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
| 797 |
– |
|
| 798 |
– |
// FIXME: Make sure 32-bit relocations are used |
| 799 |
– |
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
| 800 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
| 801 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
| 802 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
| 803 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
| 804 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
| 805 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
| 806 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
| 807 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
| 808 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
| 809 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
| 810 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
| 811 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
| 812 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
| 813 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
| 814 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
| 815 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
| 816 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
| 817 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
| 818 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
| 819 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
| 820 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
| 821 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
| 822 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
| 823 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
| 824 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
| 825 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE), |
| 826 |
– |
}; |
| 827 |
– |
|
| 797 |
|
static void get_resource(void); |
| 798 |
|
static void get_1_resource(void); |
| 799 |
|
static void get_ind_resource(void); |
| 908 |
|
} |
| 909 |
|
|
| 910 |
|
/* |
| 942 |
– |
* Execute native subroutine (LR must contain return address) |
| 943 |
– |
*/ |
| 944 |
– |
|
| 945 |
– |
void ExecuteNative(int selector) |
| 946 |
– |
{ |
| 947 |
– |
uint32 tvect[2]; |
| 948 |
– |
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
| 949 |
– |
tvect[1] = 0; // Fake TVECT |
| 950 |
– |
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
| 951 |
– |
M68kRegisters r; |
| 952 |
– |
Execute68k((uint32)&desc, &r); |
| 953 |
– |
} |
| 954 |
– |
|
| 955 |
– |
/* |
| 911 |
|
* Execute 68k subroutine (must be ended with EXEC_RETURN) |
| 912 |
|
* This must only be called by the emul_thread when in EMUL_OP mode |
| 913 |
|
* r->a[7] is unused, the routine runs on the caller's stack |
| 925 |
|
|
| 926 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
| 927 |
|
{ |
| 928 |
< |
uint16 proc[2]; |
| 929 |
< |
proc[0] = htons(trap); |
| 930 |
< |
proc[1] = htons(M68K_RTS); |
| 931 |
< |
Execute68k((uint32)proc, r); |
| 928 |
> |
SheepVar proc_var(4); |
| 929 |
> |
uint32 proc = proc_var.addr(); |
| 930 |
> |
WriteMacInt16(proc, trap); |
| 931 |
> |
WriteMacInt16(proc + 2, M68K_RTS); |
| 932 |
> |
Execute68k(proc, r); |
| 933 |
|
} |
| 934 |
|
|
| 935 |
|
/* |
