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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp
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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.16 by gbeauche, 2003-11-10T15:11:44Z vs.
Revision 1.22 by gbeauche, 2003-12-04T23:37:38Z

# Line 30 | Line 30
30   #include "sigsegv.h"
31   #include "cpu/ppc/ppc-cpu.hpp"
32   #include "cpu/ppc/ppc-operations.hpp"
33 + #include "cpu/ppc/ppc-instructions.hpp"
34 + #include "thunks.h"
35  
36   // Used for NativeOp trampolines
37   #include "video.h"
# Line 71 | Line 73 | static void enter_mon(void)
73   #endif
74   }
75  
76 + // PowerPC EmulOp to exit from emulation looop
77 + const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
78 +
79   // Enable multicore (main/interrupts) cpu emulation?
80   #define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
81  
# Line 89 | Line 94 | static void enter_mon(void)
94   // Pointer to Kernel Data
95   static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
96  
97 + // SIGSEGV handler
98 + static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
99 +
100 + // JIT Compiler enabled?
101 + static inline bool enable_jit_p()
102 + {
103 +        return PrefsFindBool("jit");
104 + }
105 +
106  
107   /**
108   *              PowerPC emulator glue with special 'sheep' opcodes
109   **/
110  
111 + enum {
112 +        PPC_I(SHEEP) = PPC_I(MAX),
113 +        PPC_I(SHEEP_MAX)
114 + };
115 +
116   class sheepshaver_cpu
117          : public powerpc_cpu
118   {
# Line 109 | Line 128 | public:
128          uint32 get_cr() const           { return cr().get(); }
129          void set_cr(uint32 v)           { cr().set(v); }
130  
112 –        // Execution loop
113 –        void execute(uint32 entry, bool enable_cache = false);
114 –
131          // Execute 68k routine
132          void execute_68k(uint32 entry, M68kRegisters *r);
133  
# Line 136 | Line 152 | public:
152          // FIXME: really make surre array allocation fail at link time?
153          void *operator new[](size_t);
154          void operator delete[](void *p);
155 +
156 +        // Make sure the SIGSEGV handler can access CPU registers
157 +        friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
158   };
159  
160   lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
161  
162   sheepshaver_cpu::sheepshaver_cpu()
163 <        : powerpc_cpu()
163 >        : powerpc_cpu(enable_jit_p())
164   {
165          init_decoder();
166   }
# Line 159 | Line 178 | void sheepshaver_cpu::init_decoder()
178                  { "sheep",
179                    (execute_pmf)&sheepshaver_cpu::execute_sheep,
180                    NULL,
181 +                  PPC_I(SHEEP),
182                    D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
183                  }
184          };
# Line 231 | Line 251 | void sheepshaver_cpu::execute_sheep(uint
251          }
252   }
253  
234 – // Execution loop
235 – void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
236 – {
237 –        powerpc_cpu::execute(entry, enable_cache);
238 – }
239 –
254   // Handle MacOS interrupt
255   void sheepshaver_cpu::interrupt(uint32 entry)
256   {
# Line 254 | Line 268 | void sheepshaver_cpu::interrupt(uint32 e
268   #endif
269  
270          // Initialize stack pointer to SheepShaver alternate stack base
271 <        gpr(1) = SheepStack1Base - 64;
271 >        SheepArray<64> stack_area;
272 >        gpr(1) = stack_area.addr();
273  
274          // Build trampoline to return from interrupt
275 <        uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
275 >        SheepVar32 trampoline = POWERPC_EXEC_RETURN;
276  
277          // Prepare registers for nanokernel interrupt routine
278          kernel_data->v[0x004 >> 2] = htonl(gpr(1));
# Line 276 | Line 291 | void sheepshaver_cpu::interrupt(uint32 e
291          gpr(1)  = KernelDataAddr;
292          gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
293          gpr(8)  = 0;
294 <        gpr(10) = (uint32)trampoline;
295 <        gpr(12) = (uint32)trampoline;
294 >        gpr(10) = trampoline.addr();
295 >        gpr(12) = trampoline.addr();
296          gpr(13) = get_cr();
297  
298          // rlwimi. r7,r7,8,0,0
# Line 414 | Line 429 | uint32 sheepshaver_cpu::execute_macos_co
429          uint32 saved_ctr= ctr();
430  
431          // Build trampoline with EXEC_RETURN
432 <        uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
433 <        lr() = (uint32)trampoline;
432 >        SheepVar32 trampoline = POWERPC_EXEC_RETURN;
433 >        lr() = trampoline.addr();
434  
435          gpr(1) -= 64;                                                           // Create stack frame
436          uint32 proc = ReadMacInt32(tvect);                      // Get routine address
# Line 459 | Line 474 | inline void sheepshaver_cpu::execute_ppc
474          // Save branch registers
475          uint32 saved_lr = lr();
476  
477 <        const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
478 <        lr() = (uint32)trampoline;
477 >        SheepVar32 trampoline = POWERPC_EXEC_RETURN;
478 >        WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
479 >        lr() = trampoline.addr();
480  
481          execute(entry);
482  
# Line 554 | Line 570 | static sigsegv_return_t sigsegv_handler(
570          if ((addr - ROM_BASE) < ROM_SIZE)
571                  return SIGSEGV_RETURN_SKIP_INSTRUCTION;
572  
573 <        // Ignore all other faults, if requested
574 <        if (PrefsFindBool("ignoresegv"))
575 <                return SIGSEGV_RETURN_FAILURE;
573 >        // Get program counter of target CPU
574 >        sheepshaver_cpu * const cpu = current_cpu;
575 >        const uint32 pc = cpu->pc();
576 >        
577 >        // Fault in Mac ROM or RAM?
578 >        bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
579 >        if (mac_fault) {
580 >
581 >                // "VM settings" during MacOS 8 installation
582 >                if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
583 >                        return SIGSEGV_RETURN_SKIP_INSTRUCTION;
584 >        
585 >                // MacOS 8.5 installation
586 >                else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
587 >                        return SIGSEGV_RETURN_SKIP_INSTRUCTION;
588 >        
589 >                // MacOS 8 serial drivers on startup
590 >                else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
591 >                        return SIGSEGV_RETURN_SKIP_INSTRUCTION;
592 >        
593 >                // MacOS 8.1 serial drivers on startup
594 >                else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
595 >                        return SIGSEGV_RETURN_SKIP_INSTRUCTION;
596 >                else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
597 >                        return SIGSEGV_RETURN_SKIP_INSTRUCTION;
598 >
599 >                // Ignore all other faults, if requested
600 >                if (PrefsFindBool("ignoresegv"))
601 >                        return SIGSEGV_RETURN_SKIP_INSTRUCTION;
602 >        }
603   #else
604   #error "FIXME: You don't have the capability to skip instruction within signal handlers"
605   #endif
# Line 646 | Line 689 | void emul_ppc(uint32 entry)
689          current_cpu->start_log();
690   #endif
691          // start emulation loop and enable code translation or caching
692 <        current_cpu->execute(entry, true);
692 >        current_cpu->execute(entry);
693   }
694  
695   /*
# Line 741 | Line 784 | void sheepshaver_cpu::handle_interrupt(v
784                                  if (InterruptFlags & INTFLAG_VIA) {
785                                          ClearInterruptFlag(INTFLAG_VIA);
786                                          ADBInterrupt();
787 <                                        ExecutePPC(VideoVBL);
787 >                                        ExecuteNative(NATIVE_VIDEO_VBL);
788                                  }
789                          }
790   #endif
# Line 751 | Line 794 | void sheepshaver_cpu::handle_interrupt(v
794          }
795   }
796  
754 – /*
755 – *  Execute NATIVE_OP opcode (called by PowerPC emulator)
756 – */
757 –
758 – #define POWERPC_NATIVE_OP_INIT(LR, OP) \
759 –                tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
760 –
761 – // FIXME: Make sure 32-bit relocations are used
762 – const uint32 NativeOpTable[NATIVE_OP_MAX] = {
763 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
764 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
765 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
766 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
767 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
768 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
769 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
770 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
771 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
772 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
773 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
774 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
775 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
776 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
777 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
778 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
779 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
780 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
781 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
782 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
783 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
784 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
785 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
786 –        POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
787 –        POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
788 –        POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
789 – };
790 –
797   static void get_resource(void);
798   static void get_1_resource(void);
799   static void get_ind_resource(void);
# Line 902 | Line 908 | static void NativeOp(int selector)
908   }
909  
910   /*
905 – *  Execute native subroutine (LR must contain return address)
906 – */
907 –
908 – void ExecuteNative(int selector)
909 – {
910 –        uint32 tvect[2];
911 –        tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
912 –        tvect[1] = 0; // Fake TVECT
913 –        RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
914 –        M68kRegisters r;
915 –        Execute68k((uint32)&desc, &r);
916 – }
917 –
918 – /*
911   *  Execute 68k subroutine (must be ended with EXEC_RETURN)
912   *  This must only be called by the emul_thread when in EMUL_OP mode
913   *  r->a[7] is unused, the routine runs on the caller's stack
# Line 933 | Line 925 | void Execute68k(uint32 pc, M68kRegisters
925  
926   void Execute68kTrap(uint16 trap, M68kRegisters *r)
927   {
928 <        uint16 proc[2];
929 <        proc[0] = htons(trap);
930 <        proc[1] = htons(M68K_RTS);
931 <        Execute68k((uint32)proc, r);
928 >        SheepVar proc_var(4);
929 >        uint32 proc = proc_var.addr();
930 >        WriteMacInt16(proc, trap);
931 >        WriteMacInt16(proc + 2, M68K_RTS);
932 >        Execute68k(proc, r);
933   }
934  
935   /*

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