[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.21 by gbeauche, 2003-12-04T17:26:38Z vs.
Revision 1.72 by gbeauche, 2007-01-17T06:20:36Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 38 \| Line 38
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 50 \| Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 73 \| Line 84 \| static void enter_mon(void)
84		#endif
85		}
86
87	+	// From main_*.cpp
88	+	extern uintptr SignalStackBase();
89	+
90	+	// From rsrc_patches.cpp
91	+	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	+	extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h);
93	+
94		// PowerPC EmulOp to exit from emulation looop
95		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
96
79	–	// Enable multicore (main/interrupts) cpu emulation?
80	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
81	–
97		// Enable Execute68k() safety checks?
98		#define SAFE_EXEC_68K 1
99
#	Line 92 \| Line 107 \| const uint32 POWERPC_EXEC_RETURN = POWER
107		#define INTERRUPTS_IN_NATIVE_MODE 1
108
109		// Pointer to Kernel Data
110	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110	>	static KernelData * kernel_data;
111
112		// SIGSEGV handler
113	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
114	>
115	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
116	>	// Special trampolines for EmulOp and NativeOp
117	>	static uint8 *emul_op_trampoline;
118	>	static uint8 *native_op_trampoline;
119	>	#endif
120
121		// JIT Compiler enabled?
122		static inline bool enable_jit_p()
#	Line 124 \| Line 145 \| public:
145		// Constructor
146		sheepshaver_cpu();
147
148	<	// Condition Register accessors
148	>	// CR & XER accessors
149		uint32 get_cr() const { return cr().get(); }
150		void set_cr(uint32 v) { cr().set(v); }
151	+	uint32 get_xer() const { return xer().get(); }
152	+	void set_xer(uint32 v) { xer().set(v); }
153	+
154	+	// Execute NATIVE_OP routine
155	+	void execute_native_op(uint32 native_op);
156	+
157	+	// Execute EMUL_OP routine
158	+	void execute_emul_op(uint32 emul_op);
159
160		// Execute 68k routine
161		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 137 \| Line 166 \| public:
166		// Execute MacOS/PPC code
167		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
168
169	+	#if PPC_ENABLE_JIT
170	+	// Compile one instruction
171	+	virtual int compile1(codegen_context_t & cg_context);
172	+	#endif
173		// Resource manager thunk
174		void get_resource(uint32 old_get_resource);
175
176		// Handle MacOS interrupt
177		void interrupt(uint32 entry);
145	–	void handle_interrupt();
146	–
147	–	// Lazy memory allocator (one item at a time)
148	–	void *operator new(size_t size)
149	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
150	–	void operator delete(void *p)
151	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
152	–	// FIXME: really make surre array allocation fail at link time?
153	–	void *operator new[](size_t);
154	–	void operator delete[](void *p);
178
179		// Make sure the SIGSEGV handler can access CPU registers
180		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
181		};
182
160	–	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
161	–
183		sheepshaver_cpu::sheepshaver_cpu()
184		: powerpc_cpu(enable_jit_p())
185		{
#	Line 167 \| Line 188 \| sheepshaver_cpu::sheepshaver_cpu()
188
189		void sheepshaver_cpu::init_decoder()
190		{
170	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
171	–	static bool initialized = false;
172	–	if (initialized)
173	–	return;
174	–	initialized = true;
175	–	#endif
176	–
191		static const instr_info_t sheep_ii_table[] = {
192		{ "sheep",
193		(execute_pmf)&sheepshaver_cpu::execute_sheep,
180	–	NULL,
194		PPC_I(SHEEP),
195		D_form, 6, 0, CFLOW_JUMP \| CFLOW_TRAP
196		}
#	Line 192 \| Line 205 \| void sheepshaver_cpu::init_decoder()
205		}
206		}
207
195	–	// Forward declaration for native opcode handler
196	–	static void NativeOp(int selector);
197	–
208		/* NativeOp instruction format:
209	<	+------------+--------------------------+--+----------+------------+
210	<	\| 6 \| \|FN\| OP \| 2 \|
211	<	+------------+--------------------------+--+----------+------------+
212	<	0 5 \|6 19 20 21 25 26 31
209	>	+------------+-------------------------+--+-----------+------------+
210	>	\| 6 \| \|FN\| OP \| 2 \|
211	>	+------------+-------------------------+--+-----------+------------+
212	>	0 5 \|6 18 19 20 25 26 31
213		*/
214
215	<	typedef bit_field< 20, 20 > FN_field;
216	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
215	>	typedef bit_field< 19, 19 > FN_field;
216	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
217		typedef bit_field< 26, 31 > EMUL_OP_field;
218
219	+	// Execute EMUL_OP routine
220	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
221	+	{
222	+	M68kRegisters r68;
223	+	WriteMacInt32(XLM_68K_R25, gpr(25));
224	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
225	+	for (int i = 0; i < 8; i++)
226	+	r68.d[i] = gpr(8 + i);
227	+	for (int i = 0; i < 7; i++)
228	+	r68.a[i] = gpr(16 + i);
229	+	r68.a[7] = gpr(1);
230	+	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
231	+	uint32 saved_xer = get_xer();
232	+	EmulOp(&r68, gpr(24), emul_op);
233	+	set_cr(saved_cr);
234	+	set_xer(saved_xer);
235	+	for (int i = 0; i < 8; i++)
236	+	gpr(8 + i) = r68.d[i];
237	+	for (int i = 0; i < 7; i++)
238	+	gpr(16 + i) = r68.a[i];
239	+	gpr(1) = r68.a[7];
240	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
241	+	}
242	+
243		// Execute SheepShaver instruction
244		void sheepshaver_cpu::execute_sheep(uint32 opcode)
245		{
#	Line 222 \| Line 256 \| void sheepshaver_cpu::execute_sheep(uint
256		break;
257
258		case 2: // EXEC_NATIVE
259	<	NativeOp(NATIVE_OP_field::extract(opcode));
259	>	execute_native_op(NATIVE_OP_field::extract(opcode));
260		if (FN_field::test(opcode))
261		pc() = lr();
262		else
263		pc() += 4;
264		break;
265
266	<	default: { // EMUL_OP
267	<	M68kRegisters r68;
234	<	WriteMacInt32(XLM_68K_R25, gpr(25));
235	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
236	<	for (int i = 0; i < 8; i++)
237	<	r68.d[i] = gpr(8 + i);
238	<	for (int i = 0; i < 7; i++)
239	<	r68.a[i] = gpr(16 + i);
240	<	r68.a[7] = gpr(1);
241	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
242	<	for (int i = 0; i < 8; i++)
243	<	gpr(8 + i) = r68.d[i];
244	<	for (int i = 0; i < 7; i++)
245	<	gpr(16 + i) = r68.a[i];
246	<	gpr(1) = r68.a[7];
247	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
266	>	default: // EMUL_OP
267	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
268		pc() += 4;
269		break;
270		}
271	+	}
272	+
273	+	// Compile one instruction
274	+	#if PPC_ENABLE_JIT
275	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
276	+	{
277	+	const instr_info_t *ii = cg_context.instr_info;
278	+	if (ii->mnemo != PPC_I(SHEEP))
279	+	return COMPILE_FAILURE;
280	+
281	+	int status = COMPILE_FAILURE;
282	+	powerpc_dyngen & dg = cg_context.codegen;
283	+	uint32 opcode = cg_context.opcode;
284	+
285	+	switch (opcode & 0x3f) {
286	+	case 0: // EMUL_RETURN
287	+	dg.gen_invoke(QuitEmulator);
288	+	status = COMPILE_CODE_OK;
289	+	break;
290	+
291	+	case 1: // EXEC_RETURN
292	+	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
293	+	// Don't check for pending interrupts, we do know we have to
294	+	// get out of this block ASAP
295	+	dg.gen_exec_return();
296	+	status = COMPILE_EPILOGUE_OK;
297	+	break;
298	+
299	+	case 2: { // EXEC_NATIVE
300	+	uint32 selector = NATIVE_OP_field::extract(opcode);
301	+	switch (selector) {
302	+	#if !PPC_REENTRANT_JIT
303	+	// Filter out functions that may invoke Execute68k() or
304	+	// CallMacOS(), this would break reentrancy as they could
305	+	// invalidate the translation cache and even overwrite
306	+	// continuation code when we are done with them.
307	+	case NATIVE_PATCH_NAME_REGISTRY:
308	+	dg.gen_invoke(DoPatchNameRegistry);
309	+	status = COMPILE_CODE_OK;
310	+	break;
311	+	case NATIVE_VIDEO_INSTALL_ACCEL:
312	+	dg.gen_invoke(VideoInstallAccel);
313	+	status = COMPILE_CODE_OK;
314	+	break;
315	+	case NATIVE_VIDEO_VBL:
316	+	dg.gen_invoke(VideoVBL);
317	+	status = COMPILE_CODE_OK;
318	+	break;
319	+	case NATIVE_GET_RESOURCE:
320	+	case NATIVE_GET_1_RESOURCE:
321	+	case NATIVE_GET_IND_RESOURCE:
322	+	case NATIVE_GET_1_IND_RESOURCE:
323	+	case NATIVE_R_GET_RESOURCE: {
324	+	static const uint32 get_resource_ptr[] = {
325	+	XLM_GET_RESOURCE,
326	+	XLM_GET_1_RESOURCE,
327	+	XLM_GET_IND_RESOURCE,
328	+	XLM_GET_1_IND_RESOURCE,
329	+	XLM_R_GET_RESOURCE
330	+	};
331	+	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
332	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
333	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
334	+	dg.gen_invoke_CPU_im(func, old_get_resource);
335	+	status = COMPILE_CODE_OK;
336	+	break;
337	+	}
338	+	#endif
339	+	case NATIVE_CHECK_LOAD_INVOC:
340	+	dg.gen_load_T0_GPR(3);
341	+	dg.gen_load_T1_GPR(4);
342	+	dg.gen_se_16_32_T1();
343	+	dg.gen_load_T2_GPR(5);
344	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
345	+	status = COMPILE_CODE_OK;
346	+	break;
347	+	case NATIVE_NAMED_CHECK_LOAD_INVOC:
348	+	dg.gen_load_T0_GPR(3);
349	+	dg.gen_load_T1_GPR(4);
350	+	dg.gen_load_T2_GPR(5);
351	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
352	+	status = COMPILE_CODE_OK;
353	+	break;
354	+	case NATIVE_NQD_SYNC_HOOK:
355	+	dg.gen_load_T0_GPR(3);
356	+	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_sync_hook);
357	+	dg.gen_store_T0_GPR(3);
358	+	status = COMPILE_CODE_OK;
359	+	break;
360	+	case NATIVE_NQD_BITBLT_HOOK:
361	+	dg.gen_load_T0_GPR(3);
362	+	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_bitblt_hook);
363	+	dg.gen_store_T0_GPR(3);
364	+	status = COMPILE_CODE_OK;
365	+	break;
366	+	case NATIVE_NQD_FILLRECT_HOOK:
367	+	dg.gen_load_T0_GPR(3);
368	+	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_fillrect_hook);
369	+	dg.gen_store_T0_GPR(3);
370	+	status = COMPILE_CODE_OK;
371	+	break;
372	+	case NATIVE_NQD_UNKNOWN_HOOK:
373	+	dg.gen_load_T0_GPR(3);
374	+	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_unknown_hook);
375	+	dg.gen_store_T0_GPR(3);
376	+	status = COMPILE_CODE_OK;
377	+	break;
378	+	case NATIVE_NQD_BITBLT:
379	+	dg.gen_load_T0_GPR(3);
380	+	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
381	+	status = COMPILE_CODE_OK;
382	+	break;
383	+	case NATIVE_NQD_INVRECT:
384	+	dg.gen_load_T0_GPR(3);
385	+	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
386	+	status = COMPILE_CODE_OK;
387	+	break;
388	+	case NATIVE_NQD_FILLRECT:
389	+	dg.gen_load_T0_GPR(3);
390	+	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
391	+	status = COMPILE_CODE_OK;
392	+	break;
393	+	}
394	+	// Could we fully translate this NativeOp?
395	+	if (status == COMPILE_CODE_OK) {
396	+	if (!FN_field::test(opcode))
397	+	cg_context.done_compile = false;
398	+	else {
399	+	dg.gen_load_T0_LR_aligned();
400	+	dg.gen_set_PC_T0();
401	+	cg_context.done_compile = true;
402	+	}
403	+	break;
404	+	}
405	+	#if PPC_REENTRANT_JIT
406	+	// Try to execute NativeOp trampoline
407	+	if (!FN_field::test(opcode))
408	+	dg.gen_set_PC_im(cg_context.pc + 4);
409	+	else {
410	+	dg.gen_load_T0_LR_aligned();
411	+	dg.gen_set_PC_T0();
412	+	}
413	+	dg.gen_mov_32_T0_im(selector);
414	+	dg.gen_jmp(native_op_trampoline);
415	+	cg_context.done_compile = true;
416	+	status = COMPILE_EPILOGUE_OK;
417	+	break;
418	+	#endif
419	+	// Invoke NativeOp handler
420	+	if (!FN_field::test(opcode)) {
421	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
422	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
423	+	dg.gen_invoke_CPU_im(func, selector);
424	+	cg_context.done_compile = false;
425	+	status = COMPILE_CODE_OK;
426	+	}
427	+	// Otherwise, let it generate a call to execute_sheep() which
428	+	// will cause necessary updates to the program counter
429	+	break;
430	+	}
431	+
432	+	default: { // EMUL_OP
433	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
434	+	#if PPC_REENTRANT_JIT
435	+	// Try to execute EmulOp trampoline
436	+	dg.gen_set_PC_im(cg_context.pc + 4);
437	+	dg.gen_mov_32_T0_im(emul_op);
438	+	dg.gen_jmp(emul_op_trampoline);
439	+	cg_context.done_compile = true;
440	+	status = COMPILE_EPILOGUE_OK;
441	+	break;
442	+	#endif
443	+	// Invoke EmulOp handler
444	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
445	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
446	+	dg.gen_invoke_CPU_im(func, emul_op);
447	+	cg_context.done_compile = false;
448	+	status = COMPILE_CODE_OK;
449	+	break;
450		}
451	+	}
452	+	return status;
453		}
454	+	#endif
455
456		// Handle MacOS interrupt
457		void sheepshaver_cpu::interrupt(uint32 entry)
458		{
459		#if EMUL_TIME_STATS
460	<	interrupt_count++;
460	>	ppc_interrupt_count++;
461		const clock_t interrupt_start = clock();
462		#endif
463
262	–	#if !MULTICORE_CPU
464		// Save program counters and branch registers
465		uint32 saved_pc = pc();
466		uint32 saved_lr = lr();
467		uint32 saved_ctr= ctr();
468		uint32 saved_sp = gpr(1);
268	–	#endif
469
470		// Initialize stack pointer to SheepShaver alternate stack base
471	<	SheepArray<64> stack_area;
272	<	gpr(1) = stack_area.addr();
471	>	gpr(1) = SignalStackBase() - 64;
472
473		// Build trampoline to return from interrupt
474		SheepVar32 trampoline = POWERPC_EXEC_RETURN;
#	Line 306 \| Line 505 \| void sheepshaver_cpu::interrupt(uint32 e
505		// Enter nanokernel
506		execute(entry);
507
309	–	#if !MULTICORE_CPU
508		// Restore program counters and branch registers
509		pc() = saved_pc;
510		lr() = saved_lr;
511		ctr()= saved_ctr;
512		gpr(1) = saved_sp;
315	–	#endif
513
514		#if EMUL_TIME_STATS
515		interrupt_time += (clock() - interrupt_start);
#	Line 485 \| Line 682 \| inline void sheepshaver_cpu::execute_ppc
682		}
683
684		// Resource Manager thunk
488	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
489	–
685		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
686		{
687		uint32 type = gpr(3);
#	Line 512 \| Line 707 \| inline void sheepshaver_cpu::get_resourc
707		* SheepShaver CPU engine interface
708		**/
709
710	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
711	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
517	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
710	>	// PowerPC CPU emulator
711	>	static sheepshaver_cpu *ppc_cpu = NULL;
712
713		void FlushCodeCache(uintptr start, uintptr end)
714		{
715		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
716	<	main_cpu->invalidate_cache_range(start, end);
523	<	#if MULTICORE_CPU
524	<	interrupt_cpu->invalidate_cache_range(start, end);
525	<	#endif
526	<	}
527	<
528	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
529	<	{
530	<	#if MULTICORE_CPU
531	<	current_cpu = new_cpu;
532	<	#endif
533	<	}
534	<
535	<	static inline void cpu_pop()
536	<	{
537	<	#if MULTICORE_CPU
538	<	current_cpu = main_cpu;
539	<	#endif
716	>	ppc_cpu->invalidate_cache_range(start, end);
717		}
718
719		// Dump PPC registers
720		static void dump_registers(void)
721		{
722	<	current_cpu->dump_registers();
722	>	ppc_cpu->dump_registers();
723		}
724
725		// Dump log
726		static void dump_log(void)
727		{
728	<	current_cpu->dump_log();
728	>	ppc_cpu->dump_log();
729		}
730
731		/*
732		* Initialize CPU emulation
733		*/
734
735	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
735	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
736		{
737		#if ENABLE_VOSF
738		// Handle screen fault
#	Line 567 \| Line 744 \| static sigsegv_return_t sigsegv_handler(
744		const uintptr addr = (uintptr)fault_address;
745		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
746		// Ignore writes to ROM
747	<	if ((addr - ROM_BASE) < ROM_SIZE)
747	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
748		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
749
750		// Get program counter of target CPU
751	<	sheepshaver_cpu * const cpu = current_cpu;
751	>	sheepshaver_cpu * const cpu = ppc_cpu;
752		const uint32 pc = cpu->pc();
753
754		// Fault in Mac ROM or RAM?
755	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
755	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
756		if (mac_fault) {
757
758		// "VM settings" during MacOS 8 installation
#	Line 595 \| Line 772 \| static sigsegv_return_t sigsegv_handler(
772		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
773		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
774		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
775	+
776	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
777	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
778	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
779	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
780	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
781	+
782	+	// Ignore writes to the zero page
783	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
784	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
785
786		// Ignore all other faults, if requested
787		if (PrefsFindBool("ignoresegv"))
#	Line 604 \| Line 791 \| static sigsegv_return_t sigsegv_handler(
791		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
792		#endif
793
794	<	printf("SIGSEGV\n");
795	<	printf(" pc %p\n", fault_instruction);
796	<	printf(" ea %p\n", fault_address);
610	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
794	>	fprintf(stderr, "SIGSEGV\n");
795	>	fprintf(stderr, " pc %p\n", fault_instruction);
796	>	fprintf(stderr, " ea %p\n", fault_address);
797		dump_registers();
798	<	current_cpu->dump_log();
798	>	ppc_cpu->dump_log();
799		enter_mon();
800		QuitEmulator();
801
#	Line 618 \| Line 804 \| static sigsegv_return_t sigsegv_handler(
804
805		void init_emul_ppc(void)
806		{
807	+	// Get pointer to KernelData in host address space
808	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
809	+
810		// Initialize main CPU emulator
811	<	main_cpu = new sheepshaver_cpu();
812	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
811	>	ppc_cpu = new sheepshaver_cpu();
812	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
813	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
814		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
815
626	–	#if MULTICORE_CPU
627	–	// Initialize alternate CPU emulator to handle interrupts
628	–	interrupt_cpu = new sheepshaver_cpu();
629	–	#endif
630	–
631	–	// Install the handler for SIGSEGV
632	–	sigsegv_install_handler(sigsegv_handler);
633	–
816		#if ENABLE_MON
817		// Install "regs" command in cxmon
818		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 656 \| Line 838 \| void exit_emul_ppc(void)
838		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
839		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
840		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
841	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
842	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
843
844		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
845		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 672 \| Line 856 \| void exit_emul_ppc(void)
856		printf("\n");
857		#endif
858
859	<	delete main_cpu;
860	<	#if MULTICORE_CPU
677	<	delete interrupt_cpu;
678	<	#endif
859	>	delete ppc_cpu;
860	>	ppc_cpu = NULL;
861		}
862
863	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
864	+	// Initialize EmulOp trampolines
865	+	void init_emul_op_trampolines(basic_dyngen & dg)
866	+	{
867	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
868	+	func_t func;
869	+
870	+	// EmulOp
871	+	emul_op_trampoline = dg.gen_start();
872	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
873	+	dg.gen_invoke_CPU_T0(func);
874	+	dg.gen_exec_return();
875	+	dg.gen_end();
876	+
877	+	// NativeOp
878	+	native_op_trampoline = dg.gen_start();
879	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
880	+	dg.gen_invoke_CPU_T0(func);
881	+	dg.gen_exec_return();
882	+	dg.gen_end();
883	+
884	+	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
885	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
886	+	}
887	+	#endif
888	+
889		/*
890		* Emulation loop
891		*/
892
893		void emul_ppc(uint32 entry)
894		{
895	<	current_cpu = main_cpu;
896	<	#if DEBUG
689	<	current_cpu->start_log();
895	>	#if 0
896	>	ppc_cpu->start_log();
897		#endif
898		// start emulation loop and enable code translation or caching
899	<	current_cpu->execute(entry);
899	>	ppc_cpu->execute(entry);
900		}
901
902		/*
903		* Handle PowerPC interrupt
904		*/
905
699	–	#if ASYNC_IRQ
700	–	void HandleInterrupt(void)
701	–	{
702	–	main_cpu->handle_interrupt();
703	–	}
704	–	#else
906		void TriggerInterrupt(void)
907		{
908	+	idle_resume();
909		#if 0
910		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
911		#else
912		// Trigger interrupt to main cpu only
913	<	if (main_cpu)
914	<	main_cpu->trigger_interrupt();
913	>	if (ppc_cpu)
914	>	ppc_cpu->trigger_interrupt();
915		#endif
916		}
715	–	#endif
917
918	<	void sheepshaver_cpu::handle_interrupt(void)
918	>	void HandleInterrupt(powerpc_registers *r)
919		{
920	<	// Do nothing if interrupts are disabled
921	<	if ((int32 )XLM_IRQ_NEST > 0)
922	<	return;
920	>	#ifdef USE_SDL_VIDEO
921	>	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
922	>	SDL_PumpEvents();
923	>	#endif
924
925	<	// Do nothing if there is no interrupt pending
926	<	if (InterruptFlags == 0)
925	>	// Do nothing if interrupts are disabled
926	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
927		return;
928
929	<	// Disable MacOS stack sniffer
930	<	WriteMacInt32(0x110, 0);
929	>	// Update interrupt count
930	>	#if EMUL_TIME_STATS
931	>	interrupt_count++;
932	>	#endif
933
934		// Interrupt action depends on current run mode
935		switch (ReadMacInt32(XLM_RUN_MODE)) {
936		case MODE_68K:
937		// 68k emulator active, trigger 68k interrupt level 1
734	–	assert(current_cpu == main_cpu);
938		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
939	<	set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
939	>	r->cr.set(r->cr.get() \| tswap32(kernel_data->v[0x674 >> 2]));
940		break;
941
942		#if INTERRUPTS_IN_NATIVE_MODE
943		case MODE_NATIVE:
944		// 68k emulator inactive, in nanokernel?
945	<	assert(current_cpu == main_cpu);
946	<	if (gpr(1) != KernelDataAddr) {
945	>	if (r->gpr[1] != KernelDataAddr) {
946	>
947		// Prepare for 68k interrupt level 1
948		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
949		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 749 \| Line 952 \| void sheepshaver_cpu::handle_interrupt(v
952
953		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
954		DisableInterrupt();
752	–	cpu_push(interrupt_cpu);
955		if (ROMType == ROMTYPE_NEWWORLD)
956	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
956	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
957		else
958	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
757	<	cpu_pop();
958	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
959		}
960		break;
961		#endif
#	Line 763 \| Line 964 \| void sheepshaver_cpu::handle_interrupt(v
964		case MODE_EMUL_OP:
965		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
966		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
967	+	#if EMUL_TIME_STATS
968	+	const clock_t interrupt_start = clock();
969	+	#endif
970		#if 1
971		// Execute full 68k interrupt routine
972		M68kRegisters r;
973		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
974		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
975	<	static const uint8 proc[] = {
975	>	static const uint8 proc_template[] = {
976		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
977		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
978		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 776 \| Line 980 \| void sheepshaver_cpu::handle_interrupt(v
980		0x4e, 0xd0, // jmp (a0)
981		M68K_RTS >> 8, M68K_RTS & 0xff // @1
982		};
983	<	Execute68k((uint32)proc, &r);
983	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
984	>	Execute68k(proc, &r);
985		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
986		#else
987		// Only update cursor
#	Line 784 \| Line 989 \| void sheepshaver_cpu::handle_interrupt(v
989		if (InterruptFlags & INTFLAG_VIA) {
990		ClearInterruptFlag(INTFLAG_VIA);
991		ADBInterrupt();
992	<	ExecutePPC(VideoVBL);
992	>	ExecuteNative(NATIVE_VIDEO_VBL);
993		}
994		}
995		#endif
996	+	#if EMUL_TIME_STATS
997	+	interrupt_time += (clock() - interrupt_start);
998	+	#endif
999		}
1000		break;
1001		#endif
1002		}
1003		}
1004
1005	<	static void get_resource(void);
1006	<	static void get_1_resource(void);
799	<	static void get_ind_resource(void);
800	<	static void get_1_ind_resource(void);
801	<	static void r_get_resource(void);
802	<
803	<	#define GPR(REG) current_cpu->gpr(REG)
804	<
805	<	static void NativeOp(int selector)
1005	>	// Execute NATIVE_OP routine
1006	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1007		{
1008		#if EMUL_TIME_STATS
1009		native_exec_count++;
#	Line 820 \| Line 1021 \| static void NativeOp(int selector)
1021		VideoVBL();
1022		break;
1023		case NATIVE_VIDEO_DO_DRIVER_IO:
1024	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
1025	<	(void *)GPR(5), GPR(6), GPR(7));
1024	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1025	>	break;
1026	>	case NATIVE_ETHER_AO_GET_HWADDR:
1027	>	AO_get_ethernet_address(gpr(3));
1028	>	break;
1029	>	case NATIVE_ETHER_AO_ADD_MULTI:
1030	>	AO_enable_multicast(gpr(3));
1031	>	break;
1032	>	case NATIVE_ETHER_AO_DEL_MULTI:
1033	>	AO_disable_multicast(gpr(3));
1034	>	break;
1035	>	case NATIVE_ETHER_AO_SEND_PACKET:
1036	>	AO_transmit_packet(gpr(3));
1037		break;
826	–	#ifdef WORDS_BIGENDIAN
1038		case NATIVE_ETHER_IRQ:
1039		EtherIRQ();
1040		break;
1041		case NATIVE_ETHER_INIT:
1042	<	GPR(3) = InitStreamModule((void *)GPR(3));
1042	>	gpr(3) = InitStreamModule((void *)gpr(3));
1043		break;
1044		case NATIVE_ETHER_TERM:
1045		TerminateStreamModule();
1046		break;
1047		case NATIVE_ETHER_OPEN:
1048	<	GPR(3) = ether_open((queue_t )GPR(3), (void )GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1048	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1049		break;
1050		case NATIVE_ETHER_CLOSE:
1051	<	GPR(3) = ether_close((queue_t )GPR(3), GPR(4), (void )GPR(5));
1051	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1052		break;
1053		case NATIVE_ETHER_WPUT:
1054	<	GPR(3) = ether_wput((queue_t )GPR(3), (mblk_t )GPR(4));
1054	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1055		break;
1056		case NATIVE_ETHER_RSRV:
1057	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1057	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1058		break;
1059	<	#else
1060	<	case NATIVE_ETHER_INIT:
1061	<	// FIXME: needs more complicated thunks
1062	<	GPR(3) = false;
1059	>	case NATIVE_NQD_SYNC_HOOK:
1060	>	gpr(3) = NQD_sync_hook(gpr(3));
1061	>	break;
1062	>	case NATIVE_NQD_UNKNOWN_HOOK:
1063	>	gpr(3) = NQD_unknown_hook(gpr(3));
1064	>	break;
1065	>	case NATIVE_NQD_BITBLT_HOOK:
1066	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1067	>	break;
1068	>	case NATIVE_NQD_BITBLT:
1069	>	NQD_bitblt(gpr(3));
1070	>	break;
1071	>	case NATIVE_NQD_FILLRECT_HOOK:
1072	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1073	>	break;
1074	>	case NATIVE_NQD_INVRECT:
1075	>	NQD_invrect(gpr(3));
1076	>	break;
1077	>	case NATIVE_NQD_FILLRECT:
1078	>	NQD_fillrect(gpr(3));
1079		break;
853	–	#endif
1080		case NATIVE_SERIAL_NOTHING:
1081		case NATIVE_SERIAL_OPEN:
1082		case NATIVE_SERIAL_PRIME_IN:
#	Line 868 \| Line 1094 \| static void NativeOp(int selector)
1094		SerialStatus,
1095		SerialClose
1096		};
1097	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1097	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1098		break;
1099		}
1100		case NATIVE_GET_RESOURCE:
1101	+	get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1102	+	break;
1103		case NATIVE_GET_1_RESOURCE:
1104	+	get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1105	+	break;
1106		case NATIVE_GET_IND_RESOURCE:
1107	<	case NATIVE_GET_1_IND_RESOURCE:
878	<	case NATIVE_R_GET_RESOURCE: {
879	<	typedef void (*GetResourceCallback)(void);
880	<	static const GetResourceCallback get_resource_callbacks[] = {
881	<	get_resource,
882	<	get_1_resource,
883	<	get_ind_resource,
884	<	get_1_ind_resource,
885	<	r_get_resource
886	<	};
887	<	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1107	>	get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1108		break;
1109	<	}
1110	<	case NATIVE_DISABLE_INTERRUPT:
891	<	DisableInterrupt();
1109	>	case NATIVE_GET_1_IND_RESOURCE:
1110	>	get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1111		break;
1112	<	case NATIVE_ENABLE_INTERRUPT:
1113	<	EnableInterrupt();
1112	>	case NATIVE_R_GET_RESOURCE:
1113	>	get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1114		break;
1115		case NATIVE_MAKE_EXECUTABLE:
1116	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1116	>	MakeExecutable(0, gpr(4), gpr(5));
1117	>	break;
1118	>	case NATIVE_CHECK_LOAD_INVOC:
1119	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1120	>	break;
1121	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
1122	>	named_check_load_invoc(gpr(3), gpr(4), gpr(5));
1123		break;
1124		default:
1125		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 908 \| Line 1133 \| static void NativeOp(int selector)
1133		}
1134
1135		/*
911	–	* Execute native subroutine (LR must contain return address)
912	–	*/
913	–
914	–	void ExecuteNative(int selector)
915	–	{
916	–	SheepRoutineDescriptor desc(0, NativeTVECT(selector));
917	–	M68kRegisters r;
918	–	Execute68k(desc.addr(), &r);
919	–	}
920	–
921	–	/*
1136		* Execute 68k subroutine (must be ended with EXEC_RETURN)
1137		* This must only be called by the emul_thread when in EMUL_OP mode
1138		* r->a[7] is unused, the routine runs on the caller's stack
#	Line 926 \| Line 1140 \| void ExecuteNative(int selector)
1140
1141		void Execute68k(uint32 pc, M68kRegisters *r)
1142		{
1143	<	current_cpu->execute_68k(pc, r);
1143	>	ppc_cpu->execute_68k(pc, r);
1144		}
1145
1146		/*
#	Line 949 \| Line 1163 \| void Execute68kTrap(uint16 trap, M68kReg
1163
1164		uint32 call_macos(uint32 tvect)
1165		{
1166	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1166	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1167		}
1168
1169		uint32 call_macos1(uint32 tvect, uint32 arg1)
1170		{
1171		const uint32 args[] = { arg1 };
1172	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1172	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1173		}
1174
1175		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1176		{
1177		const uint32 args[] = { arg1, arg2 };
1178	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1178	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1179		}
1180
1181		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1182		{
1183		const uint32 args[] = { arg1, arg2, arg3 };
1184	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1184	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1185		}
1186
1187		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1188		{
1189		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1190	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1190	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1191		}
1192
1193		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1194		{
1195		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1196	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1196	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1197		}
1198
1199		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1200		{
1201		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1202	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1202	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1203		}
1204
1205		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1206		{
1207		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1208	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
995	<	}
996	<
997	<	/*
998	<	* Resource Manager thunks
999	<	*/
1000	<
1001	<	void get_resource(void)
1002	<	{
1003	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1004	<	}
1005	<
1006	<	void get_1_resource(void)
1007	<	{
1008	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1009	<	}
1010	<
1011	<	void get_ind_resource(void)
1012	<	{
1013	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1014	<	}
1015	<
1016	<	void get_1_ind_resource(void)
1017	<	{
1018	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1019	<	}
1020	<
1021	<	void r_get_resource(void)
1022	<	{
1023	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1208	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1209		}

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+Removed lines
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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.21 by gbeauche, 2003-12-04T17:26:38Z vs. Revision 1.72 by gbeauche, 2007-01-17T06:20:36Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.21 by gbeauche, 2003-12-04T17:26:38Z vs.
Revision 1.72 by gbeauche, 2007-01-17T06:20:36Z