[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.21 by gbeauche, 2003-12-04T17:26:38Z vs.
Revision 1.66 by gbeauche, 2005-12-06T22:25:13Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 38 \| Line 38
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 50 \| Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 73 \| Line 84 \| static void enter_mon(void)
84		#endif
85		}
86
87	+	// From main_*.cpp
88	+	extern uintptr SignalStackBase();
89	+
90	+	// From rsrc_patches.cpp
91	+	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	+
93		// PowerPC EmulOp to exit from emulation looop
94		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
95
79	–	// Enable multicore (main/interrupts) cpu emulation?
80	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
81	–
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
98
#	Line 92 \| Line 106 \| const uint32 POWERPC_EXEC_RETURN = POWER
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
108		// Pointer to Kernel Data
109	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109	>	static KernelData * kernel_data;
110
111		// SIGSEGV handler
112	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>
114	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115	>	// Special trampolines for EmulOp and NativeOp
116	>	static uint8 *emul_op_trampoline;
117	>	static uint8 *native_op_trampoline;
118	>	#endif
119
120		// JIT Compiler enabled?
121		static inline bool enable_jit_p()
#	Line 124 \| Line 144 \| public:
144		// Constructor
145		sheepshaver_cpu();
146
147	<	// Condition Register accessors
147	>	// CR & XER accessors
148		uint32 get_cr() const { return cr().get(); }
149		void set_cr(uint32 v) { cr().set(v); }
150	+	uint32 get_xer() const { return xer().get(); }
151	+	void set_xer(uint32 v) { xer().set(v); }
152	+
153	+	// Execute NATIVE_OP routine
154	+	void execute_native_op(uint32 native_op);
155	+
156	+	// Execute EMUL_OP routine
157	+	void execute_emul_op(uint32 emul_op);
158
159		// Execute 68k routine
160		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 137 \| Line 165 \| public:
165		// Execute MacOS/PPC code
166		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167
168	+	#if PPC_ENABLE_JIT
169	+	// Compile one instruction
170	+	virtual int compile1(codegen_context_t & cg_context);
171	+	#endif
172		// Resource manager thunk
173		void get_resource(uint32 old_get_resource);
174
175		// Handle MacOS interrupt
176		void interrupt(uint32 entry);
145	–	void handle_interrupt();
146	–
147	–	// Lazy memory allocator (one item at a time)
148	–	void *operator new(size_t size)
149	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
150	–	void operator delete(void *p)
151	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
152	–	// FIXME: really make surre array allocation fail at link time?
153	–	void *operator new[](size_t);
154	–	void operator delete[](void *p);
177
178		// Make sure the SIGSEGV handler can access CPU registers
179		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180		};
181
160	–	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
161	–
182		sheepshaver_cpu::sheepshaver_cpu()
183		: powerpc_cpu(enable_jit_p())
184		{
#	Line 167 \| Line 187 \| sheepshaver_cpu::sheepshaver_cpu()
187
188		void sheepshaver_cpu::init_decoder()
189		{
170	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
171	–	static bool initialized = false;
172	–	if (initialized)
173	–	return;
174	–	initialized = true;
175	–	#endif
176	–
190		static const instr_info_t sheep_ii_table[] = {
191		{ "sheep",
192		(execute_pmf)&sheepshaver_cpu::execute_sheep,
#	Line 192 \| Line 205 \| void sheepshaver_cpu::init_decoder()
205		}
206		}
207
195	–	// Forward declaration for native opcode handler
196	–	static void NativeOp(int selector);
197	–
208		/* NativeOp instruction format:
209	<	+------------+--------------------------+--+----------+------------+
210	<	\| 6 \| \|FN\| OP \| 2 \|
211	<	+------------+--------------------------+--+----------+------------+
212	<	0 5 \|6 19 20 21 25 26 31
209	>	+------------+-------------------------+--+-----------+------------+
210	>	\| 6 \| \|FN\| OP \| 2 \|
211	>	+------------+-------------------------+--+-----------+------------+
212	>	0 5 \|6 18 19 20 25 26 31
213		*/
214
215	<	typedef bit_field< 20, 20 > FN_field;
216	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
215	>	typedef bit_field< 19, 19 > FN_field;
216	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
217		typedef bit_field< 26, 31 > EMUL_OP_field;
218
219	+	// Execute EMUL_OP routine
220	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
221	+	{
222	+	M68kRegisters r68;
223	+	WriteMacInt32(XLM_68K_R25, gpr(25));
224	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
225	+	for (int i = 0; i < 8; i++)
226	+	r68.d[i] = gpr(8 + i);
227	+	for (int i = 0; i < 7; i++)
228	+	r68.a[i] = gpr(16 + i);
229	+	r68.a[7] = gpr(1);
230	+	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
231	+	uint32 saved_xer = get_xer();
232	+	EmulOp(&r68, gpr(24), emul_op);
233	+	set_cr(saved_cr);
234	+	set_xer(saved_xer);
235	+	for (int i = 0; i < 8; i++)
236	+	gpr(8 + i) = r68.d[i];
237	+	for (int i = 0; i < 7; i++)
238	+	gpr(16 + i) = r68.a[i];
239	+	gpr(1) = r68.a[7];
240	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
241	+	}
242	+
243		// Execute SheepShaver instruction
244		void sheepshaver_cpu::execute_sheep(uint32 opcode)
245		{
#	Line 222 \| Line 256 \| void sheepshaver_cpu::execute_sheep(uint
256		break;
257
258		case 2: // EXEC_NATIVE
259	<	NativeOp(NATIVE_OP_field::extract(opcode));
259	>	execute_native_op(NATIVE_OP_field::extract(opcode));
260		if (FN_field::test(opcode))
261		pc() = lr();
262		else
263		pc() += 4;
264		break;
265
266	<	default: { // EMUL_OP
267	<	M68kRegisters r68;
234	<	WriteMacInt32(XLM_68K_R25, gpr(25));
235	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
236	<	for (int i = 0; i < 8; i++)
237	<	r68.d[i] = gpr(8 + i);
238	<	for (int i = 0; i < 7; i++)
239	<	r68.a[i] = gpr(16 + i);
240	<	r68.a[7] = gpr(1);
241	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
242	<	for (int i = 0; i < 8; i++)
243	<	gpr(8 + i) = r68.d[i];
244	<	for (int i = 0; i < 7; i++)
245	<	gpr(16 + i) = r68.a[i];
246	<	gpr(1) = r68.a[7];
247	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
266	>	default: // EMUL_OP
267	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
268		pc() += 4;
269		break;
270		}
271	+	}
272	+
273	+	// Compile one instruction
274	+	#if PPC_ENABLE_JIT
275	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
276	+	{
277	+	const instr_info_t *ii = cg_context.instr_info;
278	+	if (ii->mnemo != PPC_I(SHEEP))
279	+	return COMPILE_FAILURE;
280	+
281	+	int status = COMPILE_FAILURE;
282	+	powerpc_dyngen & dg = cg_context.codegen;
283	+	uint32 opcode = cg_context.opcode;
284	+
285	+	switch (opcode & 0x3f) {
286	+	case 0: // EMUL_RETURN
287	+	dg.gen_invoke(QuitEmulator);
288	+	status = COMPILE_CODE_OK;
289	+	break;
290	+
291	+	case 1: // EXEC_RETURN
292	+	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
293	+	// Don't check for pending interrupts, we do know we have to
294	+	// get out of this block ASAP
295	+	dg.gen_exec_return();
296	+	status = COMPILE_EPILOGUE_OK;
297	+	break;
298	+
299	+	case 2: { // EXEC_NATIVE
300	+	uint32 selector = NATIVE_OP_field::extract(opcode);
301	+	switch (selector) {
302	+	#if !PPC_REENTRANT_JIT
303	+	// Filter out functions that may invoke Execute68k() or
304	+	// CallMacOS(), this would break reentrancy as they could
305	+	// invalidate the translation cache and even overwrite
306	+	// continuation code when we are done with them.
307	+	case NATIVE_PATCH_NAME_REGISTRY:
308	+	dg.gen_invoke(DoPatchNameRegistry);
309	+	status = COMPILE_CODE_OK;
310	+	break;
311	+	case NATIVE_VIDEO_INSTALL_ACCEL:
312	+	dg.gen_invoke(VideoInstallAccel);
313	+	status = COMPILE_CODE_OK;
314	+	break;
315	+	case NATIVE_VIDEO_VBL:
316	+	dg.gen_invoke(VideoVBL);
317	+	status = COMPILE_CODE_OK;
318	+	break;
319	+	case NATIVE_GET_RESOURCE:
320	+	case NATIVE_GET_1_RESOURCE:
321	+	case NATIVE_GET_IND_RESOURCE:
322	+	case NATIVE_GET_1_IND_RESOURCE:
323	+	case NATIVE_R_GET_RESOURCE: {
324	+	static const uint32 get_resource_ptr[] = {
325	+	XLM_GET_RESOURCE,
326	+	XLM_GET_1_RESOURCE,
327	+	XLM_GET_IND_RESOURCE,
328	+	XLM_GET_1_IND_RESOURCE,
329	+	XLM_R_GET_RESOURCE
330	+	};
331	+	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
332	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
333	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
334	+	dg.gen_invoke_CPU_im(func, old_get_resource);
335	+	status = COMPILE_CODE_OK;
336	+	break;
337	+	}
338	+	case NATIVE_CHECK_LOAD_INVOC:
339	+	dg.gen_load_T0_GPR(3);
340	+	dg.gen_load_T1_GPR(4);
341	+	dg.gen_se_16_32_T1();
342	+	dg.gen_load_T2_GPR(5);
343	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
344	+	status = COMPILE_CODE_OK;
345	+	break;
346	+	#endif
347	+	case NATIVE_BITBLT:
348	+	dg.gen_load_T0_GPR(3);
349	+	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
350	+	status = COMPILE_CODE_OK;
351	+	break;
352	+	case NATIVE_INVRECT:
353	+	dg.gen_load_T0_GPR(3);
354	+	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
355	+	status = COMPILE_CODE_OK;
356	+	break;
357	+	case NATIVE_FILLRECT:
358	+	dg.gen_load_T0_GPR(3);
359	+	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
360	+	status = COMPILE_CODE_OK;
361	+	break;
362	+	}
363	+	// Could we fully translate this NativeOp?
364	+	if (status == COMPILE_CODE_OK) {
365	+	if (!FN_field::test(opcode))
366	+	cg_context.done_compile = false;
367	+	else {
368	+	dg.gen_load_A0_LR();
369	+	dg.gen_set_PC_A0();
370	+	cg_context.done_compile = true;
371	+	}
372	+	break;
373	+	}
374	+	#if PPC_REENTRANT_JIT
375	+	// Try to execute NativeOp trampoline
376	+	if (!FN_field::test(opcode))
377	+	dg.gen_set_PC_im(cg_context.pc + 4);
378	+	else {
379	+	dg.gen_load_A0_LR();
380	+	dg.gen_set_PC_A0();
381	+	}
382	+	dg.gen_mov_32_T0_im(selector);
383	+	dg.gen_jmp(native_op_trampoline);
384	+	cg_context.done_compile = true;
385	+	status = COMPILE_EPILOGUE_OK;
386	+	break;
387	+	#endif
388	+	// Invoke NativeOp handler
389	+	if (!FN_field::test(opcode)) {
390	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
391	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
392	+	dg.gen_invoke_CPU_im(func, selector);
393	+	cg_context.done_compile = false;
394	+	status = COMPILE_CODE_OK;
395	+	}
396	+	// Otherwise, let it generate a call to execute_sheep() which
397	+	// will cause necessary updates to the program counter
398	+	break;
399		}
400	+
401	+	default: { // EMUL_OP
402	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
403	+	#if PPC_REENTRANT_JIT
404	+	// Try to execute EmulOp trampoline
405	+	dg.gen_set_PC_im(cg_context.pc + 4);
406	+	dg.gen_mov_32_T0_im(emul_op);
407	+	dg.gen_jmp(emul_op_trampoline);
408	+	cg_context.done_compile = true;
409	+	status = COMPILE_EPILOGUE_OK;
410	+	break;
411	+	#endif
412	+	// Invoke EmulOp handler
413	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
414	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
415	+	dg.gen_invoke_CPU_im(func, emul_op);
416	+	cg_context.done_compile = false;
417	+	status = COMPILE_CODE_OK;
418	+	break;
419	+	}
420	+	}
421	+	return status;
422		}
423	+	#endif
424
425		// Handle MacOS interrupt
426		void sheepshaver_cpu::interrupt(uint32 entry)
427		{
428		#if EMUL_TIME_STATS
429	<	interrupt_count++;
429	>	ppc_interrupt_count++;
430		const clock_t interrupt_start = clock();
431		#endif
432
262	–	#if !MULTICORE_CPU
433		// Save program counters and branch registers
434		uint32 saved_pc = pc();
435		uint32 saved_lr = lr();
436		uint32 saved_ctr= ctr();
437		uint32 saved_sp = gpr(1);
268	–	#endif
438
439		// Initialize stack pointer to SheepShaver alternate stack base
440	<	SheepArray<64> stack_area;
272	<	gpr(1) = stack_area.addr();
440	>	gpr(1) = SignalStackBase() - 64;
441
442		// Build trampoline to return from interrupt
443		SheepVar32 trampoline = POWERPC_EXEC_RETURN;
#	Line 306 \| Line 474 \| void sheepshaver_cpu::interrupt(uint32 e
474		// Enter nanokernel
475		execute(entry);
476
309	–	#if !MULTICORE_CPU
477		// Restore program counters and branch registers
478		pc() = saved_pc;
479		lr() = saved_lr;
480		ctr()= saved_ctr;
481		gpr(1) = saved_sp;
315	–	#endif
482
483		#if EMUL_TIME_STATS
484		interrupt_time += (clock() - interrupt_start);
#	Line 485 \| Line 651 \| inline void sheepshaver_cpu::execute_ppc
651		}
652
653		// Resource Manager thunk
488	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
489	–
654		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
655		{
656		uint32 type = gpr(3);
#	Line 512 \| Line 676 \| inline void sheepshaver_cpu::get_resourc
676		* SheepShaver CPU engine interface
677		**/
678
679	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
680	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
517	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
679	>	// PowerPC CPU emulator
680	>	static sheepshaver_cpu *ppc_cpu = NULL;
681
682		void FlushCodeCache(uintptr start, uintptr end)
683		{
684		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
685	<	main_cpu->invalidate_cache_range(start, end);
523	<	#if MULTICORE_CPU
524	<	interrupt_cpu->invalidate_cache_range(start, end);
525	<	#endif
526	<	}
527	<
528	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
529	<	{
530	<	#if MULTICORE_CPU
531	<	current_cpu = new_cpu;
532	<	#endif
533	<	}
534	<
535	<	static inline void cpu_pop()
536	<	{
537	<	#if MULTICORE_CPU
538	<	current_cpu = main_cpu;
539	<	#endif
685	>	ppc_cpu->invalidate_cache_range(start, end);
686		}
687
688		// Dump PPC registers
689		static void dump_registers(void)
690		{
691	<	current_cpu->dump_registers();
691	>	ppc_cpu->dump_registers();
692		}
693
694		// Dump log
695		static void dump_log(void)
696		{
697	<	current_cpu->dump_log();
697	>	ppc_cpu->dump_log();
698		}
699
700		/*
701		* Initialize CPU emulation
702		*/
703
704	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
704	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
705		{
706		#if ENABLE_VOSF
707		// Handle screen fault
#	Line 567 \| Line 713 \| static sigsegv_return_t sigsegv_handler(
713		const uintptr addr = (uintptr)fault_address;
714		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
715		// Ignore writes to ROM
716	<	if ((addr - ROM_BASE) < ROM_SIZE)
716	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
717		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
718
719		// Get program counter of target CPU
720	<	sheepshaver_cpu * const cpu = current_cpu;
720	>	sheepshaver_cpu * const cpu = ppc_cpu;
721		const uint32 pc = cpu->pc();
722
723		// Fault in Mac ROM or RAM?
724	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
724	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
725		if (mac_fault) {
726
727		// "VM settings" during MacOS 8 installation
#	Line 595 \| Line 741 \| static sigsegv_return_t sigsegv_handler(
741		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
742		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
743		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
744	+
745	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
746	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
747	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
748	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
749	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
750	+
751	+	// Ignore writes to the zero page
752	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
753	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
754
755		// Ignore all other faults, if requested
756		if (PrefsFindBool("ignoresegv"))
#	Line 604 \| Line 760 \| static sigsegv_return_t sigsegv_handler(
760		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
761		#endif
762
763	<	printf("SIGSEGV\n");
764	<	printf(" pc %p\n", fault_instruction);
765	<	printf(" ea %p\n", fault_address);
610	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
763	>	fprintf(stderr, "SIGSEGV\n");
764	>	fprintf(stderr, " pc %p\n", fault_instruction);
765	>	fprintf(stderr, " ea %p\n", fault_address);
766		dump_registers();
767	<	current_cpu->dump_log();
767	>	ppc_cpu->dump_log();
768		enter_mon();
769		QuitEmulator();
770
#	Line 618 \| Line 773 \| static sigsegv_return_t sigsegv_handler(
773
774		void init_emul_ppc(void)
775		{
776	+	// Get pointer to KernelData in host address space
777	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
778	+
779		// Initialize main CPU emulator
780	<	main_cpu = new sheepshaver_cpu();
781	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
780	>	ppc_cpu = new sheepshaver_cpu();
781	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
782	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
783		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
784
626	–	#if MULTICORE_CPU
627	–	// Initialize alternate CPU emulator to handle interrupts
628	–	interrupt_cpu = new sheepshaver_cpu();
629	–	#endif
630	–
631	–	// Install the handler for SIGSEGV
632	–	sigsegv_install_handler(sigsegv_handler);
633	–
785		#if ENABLE_MON
786		// Install "regs" command in cxmon
787		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 656 \| Line 807 \| void exit_emul_ppc(void)
807		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
808		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
809		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
810	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
811	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
812
813		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
814		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 672 \| Line 825 \| void exit_emul_ppc(void)
825		printf("\n");
826		#endif
827
828	<	delete main_cpu;
829	<	#if MULTICORE_CPU
830	<	delete interrupt_cpu;
831	<	#endif
828	>	delete ppc_cpu;
829	>	}
830	>
831	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
832	>	// Initialize EmulOp trampolines
833	>	void init_emul_op_trampolines(basic_dyngen & dg)
834	>	{
835	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
836	>	func_t func;
837	>
838	>	// EmulOp
839	>	emul_op_trampoline = dg.gen_start();
840	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
841	>	dg.gen_invoke_CPU_T0(func);
842	>	dg.gen_exec_return();
843	>	dg.gen_end();
844	>
845	>	// NativeOp
846	>	native_op_trampoline = dg.gen_start();
847	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
848	>	dg.gen_invoke_CPU_T0(func);
849	>	dg.gen_exec_return();
850	>	dg.gen_end();
851	>
852	>	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
853	>	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
854		}
855	+	#endif
856
857		/*
858		* Emulation loop
#	Line 684 \| Line 860 \| void exit_emul_ppc(void)
860
861		void emul_ppc(uint32 entry)
862		{
863	<	current_cpu = main_cpu;
864	<	#if DEBUG
689	<	current_cpu->start_log();
863	>	#if 0
864	>	ppc_cpu->start_log();
865		#endif
866		// start emulation loop and enable code translation or caching
867	<	current_cpu->execute(entry);
867	>	ppc_cpu->execute(entry);
868		}
869
870		/*
871		* Handle PowerPC interrupt
872		*/
873
699	–	#if ASYNC_IRQ
700	–	void HandleInterrupt(void)
701	–	{
702	–	main_cpu->handle_interrupt();
703	–	}
704	–	#else
874		void TriggerInterrupt(void)
875		{
876	+	idle_resume();
877		#if 0
878		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
879		#else
880		// Trigger interrupt to main cpu only
881	<	if (main_cpu)
882	<	main_cpu->trigger_interrupt();
881	>	if (ppc_cpu)
882	>	ppc_cpu->trigger_interrupt();
883		#endif
884		}
715	–	#endif
885
886	<	void sheepshaver_cpu::handle_interrupt(void)
886	>	void HandleInterrupt(powerpc_registers *r)
887		{
888	<	// Do nothing if interrupts are disabled
889	<	if ((int32 )XLM_IRQ_NEST > 0)
890	<	return;
888	>	#ifdef USE_SDL_VIDEO
889	>	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
890	>	SDL_PumpEvents();
891	>	#endif
892
893	<	// Do nothing if there is no interrupt pending
894	<	if (InterruptFlags == 0)
893	>	// Do nothing if interrupts are disabled
894	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
895		return;
896
897	<	// Disable MacOS stack sniffer
898	<	WriteMacInt32(0x110, 0);
897	>	// Update interrupt count
898	>	#if EMUL_TIME_STATS
899	>	interrupt_count++;
900	>	#endif
901
902		// Interrupt action depends on current run mode
903		switch (ReadMacInt32(XLM_RUN_MODE)) {
904		case MODE_68K:
905		// 68k emulator active, trigger 68k interrupt level 1
734	–	assert(current_cpu == main_cpu);
906		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
907	<	set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
907	>	r->cr.set(r->cr.get() \| tswap32(kernel_data->v[0x674 >> 2]));
908		break;
909
910		#if INTERRUPTS_IN_NATIVE_MODE
911		case MODE_NATIVE:
912		// 68k emulator inactive, in nanokernel?
913	<	assert(current_cpu == main_cpu);
914	<	if (gpr(1) != KernelDataAddr) {
913	>	if (r->gpr[1] != KernelDataAddr) {
914	>
915		// Prepare for 68k interrupt level 1
916		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
917		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 749 \| Line 920 \| void sheepshaver_cpu::handle_interrupt(v
920
921		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
922		DisableInterrupt();
752	–	cpu_push(interrupt_cpu);
923		if (ROMType == ROMTYPE_NEWWORLD)
924	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
924	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
925		else
926	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
757	<	cpu_pop();
926	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
927		}
928		break;
929		#endif
#	Line 763 \| Line 932 \| void sheepshaver_cpu::handle_interrupt(v
932		case MODE_EMUL_OP:
933		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
934		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
935	+	#if EMUL_TIME_STATS
936	+	const clock_t interrupt_start = clock();
937	+	#endif
938		#if 1
939		// Execute full 68k interrupt routine
940		M68kRegisters r;
941		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
942		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
943	<	static const uint8 proc[] = {
943	>	static const uint8 proc_template[] = {
944		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
945		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
946		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 776 \| Line 948 \| void sheepshaver_cpu::handle_interrupt(v
948		0x4e, 0xd0, // jmp (a0)
949		M68K_RTS >> 8, M68K_RTS & 0xff // @1
950		};
951	<	Execute68k((uint32)proc, &r);
951	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
952	>	Execute68k(proc, &r);
953		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
954		#else
955		// Only update cursor
#	Line 784 \| Line 957 \| void sheepshaver_cpu::handle_interrupt(v
957		if (InterruptFlags & INTFLAG_VIA) {
958		ClearInterruptFlag(INTFLAG_VIA);
959		ADBInterrupt();
960	<	ExecutePPC(VideoVBL);
960	>	ExecuteNative(NATIVE_VIDEO_VBL);
961		}
962		}
963		#endif
964	+	#if EMUL_TIME_STATS
965	+	interrupt_time += (clock() - interrupt_start);
966	+	#endif
967		}
968		break;
969		#endif
#	Line 800 \| Line 976 \| static void get_ind_resource(void);
976		static void get_1_ind_resource(void);
977		static void r_get_resource(void);
978
979	<	#define GPR(REG) current_cpu->gpr(REG)
980	<
805	<	static void NativeOp(int selector)
979	>	// Execute NATIVE_OP routine
980	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
981		{
982		#if EMUL_TIME_STATS
983		native_exec_count++;
#	Line 820 \| Line 995 \| static void NativeOp(int selector)
995		VideoVBL();
996		break;
997		case NATIVE_VIDEO_DO_DRIVER_IO:
998	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
999	<	(void *)GPR(5), GPR(6), GPR(7));
998	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
999	>	break;
1000	>	case NATIVE_ETHER_AO_GET_HWADDR:
1001	>	AO_get_ethernet_address(gpr(3));
1002	>	break;
1003	>	case NATIVE_ETHER_AO_ADD_MULTI:
1004	>	AO_enable_multicast(gpr(3));
1005	>	break;
1006	>	case NATIVE_ETHER_AO_DEL_MULTI:
1007	>	AO_disable_multicast(gpr(3));
1008	>	break;
1009	>	case NATIVE_ETHER_AO_SEND_PACKET:
1010	>	AO_transmit_packet(gpr(3));
1011		break;
826	–	#ifdef WORDS_BIGENDIAN
1012		case NATIVE_ETHER_IRQ:
1013		EtherIRQ();
1014		break;
1015		case NATIVE_ETHER_INIT:
1016	<	GPR(3) = InitStreamModule((void *)GPR(3));
1016	>	gpr(3) = InitStreamModule((void *)gpr(3));
1017		break;
1018		case NATIVE_ETHER_TERM:
1019		TerminateStreamModule();
1020		break;
1021		case NATIVE_ETHER_OPEN:
1022	<	GPR(3) = ether_open((queue_t )GPR(3), (void )GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1022	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1023		break;
1024		case NATIVE_ETHER_CLOSE:
1025	<	GPR(3) = ether_close((queue_t )GPR(3), GPR(4), (void )GPR(5));
1025	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1026		break;
1027		case NATIVE_ETHER_WPUT:
1028	<	GPR(3) = ether_wput((queue_t )GPR(3), (mblk_t )GPR(4));
1028	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1029		break;
1030		case NATIVE_ETHER_RSRV:
1031	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1031	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1032		break;
1033	<	#else
1034	<	case NATIVE_ETHER_INIT:
1035	<	// FIXME: needs more complicated thunks
1036	<	GPR(3) = false;
1033	>	case NATIVE_SYNC_HOOK:
1034	>	gpr(3) = NQD_sync_hook(gpr(3));
1035	>	break;
1036	>	case NATIVE_BITBLT_HOOK:
1037	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1038	>	break;
1039	>	case NATIVE_BITBLT:
1040	>	NQD_bitblt(gpr(3));
1041	>	break;
1042	>	case NATIVE_FILLRECT_HOOK:
1043	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1044	>	break;
1045	>	case NATIVE_INVRECT:
1046	>	NQD_invrect(gpr(3));
1047	>	break;
1048	>	case NATIVE_FILLRECT:
1049	>	NQD_fillrect(gpr(3));
1050		break;
853	–	#endif
1051		case NATIVE_SERIAL_NOTHING:
1052		case NATIVE_SERIAL_OPEN:
1053		case NATIVE_SERIAL_PRIME_IN:
#	Line 868 \| Line 1065 \| static void NativeOp(int selector)
1065		SerialStatus,
1066		SerialClose
1067		};
1068	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1068	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1069		break;
1070		}
1071		case NATIVE_GET_RESOURCE:
#	Line 878 \| Line 1075 \| static void NativeOp(int selector)
1075		case NATIVE_R_GET_RESOURCE: {
1076		typedef void (*GetResourceCallback)(void);
1077		static const GetResourceCallback get_resource_callbacks[] = {
1078	<	get_resource,
1079	<	get_1_resource,
1080	<	get_ind_resource,
1081	<	get_1_ind_resource,
1082	<	r_get_resource
1078	>	::get_resource,
1079	>	::get_1_resource,
1080	>	::get_ind_resource,
1081	>	::get_1_ind_resource,
1082	>	::r_get_resource
1083		};
1084		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1085		break;
1086		}
890	–	case NATIVE_DISABLE_INTERRUPT:
891	–	DisableInterrupt();
892	–	break;
893	–	case NATIVE_ENABLE_INTERRUPT:
894	–	EnableInterrupt();
895	–	break;
1087		case NATIVE_MAKE_EXECUTABLE:
1088	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1088	>	MakeExecutable(0, gpr(4), gpr(5));
1089	>	break;
1090	>	case NATIVE_CHECK_LOAD_INVOC:
1091	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1092		break;
1093		default:
1094		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 908 \| Line 1102 \| static void NativeOp(int selector)
1102		}
1103
1104		/*
911	–	* Execute native subroutine (LR must contain return address)
912	–	*/
913	–
914	–	void ExecuteNative(int selector)
915	–	{
916	–	SheepRoutineDescriptor desc(0, NativeTVECT(selector));
917	–	M68kRegisters r;
918	–	Execute68k(desc.addr(), &r);
919	–	}
920	–
921	–	/*
1105		* Execute 68k subroutine (must be ended with EXEC_RETURN)
1106		* This must only be called by the emul_thread when in EMUL_OP mode
1107		* r->a[7] is unused, the routine runs on the caller's stack
#	Line 926 \| Line 1109 \| void ExecuteNative(int selector)
1109
1110		void Execute68k(uint32 pc, M68kRegisters *r)
1111		{
1112	<	current_cpu->execute_68k(pc, r);
1112	>	ppc_cpu->execute_68k(pc, r);
1113		}
1114
1115		/*
#	Line 949 \| Line 1132 \| void Execute68kTrap(uint16 trap, M68kReg
1132
1133		uint32 call_macos(uint32 tvect)
1134		{
1135	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1135	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1136		}
1137
1138		uint32 call_macos1(uint32 tvect, uint32 arg1)
1139		{
1140		const uint32 args[] = { arg1 };
1141	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1141	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1142		}
1143
1144		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1145		{
1146		const uint32 args[] = { arg1, arg2 };
1147	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1147	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1148		}
1149
1150		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1151		{
1152		const uint32 args[] = { arg1, arg2, arg3 };
1153	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1153	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1154		}
1155
1156		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1157		{
1158		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1159	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1159	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1160		}
1161
1162		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1163		{
1164		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1165	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1165	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1166		}
1167
1168		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1169		{
1170		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1171	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1171	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1172		}
1173
1174		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1175		{
1176		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1177	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1177	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1178		}
1179
1180		/*
#	Line 1000 \| Line 1183 \| uint32 call_macos7(uint32 tvect, uint32
1183
1184		void get_resource(void)
1185		{
1186	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1186	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1187		}
1188
1189		void get_1_resource(void)
1190		{
1191	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1191	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1192		}
1193
1194		void get_ind_resource(void)
1195		{
1196	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1196	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1197		}
1198
1199		void get_1_ind_resource(void)
1200		{
1201	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1201	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1202		}
1203
1204		void r_get_resource(void)
1205		{
1206	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1206	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1207		}

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.21 by gbeauche, 2003-12-04T17:26:38Z vs. Revision 1.66 by gbeauche, 2005-12-06T22:25:13Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.21 by gbeauche, 2003-12-04T17:26:38Z vs.
Revision 1.66 by gbeauche, 2005-12-06T22:25:13Z