21 |
|
#include "sysdeps.h" |
22 |
|
#include "cpu_emulation.h" |
23 |
|
#include "main.h" |
24 |
+ |
#include "prefs.h" |
25 |
|
#include "xlowmem.h" |
26 |
|
#include "emul_op.h" |
27 |
|
#include "rom_patches.h" |
28 |
|
#include "macos_util.h" |
29 |
|
#include "block-alloc.hpp" |
30 |
|
#include "sigsegv.h" |
30 |
– |
#include "spcflags.h" |
31 |
|
#include "cpu/ppc/ppc-cpu.hpp" |
32 |
|
#include "cpu/ppc/ppc-operations.hpp" |
33 |
+ |
#include "cpu/ppc/ppc-instructions.hpp" |
34 |
+ |
#include "thunks.h" |
35 |
|
|
36 |
|
// Used for NativeOp trampolines |
37 |
|
#include "video.h" |
38 |
|
#include "name_registry.h" |
39 |
|
#include "serial.h" |
40 |
+ |
#include "ether.h" |
41 |
|
|
42 |
|
#include <stdio.h> |
43 |
|
|
46 |
|
#include "mon_disass.h" |
47 |
|
#endif |
48 |
|
|
49 |
< |
#define DEBUG 1 |
49 |
> |
#define DEBUG 0 |
50 |
|
#include "debug.h" |
51 |
|
|
52 |
+ |
// Emulation time statistics |
53 |
+ |
#define EMUL_TIME_STATS 1 |
54 |
+ |
|
55 |
+ |
#if EMUL_TIME_STATS |
56 |
+ |
static clock_t emul_start_time; |
57 |
+ |
static uint32 interrupt_count = 0; |
58 |
+ |
static clock_t interrupt_time = 0; |
59 |
+ |
static uint32 exec68k_count = 0; |
60 |
+ |
static clock_t exec68k_time = 0; |
61 |
+ |
static uint32 native_exec_count = 0; |
62 |
+ |
static clock_t native_exec_time = 0; |
63 |
+ |
static uint32 macos_exec_count = 0; |
64 |
+ |
static clock_t macos_exec_time = 0; |
65 |
+ |
#endif |
66 |
+ |
|
67 |
|
static void enter_mon(void) |
68 |
|
{ |
69 |
|
// Start up mon in real-mode |
73 |
|
#endif |
74 |
|
} |
75 |
|
|
76 |
+ |
// PowerPC EmulOp to exit from emulation looop |
77 |
+ |
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
78 |
+ |
|
79 |
|
// Enable multicore (main/interrupts) cpu emulation? |
80 |
< |
#define MULTICORE_CPU 0 |
80 |
> |
#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
81 |
|
|
82 |
|
// Enable Execute68k() safety checks? |
83 |
|
#define SAFE_EXEC_68K 1 |
91 |
|
// Interrupts in native mode? |
92 |
|
#define INTERRUPTS_IN_NATIVE_MODE 1 |
93 |
|
|
94 |
< |
// 68k Emulator Data |
95 |
< |
struct EmulatorData { |
75 |
< |
uint32 v[0x400]; |
76 |
< |
}; |
94 |
> |
// Pointer to Kernel Data |
95 |
> |
static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
96 |
|
|
97 |
< |
// Kernel Data |
98 |
< |
struct KernelData { |
80 |
< |
uint32 v[0x400]; |
81 |
< |
EmulatorData ed; |
82 |
< |
}; |
97 |
> |
// SIGSEGV handler |
98 |
> |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
99 |
|
|
100 |
< |
// Pointer to Kernel Data |
101 |
< |
static KernelData * const kernel_data = (KernelData *)0x68ffe000; |
100 |
> |
// JIT Compiler enabled? |
101 |
> |
static inline bool enable_jit_p() |
102 |
> |
{ |
103 |
> |
return PrefsFindBool("jit"); |
104 |
> |
} |
105 |
|
|
106 |
|
|
107 |
|
/** |
108 |
|
* PowerPC emulator glue with special 'sheep' opcodes |
109 |
|
**/ |
110 |
|
|
111 |
< |
struct sheepshaver_exec_return { }; |
111 |
> |
enum { |
112 |
> |
PPC_I(SHEEP) = PPC_I(MAX), |
113 |
> |
PPC_I(SHEEP_MAX) |
114 |
> |
}; |
115 |
|
|
116 |
|
class sheepshaver_cpu |
117 |
|
: public powerpc_cpu |
121 |
|
|
122 |
|
public: |
123 |
|
|
124 |
< |
sheepshaver_cpu() |
125 |
< |
: powerpc_cpu() |
104 |
< |
{ init_decoder(); } |
124 |
> |
// Constructor |
125 |
> |
sheepshaver_cpu(); |
126 |
|
|
127 |
|
// Condition Register accessors |
128 |
|
uint32 get_cr() const { return cr().get(); } |
129 |
|
void set_cr(uint32 v) { cr().set(v); } |
130 |
|
|
110 |
– |
// Execution loop |
111 |
– |
void execute(uint32 pc); |
112 |
– |
|
131 |
|
// Execute 68k routine |
132 |
|
void execute_68k(uint32 entry, M68kRegisters *r); |
133 |
|
|
141 |
|
void get_resource(uint32 old_get_resource); |
142 |
|
|
143 |
|
// Handle MacOS interrupt |
144 |
< |
void interrupt(uint32 entry, sheepshaver_cpu *cpu); |
145 |
< |
|
128 |
< |
// spcflags for interrupts handling |
129 |
< |
static uint32 spcflags; |
144 |
> |
void interrupt(uint32 entry); |
145 |
> |
void handle_interrupt(); |
146 |
|
|
147 |
|
// Lazy memory allocator (one item at a time) |
148 |
|
void *operator new(size_t size) |
152 |
|
// FIXME: really make surre array allocation fail at link time? |
153 |
|
void *operator new[](size_t); |
154 |
|
void operator delete[](void *p); |
155 |
+ |
|
156 |
+ |
// Make sure the SIGSEGV handler can access CPU registers |
157 |
+ |
friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
158 |
|
}; |
159 |
|
|
141 |
– |
uint32 sheepshaver_cpu::spcflags = 0; |
160 |
|
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
161 |
|
|
162 |
+ |
sheepshaver_cpu::sheepshaver_cpu() |
163 |
+ |
: powerpc_cpu(enable_jit_p()) |
164 |
+ |
{ |
165 |
+ |
init_decoder(); |
166 |
+ |
} |
167 |
+ |
|
168 |
|
void sheepshaver_cpu::init_decoder() |
169 |
|
{ |
170 |
|
#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
176 |
|
|
177 |
|
static const instr_info_t sheep_ii_table[] = { |
178 |
|
{ "sheep", |
179 |
< |
(execute_fn)&sheepshaver_cpu::execute_sheep, |
179 |
> |
(execute_pmf)&sheepshaver_cpu::execute_sheep, |
180 |
|
NULL, |
181 |
< |
D_form, 6, 0, CFLOW_TRAP |
181 |
> |
PPC_I(SHEEP), |
182 |
> |
D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
183 |
|
} |
184 |
|
}; |
185 |
|
|
216 |
|
case 0: // EMUL_RETURN |
217 |
|
QuitEmulator(); |
218 |
|
break; |
219 |
< |
|
219 |
> |
|
220 |
|
case 1: // EXEC_RETURN |
221 |
< |
throw sheepshaver_exec_return(); |
221 |
> |
spcflags().set(SPCFLAG_CPU_EXEC_RETURN); |
222 |
|
break; |
223 |
|
|
224 |
|
case 2: // EXEC_NATIVE |
251 |
|
} |
252 |
|
} |
253 |
|
|
229 |
– |
// Checks for pending interrupts |
230 |
– |
struct execute_nothing { |
231 |
– |
static inline void execute(powerpc_cpu *) { } |
232 |
– |
}; |
233 |
– |
|
234 |
– |
static void HandleInterrupt(void); |
235 |
– |
|
236 |
– |
struct execute_spcflags_check { |
237 |
– |
static inline void execute(powerpc_cpu *cpu) { |
238 |
– |
if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) { |
239 |
– |
if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) { |
240 |
– |
SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON ); |
241 |
– |
enter_mon(); |
242 |
– |
} |
243 |
– |
if (SPCFLAGS_TEST( SPCFLAG_DOINT )) { |
244 |
– |
SPCFLAGS_CLEAR( SPCFLAG_DOINT ); |
245 |
– |
HandleInterrupt(); |
246 |
– |
} |
247 |
– |
if (SPCFLAGS_TEST( SPCFLAG_INT )) { |
248 |
– |
SPCFLAGS_CLEAR( SPCFLAG_INT ); |
249 |
– |
SPCFLAGS_SET( SPCFLAG_DOINT ); |
250 |
– |
} |
251 |
– |
} |
252 |
– |
} |
253 |
– |
}; |
254 |
– |
|
255 |
– |
// Execution loop |
256 |
– |
void sheepshaver_cpu::execute(uint32 entry) |
257 |
– |
{ |
258 |
– |
try { |
259 |
– |
pc() = entry; |
260 |
– |
powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>(); |
261 |
– |
} |
262 |
– |
catch (sheepshaver_exec_return const &) { |
263 |
– |
// Nothing, simply return |
264 |
– |
} |
265 |
– |
catch (...) { |
266 |
– |
printf("ERROR: execute() received an unknown exception!\n"); |
267 |
– |
QuitEmulator(); |
268 |
– |
} |
269 |
– |
} |
270 |
– |
|
254 |
|
// Handle MacOS interrupt |
255 |
< |
void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu) |
255 |
> |
void sheepshaver_cpu::interrupt(uint32 entry) |
256 |
|
{ |
257 |
< |
#if MULTICORE_CPU |
258 |
< |
// Initialize stack pointer from previous CPU running |
259 |
< |
gpr(1) = cpu->gpr(1); |
260 |
< |
#else |
257 |
> |
#if EMUL_TIME_STATS |
258 |
> |
interrupt_count++; |
259 |
> |
const clock_t interrupt_start = clock(); |
260 |
> |
#endif |
261 |
> |
|
262 |
> |
#if !MULTICORE_CPU |
263 |
|
// Save program counters and branch registers |
264 |
|
uint32 saved_pc = pc(); |
265 |
|
uint32 saved_lr = lr(); |
266 |
|
uint32 saved_ctr= ctr(); |
267 |
+ |
uint32 saved_sp = gpr(1); |
268 |
|
#endif |
269 |
|
|
270 |
< |
// Create stack frame |
271 |
< |
gpr(1) -= 64; |
270 |
> |
// Initialize stack pointer to SheepShaver alternate stack base |
271 |
> |
SheepArray<64> stack_area; |
272 |
> |
gpr(1) = stack_area.addr(); |
273 |
|
|
274 |
|
// Build trampoline to return from interrupt |
275 |
< |
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
275 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
276 |
|
|
277 |
|
// Prepare registers for nanokernel interrupt routine |
278 |
< |
kernel_data->v[0x004 >> 2] = gpr(1); |
279 |
< |
kernel_data->v[0x018 >> 2] = gpr(6); |
278 |
> |
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
279 |
> |
kernel_data->v[0x018 >> 2] = htonl(gpr(6)); |
280 |
|
|
281 |
< |
gpr(6) = kernel_data->v[0x65c >> 2]; |
281 |
> |
gpr(6) = ntohl(kernel_data->v[0x65c >> 2]); |
282 |
|
assert(gpr(6) != 0); |
283 |
|
WriteMacInt32(gpr(6) + 0x13c, gpr(7)); |
284 |
|
WriteMacInt32(gpr(6) + 0x144, gpr(8)); |
289 |
|
WriteMacInt32(gpr(6) + 0x16c, gpr(13)); |
290 |
|
|
291 |
|
gpr(1) = KernelDataAddr; |
292 |
< |
gpr(7) = kernel_data->v[0x660 >> 2]; |
292 |
> |
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
293 |
|
gpr(8) = 0; |
294 |
< |
gpr(10) = (uint32)trampoline; |
295 |
< |
gpr(12) = (uint32)trampoline; |
296 |
< |
gpr(13) = cr().get(); |
294 |
> |
gpr(10) = trampoline.addr(); |
295 |
> |
gpr(12) = trampoline.addr(); |
296 |
> |
gpr(13) = get_cr(); |
297 |
|
|
298 |
|
// rlwimi. r7,r7,8,0,0 |
299 |
|
uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7)); |
301 |
|
gpr(7) = result; |
302 |
|
|
303 |
|
gpr(11) = 0xf072; // MSR (SRR1) |
304 |
< |
cr().set((gpr(11) & 0x0fff0000) | (cr().get() & ~0x0fff0000)); |
304 |
> |
cr().set((gpr(11) & 0x0fff0000) | (get_cr() & ~0x0fff0000)); |
305 |
|
|
306 |
|
// Enter nanokernel |
307 |
|
execute(entry); |
308 |
|
|
322 |
– |
// Cleanup stack |
323 |
– |
gpr(1) += 64; |
324 |
– |
|
309 |
|
#if !MULTICORE_CPU |
310 |
|
// Restore program counters and branch registers |
311 |
|
pc() = saved_pc; |
312 |
|
lr() = saved_lr; |
313 |
|
ctr()= saved_ctr; |
314 |
+ |
gpr(1) = saved_sp; |
315 |
+ |
#endif |
316 |
+ |
|
317 |
+ |
#if EMUL_TIME_STATS |
318 |
+ |
interrupt_time += (clock() - interrupt_start); |
319 |
|
#endif |
320 |
|
} |
321 |
|
|
322 |
|
// Execute 68k routine |
323 |
|
void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r) |
324 |
|
{ |
325 |
+ |
#if EMUL_TIME_STATS |
326 |
+ |
exec68k_count++; |
327 |
+ |
const clock_t exec68k_start = clock(); |
328 |
+ |
#endif |
329 |
+ |
|
330 |
|
#if SAFE_EXEC_68K |
331 |
|
if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP) |
332 |
|
printf("FATAL: Execute68k() not called from EMUL_OP mode\n"); |
336 |
|
uint32 saved_pc = pc(); |
337 |
|
uint32 saved_lr = lr(); |
338 |
|
uint32 saved_ctr= ctr(); |
339 |
+ |
uint32 saved_cr = get_cr(); |
340 |
|
|
341 |
|
// Create MacOS stack frame |
342 |
+ |
// FIXME: make sure MacOS doesn't expect PPC registers to live on top |
343 |
|
uint32 sp = gpr(1); |
344 |
< |
gpr(1) -= 56 + 19*4 + 18*8; |
344 |
> |
gpr(1) -= 56; |
345 |
|
WriteMacInt32(gpr(1), sp); |
346 |
|
|
347 |
|
// Save PowerPC registers |
348 |
< |
memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13)); |
348 |
> |
uint32 saved_GPRs[19]; |
349 |
> |
memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13)); |
350 |
|
#if SAVE_FP_EXEC_68K |
351 |
< |
memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14)); |
351 |
> |
double saved_FPRs[18]; |
352 |
> |
memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14)); |
353 |
|
#endif |
354 |
|
|
355 |
|
// Setup registers for 68k emulator |
363 |
|
gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR |
364 |
|
gpr(26) = 0; |
365 |
|
gpr(28) = 0; // VBR |
366 |
< |
gpr(29) = kernel_data->ed.v[0x74 >> 2]; // Pointer to opcode table |
367 |
< |
gpr(30) = kernel_data->ed.v[0x78 >> 2]; // Address of emulator |
366 |
> |
gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]); // Pointer to opcode table |
367 |
> |
gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]); // Address of emulator |
368 |
|
gpr(31) = KernelDataAddr + 0x1000; |
369 |
|
|
370 |
|
// Push return address (points to EXEC_RETURN opcode) on stack |
396 |
|
r->a[i] = gpr(16 + i); |
397 |
|
|
398 |
|
// Restore PowerPC registers |
399 |
< |
memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13)); |
399 |
> |
memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13)); |
400 |
|
#if SAVE_FP_EXEC_68K |
401 |
< |
memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14)); |
401 |
> |
memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14)); |
402 |
|
#endif |
403 |
|
|
404 |
|
// Cleanup stack |
405 |
< |
gpr(1) += 56 + 19*4 + 18*8; |
405 |
> |
gpr(1) += 56; |
406 |
|
|
407 |
|
// Restore program counters and branch registers |
408 |
|
pc() = saved_pc; |
409 |
|
lr() = saved_lr; |
410 |
|
ctr()= saved_ctr; |
411 |
+ |
set_cr(saved_cr); |
412 |
+ |
|
413 |
+ |
#if EMUL_TIME_STATS |
414 |
+ |
exec68k_time += (clock() - exec68k_start); |
415 |
+ |
#endif |
416 |
|
} |
417 |
|
|
418 |
|
// Call MacOS PPC code |
419 |
|
uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args) |
420 |
|
{ |
421 |
+ |
#if EMUL_TIME_STATS |
422 |
+ |
macos_exec_count++; |
423 |
+ |
const clock_t macos_exec_start = clock(); |
424 |
+ |
#endif |
425 |
+ |
|
426 |
|
// Save program counters and branch registers |
427 |
|
uint32 saved_pc = pc(); |
428 |
|
uint32 saved_lr = lr(); |
429 |
|
uint32 saved_ctr= ctr(); |
430 |
|
|
431 |
|
// Build trampoline with EXEC_RETURN |
432 |
< |
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
433 |
< |
lr() = (uint32)trampoline; |
432 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
433 |
> |
lr() = trampoline.addr(); |
434 |
|
|
435 |
|
gpr(1) -= 64; // Create stack frame |
436 |
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
461 |
|
lr() = saved_lr; |
462 |
|
ctr()= saved_ctr; |
463 |
|
|
464 |
+ |
#if EMUL_TIME_STATS |
465 |
+ |
macos_exec_time += (clock() - macos_exec_start); |
466 |
+ |
#endif |
467 |
+ |
|
468 |
|
return retval; |
469 |
|
} |
470 |
|
|
473 |
|
{ |
474 |
|
// Save branch registers |
475 |
|
uint32 saved_lr = lr(); |
464 |
– |
uint32 saved_ctr= ctr(); |
476 |
|
|
477 |
< |
const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
477 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
478 |
> |
WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN); |
479 |
> |
lr() = trampoline.addr(); |
480 |
|
|
468 |
– |
lr() = (uint32)trampoline; |
469 |
– |
ctr()= entry; |
481 |
|
execute(entry); |
482 |
|
|
483 |
|
// Restore branch registers |
484 |
|
lr() = saved_lr; |
474 |
– |
ctr()= saved_ctr; |
485 |
|
} |
486 |
|
|
487 |
|
// Resource Manager thunk |
488 |
< |
extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h); |
488 |
> |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
489 |
|
|
490 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
491 |
|
{ |
497 |
|
|
498 |
|
// Call old routine |
499 |
|
execute_ppc(old_get_resource); |
490 |
– |
uint16 **handle = (uint16 **)gpr(3); |
500 |
|
|
501 |
|
// Call CheckLoad() |
502 |
+ |
uint32 handle = gpr(3); |
503 |
|
check_load_invoc(type, id, handle); |
504 |
< |
gpr(3) = (uint32)handle; |
504 |
> |
gpr(3) = handle; |
505 |
|
|
506 |
|
// Cleanup stack |
507 |
|
gpr(1) += 56; |
516 |
|
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
517 |
|
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
518 |
|
|
519 |
+ |
void FlushCodeCache(uintptr start, uintptr end) |
520 |
+ |
{ |
521 |
+ |
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
522 |
+ |
main_cpu->invalidate_cache_range(start, end); |
523 |
+ |
#if MULTICORE_CPU |
524 |
+ |
interrupt_cpu->invalidate_cache_range(start, end); |
525 |
+ |
#endif |
526 |
+ |
} |
527 |
+ |
|
528 |
|
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
529 |
|
{ |
530 |
|
#if MULTICORE_CPU |
555 |
|
* Initialize CPU emulation |
556 |
|
*/ |
557 |
|
|
558 |
< |
static struct sigaction sigsegv_action; |
540 |
< |
|
541 |
< |
#if defined(__powerpc__) |
542 |
< |
#include <sys/ucontext.h> |
543 |
< |
#endif |
544 |
< |
|
545 |
< |
static void sigsegv_handler(int sig, siginfo_t *sip, void *scp) |
558 |
> |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
559 |
|
{ |
547 |
– |
const uintptr addr = (uintptr)sip->si_addr; |
560 |
|
#if ENABLE_VOSF |
561 |
< |
// Handle screen fault. |
562 |
< |
extern bool Screen_fault_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction); |
563 |
< |
if (Screen_fault_handler((sigsegv_address_t)addr, SIGSEGV_INVALID_PC)) |
564 |
< |
return; |
561 |
> |
// Handle screen fault |
562 |
> |
extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t); |
563 |
> |
if (Screen_fault_handler(fault_address, fault_instruction)) |
564 |
> |
return SIGSEGV_RETURN_SUCCESS; |
565 |
|
#endif |
566 |
< |
#if defined(__powerpc__) |
567 |
< |
if (addr >= ROM_BASE && addr < ROM_BASE + ROM_SIZE) { |
568 |
< |
printf("IGNORE write access to ROM at %08x\n", addr); |
569 |
< |
(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4; |
570 |
< |
return; |
571 |
< |
} |
572 |
< |
if (addr >= 0xf3012000 && addr < 0xf3014000 && 0) { |
573 |
< |
printf("IGNORE write access to ROM at %08x\n", addr); |
574 |
< |
(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4; |
575 |
< |
return; |
566 |
> |
|
567 |
> |
const uintptr addr = (uintptr)fault_address; |
568 |
> |
#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
569 |
> |
// Ignore writes to ROM |
570 |
> |
if ((addr - ROM_BASE) < ROM_SIZE) |
571 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
572 |
> |
|
573 |
> |
// Get program counter of target CPU |
574 |
> |
sheepshaver_cpu * const cpu = current_cpu; |
575 |
> |
const uint32 pc = cpu->pc(); |
576 |
> |
|
577 |
> |
// Fault in Mac ROM or RAM? |
578 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
579 |
> |
if (mac_fault) { |
580 |
> |
|
581 |
> |
// "VM settings" during MacOS 8 installation |
582 |
> |
if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000) |
583 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
584 |
> |
|
585 |
> |
// MacOS 8.5 installation |
586 |
> |
else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000) |
587 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
588 |
> |
|
589 |
> |
// MacOS 8 serial drivers on startup |
590 |
> |
else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000)) |
591 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
592 |
> |
|
593 |
> |
// MacOS 8.1 serial drivers on startup |
594 |
> |
else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
595 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
596 |
> |
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
597 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
598 |
> |
|
599 |
> |
// Ignore all other faults, if requested |
600 |
> |
if (PrefsFindBool("ignoresegv")) |
601 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
602 |
|
} |
565 |
– |
#endif |
566 |
– |
printf("Caught SIGSEGV at address %p\n", sip->si_addr); |
567 |
– |
printf("Native PC: %08x\n", (((ucontext_t *)scp)->uc_mcontext.regs)->nip); |
568 |
– |
printf("Current CPU: %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
569 |
– |
#if 1 |
570 |
– |
dump_registers(); |
603 |
|
#else |
604 |
< |
printf("Main CPU context\n"); |
573 |
< |
main_cpu->dump_registers(); |
574 |
< |
printf("Interrupts CPU context\n"); |
575 |
< |
interrupt_cpu->dump_registers(); |
604 |
> |
#error "FIXME: You don't have the capability to skip instruction within signal handlers" |
605 |
|
#endif |
606 |
+ |
|
607 |
+ |
printf("SIGSEGV\n"); |
608 |
+ |
printf(" pc %p\n", fault_instruction); |
609 |
+ |
printf(" ea %p\n", fault_address); |
610 |
+ |
printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
611 |
+ |
dump_registers(); |
612 |
|
current_cpu->dump_log(); |
613 |
|
enter_mon(); |
614 |
|
QuitEmulator(); |
615 |
+ |
|
616 |
+ |
return SIGSEGV_RETURN_FAILURE; |
617 |
|
} |
618 |
|
|
619 |
|
void init_emul_ppc(void) |
628 |
|
interrupt_cpu = new sheepshaver_cpu(); |
629 |
|
#endif |
630 |
|
|
631 |
< |
// Install SIGSEGV handler |
632 |
< |
sigemptyset(&sigsegv_action.sa_mask); |
596 |
< |
sigsegv_action.sa_sigaction = sigsegv_handler; |
597 |
< |
sigsegv_action.sa_flags = SA_SIGINFO; |
598 |
< |
sigsegv_action.sa_restorer = NULL; |
599 |
< |
sigaction(SIGSEGV, &sigsegv_action, NULL); |
631 |
> |
// Install the handler for SIGSEGV |
632 |
> |
sigsegv_install_handler(sigsegv_handler); |
633 |
|
|
634 |
|
#if ENABLE_MON |
635 |
|
// Install "regs" command in cxmon |
636 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
637 |
|
mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n"); |
638 |
|
#endif |
639 |
+ |
|
640 |
+ |
#if EMUL_TIME_STATS |
641 |
+ |
emul_start_time = clock(); |
642 |
+ |
#endif |
643 |
+ |
} |
644 |
+ |
|
645 |
+ |
/* |
646 |
+ |
* Deinitialize emulation |
647 |
+ |
*/ |
648 |
+ |
|
649 |
+ |
void exit_emul_ppc(void) |
650 |
+ |
{ |
651 |
+ |
#if EMUL_TIME_STATS |
652 |
+ |
clock_t emul_end_time = clock(); |
653 |
+ |
|
654 |
+ |
printf("### Statistics for SheepShaver emulation parts\n"); |
655 |
+ |
const clock_t emul_time = emul_end_time - emul_start_time; |
656 |
+ |
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
657 |
+ |
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
658 |
+ |
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
659 |
+ |
|
660 |
+ |
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
661 |
+ |
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
662 |
+ |
printf("Total " LABEL " time : %.1f sec (%.1f%%)\n", \ |
663 |
+ |
double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC), \ |
664 |
+ |
100.0 * double(VAR_PREFIX##_time) / double(emul_time)); \ |
665 |
+ |
} while (0) |
666 |
+ |
|
667 |
+ |
PRINT_STATS("Execute68k[Trap] execution", exec68k); |
668 |
+ |
PRINT_STATS("NativeOp execution", native_exec); |
669 |
+ |
PRINT_STATS("MacOS routine execution", macos_exec); |
670 |
+ |
|
671 |
+ |
#undef PRINT_STATS |
672 |
+ |
printf("\n"); |
673 |
+ |
#endif |
674 |
+ |
|
675 |
+ |
delete main_cpu; |
676 |
+ |
#if MULTICORE_CPU |
677 |
+ |
delete interrupt_cpu; |
678 |
+ |
#endif |
679 |
|
} |
680 |
|
|
681 |
|
/* |
685 |
|
void emul_ppc(uint32 entry) |
686 |
|
{ |
687 |
|
current_cpu = main_cpu; |
688 |
+ |
#if DEBUG |
689 |
|
current_cpu->start_log(); |
690 |
+ |
#endif |
691 |
+ |
// start emulation loop and enable code translation or caching |
692 |
|
current_cpu->execute(entry); |
693 |
|
} |
694 |
|
|
696 |
|
* Handle PowerPC interrupt |
697 |
|
*/ |
698 |
|
|
699 |
< |
// Atomic operations |
700 |
< |
extern int atomic_add(int *var, int v); |
701 |
< |
extern int atomic_and(int *var, int v); |
702 |
< |
extern int atomic_or(int *var, int v); |
703 |
< |
|
699 |
> |
#if ASYNC_IRQ |
700 |
> |
void HandleInterrupt(void) |
701 |
> |
{ |
702 |
> |
main_cpu->handle_interrupt(); |
703 |
> |
} |
704 |
> |
#else |
705 |
|
void TriggerInterrupt(void) |
706 |
|
{ |
707 |
|
#if 0 |
708 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
709 |
|
#else |
710 |
< |
SPCFLAGS_SET( SPCFLAG_INT ); |
710 |
> |
// Trigger interrupt to main cpu only |
711 |
> |
if (main_cpu) |
712 |
> |
main_cpu->trigger_interrupt(); |
713 |
|
#endif |
714 |
|
} |
715 |
+ |
#endif |
716 |
|
|
717 |
< |
static void HandleInterrupt(void) |
717 |
> |
void sheepshaver_cpu::handle_interrupt(void) |
718 |
|
{ |
719 |
|
// Do nothing if interrupts are disabled |
720 |
< |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
720 |
> |
if (*(int32 *)XLM_IRQ_NEST > 0) |
721 |
|
return; |
722 |
|
|
723 |
|
// Do nothing if there is no interrupt pending |
733 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
734 |
|
assert(current_cpu == main_cpu); |
735 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
736 |
< |
main_cpu->set_cr(main_cpu->get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
736 |
> |
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
737 |
|
break; |
738 |
|
|
739 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
740 |
|
case MODE_NATIVE: |
741 |
|
// 68k emulator inactive, in nanokernel? |
742 |
|
assert(current_cpu == main_cpu); |
743 |
< |
if (main_cpu->gpr(1) != KernelDataAddr) { |
743 |
> |
if (gpr(1) != KernelDataAddr) { |
744 |
|
// Prepare for 68k interrupt level 1 |
745 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
746 |
|
WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc, |
751 |
|
DisableInterrupt(); |
752 |
|
cpu_push(interrupt_cpu); |
753 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
754 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu); |
754 |
> |
current_cpu->interrupt(ROM_BASE + 0x312b1c); |
755 |
|
else |
756 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu); |
756 |
> |
current_cpu->interrupt(ROM_BASE + 0x312a3c); |
757 |
|
cpu_pop(); |
758 |
|
} |
759 |
|
break; |
794 |
|
} |
795 |
|
} |
796 |
|
|
717 |
– |
/* |
718 |
– |
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
719 |
– |
*/ |
720 |
– |
|
721 |
– |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
722 |
– |
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
723 |
– |
|
724 |
– |
// FIXME: Make sure 32-bit relocations are used |
725 |
– |
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
726 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
727 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
728 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
729 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
730 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
731 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
732 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
733 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
734 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
735 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
736 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
737 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
738 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
739 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
740 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
741 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
742 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
743 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
744 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
745 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
746 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
747 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
748 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
749 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
750 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
751 |
– |
}; |
752 |
– |
|
797 |
|
static void get_resource(void); |
798 |
|
static void get_1_resource(void); |
799 |
|
static void get_ind_resource(void); |
804 |
|
|
805 |
|
static void NativeOp(int selector) |
806 |
|
{ |
807 |
+ |
#if EMUL_TIME_STATS |
808 |
+ |
native_exec_count++; |
809 |
+ |
const clock_t native_exec_start = clock(); |
810 |
+ |
#endif |
811 |
+ |
|
812 |
|
switch (selector) { |
813 |
|
case NATIVE_PATCH_NAME_REGISTRY: |
814 |
|
DoPatchNameRegistry(); |
823 |
|
GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4), |
824 |
|
(void *)GPR(5), GPR(6), GPR(7)); |
825 |
|
break; |
826 |
< |
case NATIVE_GET_RESOURCE: |
827 |
< |
get_resource(); |
826 |
> |
#ifdef WORDS_BIGENDIAN |
827 |
> |
case NATIVE_ETHER_IRQ: |
828 |
> |
EtherIRQ(); |
829 |
|
break; |
830 |
< |
case NATIVE_GET_1_RESOURCE: |
831 |
< |
get_1_resource(); |
830 |
> |
case NATIVE_ETHER_INIT: |
831 |
> |
GPR(3) = InitStreamModule((void *)GPR(3)); |
832 |
|
break; |
833 |
< |
case NATIVE_GET_IND_RESOURCE: |
834 |
< |
get_ind_resource(); |
833 |
> |
case NATIVE_ETHER_TERM: |
834 |
> |
TerminateStreamModule(); |
835 |
|
break; |
836 |
< |
case NATIVE_GET_1_IND_RESOURCE: |
837 |
< |
get_1_ind_resource(); |
836 |
> |
case NATIVE_ETHER_OPEN: |
837 |
> |
GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7)); |
838 |
> |
break; |
839 |
> |
case NATIVE_ETHER_CLOSE: |
840 |
> |
GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5)); |
841 |
|
break; |
842 |
< |
case NATIVE_R_GET_RESOURCE: |
843 |
< |
r_get_resource(); |
842 |
> |
case NATIVE_ETHER_WPUT: |
843 |
> |
GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4)); |
844 |
|
break; |
845 |
+ |
case NATIVE_ETHER_RSRV: |
846 |
+ |
GPR(3) = ether_rsrv((queue_t *)GPR(3)); |
847 |
+ |
break; |
848 |
+ |
#else |
849 |
+ |
case NATIVE_ETHER_INIT: |
850 |
+ |
// FIXME: needs more complicated thunks |
851 |
+ |
GPR(3) = false; |
852 |
+ |
break; |
853 |
+ |
#endif |
854 |
|
case NATIVE_SERIAL_NOTHING: |
855 |
|
case NATIVE_SERIAL_OPEN: |
856 |
|
case NATIVE_SERIAL_PRIME_IN: |
871 |
|
GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4)); |
872 |
|
break; |
873 |
|
} |
874 |
+ |
case NATIVE_GET_RESOURCE: |
875 |
+ |
case NATIVE_GET_1_RESOURCE: |
876 |
+ |
case NATIVE_GET_IND_RESOURCE: |
877 |
+ |
case NATIVE_GET_1_IND_RESOURCE: |
878 |
+ |
case NATIVE_R_GET_RESOURCE: { |
879 |
+ |
typedef void (*GetResourceCallback)(void); |
880 |
+ |
static const GetResourceCallback get_resource_callbacks[] = { |
881 |
+ |
get_resource, |
882 |
+ |
get_1_resource, |
883 |
+ |
get_ind_resource, |
884 |
+ |
get_1_ind_resource, |
885 |
+ |
r_get_resource |
886 |
+ |
}; |
887 |
+ |
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
888 |
+ |
break; |
889 |
+ |
} |
890 |
|
case NATIVE_DISABLE_INTERRUPT: |
891 |
|
DisableInterrupt(); |
892 |
|
break; |
893 |
|
case NATIVE_ENABLE_INTERRUPT: |
894 |
|
EnableInterrupt(); |
895 |
|
break; |
896 |
+ |
case NATIVE_MAKE_EXECUTABLE: |
897 |
+ |
MakeExecutable(0, (void *)GPR(4), GPR(5)); |
898 |
+ |
break; |
899 |
|
default: |
900 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
901 |
|
QuitEmulator(); |
902 |
|
break; |
903 |
|
} |
904 |
+ |
|
905 |
+ |
#if EMUL_TIME_STATS |
906 |
+ |
native_exec_time += (clock() - native_exec_start); |
907 |
+ |
#endif |
908 |
|
} |
909 |
|
|
910 |
|
/* |
913 |
|
|
914 |
|
void ExecuteNative(int selector) |
915 |
|
{ |
916 |
< |
uint32 tvect[2]; |
832 |
< |
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
833 |
< |
tvect[1] = 0; // Fake TVECT |
834 |
< |
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
916 |
> |
SheepRoutineDescriptor desc(0, NativeTVECT(selector)); |
917 |
|
M68kRegisters r; |
918 |
< |
Execute68k((uint32)&desc, &r); |
918 |
> |
Execute68k(desc.addr(), &r); |
919 |
|
} |
920 |
|
|
921 |
|
/* |
936 |
|
|
937 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
938 |
|
{ |
939 |
< |
uint16 proc[2] = {trap, M68K_RTS}; |
940 |
< |
Execute68k((uint32)proc, r); |
939 |
> |
SheepVar proc_var(4); |
940 |
> |
uint32 proc = proc_var.addr(); |
941 |
> |
WriteMacInt16(proc, trap); |
942 |
> |
WriteMacInt16(proc + 2, M68K_RTS); |
943 |
> |
Execute68k(proc, r); |
944 |
|
} |
945 |
|
|
946 |
|
/* |
995 |
|
} |
996 |
|
|
997 |
|
/* |
913 |
– |
* Atomic operations |
914 |
– |
*/ |
915 |
– |
|
916 |
– |
int atomic_add(int *var, int v) |
917 |
– |
{ |
918 |
– |
int ret = *var; |
919 |
– |
*var += v; |
920 |
– |
return ret; |
921 |
– |
} |
922 |
– |
|
923 |
– |
int atomic_and(int *var, int v) |
924 |
– |
{ |
925 |
– |
int ret = *var; |
926 |
– |
*var &= v; |
927 |
– |
return ret; |
928 |
– |
} |
929 |
– |
|
930 |
– |
int atomic_or(int *var, int v) |
931 |
– |
{ |
932 |
– |
int ret = *var; |
933 |
– |
*var |= v; |
934 |
– |
return ret; |
935 |
– |
} |
936 |
– |
|
937 |
– |
/* |
998 |
|
* Resource Manager thunks |
999 |
|
*/ |
1000 |
|
|