[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.20 by gbeauche, 2003-12-03T10:52:49Z vs.
Revision 1.69 by gbeauche, 2006-05-13T17:12:18Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 31 \| Line 31
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33		#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 49 \| Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 72 \| Line 84 \| static void enter_mon(void)
84		#endif
85		}
86
87	<	// Enable multicore (main/interrupts) cpu emulation?
88	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87	>	// From main_*.cpp
88	>	extern uintptr SignalStackBase();
89	>
90	>	// From rsrc_patches.cpp
91	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	>	extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h);
93	>
94	>	// PowerPC EmulOp to exit from emulation looop
95	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
96
97		// Enable Execute68k() safety checks?
98		#define SAFE_EXEC_68K 1
#	Line 88 \| Line 107 \| static void enter_mon(void)
107		#define INTERRUPTS_IN_NATIVE_MODE 1
108
109		// Pointer to Kernel Data
110	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110	>	static KernelData * kernel_data;
111
112		// SIGSEGV handler
113	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
114	>
115	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
116	>	// Special trampolines for EmulOp and NativeOp
117	>	static uint8 *emul_op_trampoline;
118	>	static uint8 *native_op_trampoline;
119	>	#endif
120
121		// JIT Compiler enabled?
122		static inline bool enable_jit_p()
#	Line 120 \| Line 145 \| public:
145		// Constructor
146		sheepshaver_cpu();
147
148	<	// Condition Register accessors
148	>	// CR & XER accessors
149		uint32 get_cr() const { return cr().get(); }
150		void set_cr(uint32 v) { cr().set(v); }
151	+	uint32 get_xer() const { return xer().get(); }
152	+	void set_xer(uint32 v) { xer().set(v); }
153	+
154	+	// Execute NATIVE_OP routine
155	+	void execute_native_op(uint32 native_op);
156	+
157	+	// Execute EMUL_OP routine
158	+	void execute_emul_op(uint32 emul_op);
159
160		// Execute 68k routine
161		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 133 \| Line 166 \| public:
166		// Execute MacOS/PPC code
167		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
168
169	+	#if PPC_ENABLE_JIT
170	+	// Compile one instruction
171	+	virtual int compile1(codegen_context_t & cg_context);
172	+	#endif
173		// Resource manager thunk
174		void get_resource(uint32 old_get_resource);
175
176		// Handle MacOS interrupt
177		void interrupt(uint32 entry);
141	–	void handle_interrupt();
142	–
143	–	// Lazy memory allocator (one item at a time)
144	–	void *operator new(size_t size)
145	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
146	–	void operator delete(void *p)
147	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
148	–	// FIXME: really make surre array allocation fail at link time?
149	–	void *operator new[](size_t);
150	–	void operator delete[](void *p);
178
179		// Make sure the SIGSEGV handler can access CPU registers
180		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
181		};
182
156	–	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
157	–
183		sheepshaver_cpu::sheepshaver_cpu()
184		: powerpc_cpu(enable_jit_p())
185		{
#	Line 163 \| Line 188 \| sheepshaver_cpu::sheepshaver_cpu()
188
189		void sheepshaver_cpu::init_decoder()
190		{
166	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
167	–	static bool initialized = false;
168	–	if (initialized)
169	–	return;
170	–	initialized = true;
171	–	#endif
172	–
191		static const instr_info_t sheep_ii_table[] = {
192		{ "sheep",
193		(execute_pmf)&sheepshaver_cpu::execute_sheep,
#	Line 188 \| Line 206 \| void sheepshaver_cpu::init_decoder()
206		}
207		}
208
191	–	// Forward declaration for native opcode handler
192	–	static void NativeOp(int selector);
193	–
209		/* NativeOp instruction format:
210	<	+------------+--------------------------+--+----------+------------+
211	<	\| 6 \| \|FN\| OP \| 2 \|
212	<	+------------+--------------------------+--+----------+------------+
213	<	0 5 \|6 19 20 21 25 26 31
210	>	+------------+-------------------------+--+-----------+------------+
211	>	\| 6 \| \|FN\| OP \| 2 \|
212	>	+------------+-------------------------+--+-----------+------------+
213	>	0 5 \|6 18 19 20 25 26 31
214		*/
215
216	<	typedef bit_field< 20, 20 > FN_field;
217	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
216	>	typedef bit_field< 19, 19 > FN_field;
217	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
218		typedef bit_field< 26, 31 > EMUL_OP_field;
219
220	+	// Execute EMUL_OP routine
221	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
222	+	{
223	+	M68kRegisters r68;
224	+	WriteMacInt32(XLM_68K_R25, gpr(25));
225	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
226	+	for (int i = 0; i < 8; i++)
227	+	r68.d[i] = gpr(8 + i);
228	+	for (int i = 0; i < 7; i++)
229	+	r68.a[i] = gpr(16 + i);
230	+	r68.a[7] = gpr(1);
231	+	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
232	+	uint32 saved_xer = get_xer();
233	+	EmulOp(&r68, gpr(24), emul_op);
234	+	set_cr(saved_cr);
235	+	set_xer(saved_xer);
236	+	for (int i = 0; i < 8; i++)
237	+	gpr(8 + i) = r68.d[i];
238	+	for (int i = 0; i < 7; i++)
239	+	gpr(16 + i) = r68.a[i];
240	+	gpr(1) = r68.a[7];
241	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
242	+	}
243	+
244		// Execute SheepShaver instruction
245		void sheepshaver_cpu::execute_sheep(uint32 opcode)
246		{
#	Line 218 \| Line 257 \| void sheepshaver_cpu::execute_sheep(uint
257		break;
258
259		case 2: // EXEC_NATIVE
260	<	NativeOp(NATIVE_OP_field::extract(opcode));
260	>	execute_native_op(NATIVE_OP_field::extract(opcode));
261		if (FN_field::test(opcode))
262		pc() = lr();
263		else
264		pc() += 4;
265		break;
266
267	<	default: { // EMUL_OP
268	<	M68kRegisters r68;
230	<	WriteMacInt32(XLM_68K_R25, gpr(25));
231	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
232	<	for (int i = 0; i < 8; i++)
233	<	r68.d[i] = gpr(8 + i);
234	<	for (int i = 0; i < 7; i++)
235	<	r68.a[i] = gpr(16 + i);
236	<	r68.a[7] = gpr(1);
237	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
238	<	for (int i = 0; i < 8; i++)
239	<	gpr(8 + i) = r68.d[i];
240	<	for (int i = 0; i < 7; i++)
241	<	gpr(16 + i) = r68.a[i];
242	<	gpr(1) = r68.a[7];
243	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
267	>	default: // EMUL_OP
268	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
269		pc() += 4;
270		break;
271		}
272	+	}
273	+
274	+	// Compile one instruction
275	+	#if PPC_ENABLE_JIT
276	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
277	+	{
278	+	const instr_info_t *ii = cg_context.instr_info;
279	+	if (ii->mnemo != PPC_I(SHEEP))
280	+	return COMPILE_FAILURE;
281	+
282	+	int status = COMPILE_FAILURE;
283	+	powerpc_dyngen & dg = cg_context.codegen;
284	+	uint32 opcode = cg_context.opcode;
285	+
286	+	switch (opcode & 0x3f) {
287	+	case 0: // EMUL_RETURN
288	+	dg.gen_invoke(QuitEmulator);
289	+	status = COMPILE_CODE_OK;
290	+	break;
291	+
292	+	case 1: // EXEC_RETURN
293	+	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
294	+	// Don't check for pending interrupts, we do know we have to
295	+	// get out of this block ASAP
296	+	dg.gen_exec_return();
297	+	status = COMPILE_EPILOGUE_OK;
298	+	break;
299	+
300	+	case 2: { // EXEC_NATIVE
301	+	uint32 selector = NATIVE_OP_field::extract(opcode);
302	+	switch (selector) {
303	+	#if !PPC_REENTRANT_JIT
304	+	// Filter out functions that may invoke Execute68k() or
305	+	// CallMacOS(), this would break reentrancy as they could
306	+	// invalidate the translation cache and even overwrite
307	+	// continuation code when we are done with them.
308	+	case NATIVE_PATCH_NAME_REGISTRY:
309	+	dg.gen_invoke(DoPatchNameRegistry);
310	+	status = COMPILE_CODE_OK;
311	+	break;
312	+	case NATIVE_VIDEO_INSTALL_ACCEL:
313	+	dg.gen_invoke(VideoInstallAccel);
314	+	status = COMPILE_CODE_OK;
315	+	break;
316	+	case NATIVE_VIDEO_VBL:
317	+	dg.gen_invoke(VideoVBL);
318	+	status = COMPILE_CODE_OK;
319	+	break;
320	+	case NATIVE_GET_RESOURCE:
321	+	case NATIVE_GET_1_RESOURCE:
322	+	case NATIVE_GET_IND_RESOURCE:
323	+	case NATIVE_GET_1_IND_RESOURCE:
324	+	case NATIVE_R_GET_RESOURCE: {
325	+	static const uint32 get_resource_ptr[] = {
326	+	XLM_GET_RESOURCE,
327	+	XLM_GET_1_RESOURCE,
328	+	XLM_GET_IND_RESOURCE,
329	+	XLM_GET_1_IND_RESOURCE,
330	+	XLM_R_GET_RESOURCE
331	+	};
332	+	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
333	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
334	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
335	+	dg.gen_invoke_CPU_im(func, old_get_resource);
336	+	status = COMPILE_CODE_OK;
337	+	break;
338	+	}
339	+	case NATIVE_CHECK_LOAD_INVOC:
340	+	dg.gen_load_T0_GPR(3);
341	+	dg.gen_load_T1_GPR(4);
342	+	dg.gen_se_16_32_T1();
343	+	dg.gen_load_T2_GPR(5);
344	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
345	+	status = COMPILE_CODE_OK;
346	+	break;
347	+	case NATIVE_NAMED_CHECK_LOAD_INVOC:
348	+	dg.gen_load_T0_GPR(3);
349	+	dg.gen_load_T1_GPR(4);
350	+	dg.gen_load_T2_GPR(5);
351	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
352	+	status = COMPILE_CODE_OK;
353	+	break;
354	+	#endif
355	+	case NATIVE_NQD_BITBLT:
356	+	dg.gen_load_T0_GPR(3);
357	+	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
358	+	status = COMPILE_CODE_OK;
359	+	break;
360	+	case NATIVE_NQD_INVRECT:
361	+	dg.gen_load_T0_GPR(3);
362	+	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
363	+	status = COMPILE_CODE_OK;
364	+	break;
365	+	case NATIVE_NQD_FILLRECT:
366	+	dg.gen_load_T0_GPR(3);
367	+	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
368	+	status = COMPILE_CODE_OK;
369	+	break;
370	+	}
371	+	// Could we fully translate this NativeOp?
372	+	if (status == COMPILE_CODE_OK) {
373	+	if (!FN_field::test(opcode))
374	+	cg_context.done_compile = false;
375	+	else {
376	+	dg.gen_load_A0_LR();
377	+	dg.gen_set_PC_A0();
378	+	cg_context.done_compile = true;
379	+	}
380	+	break;
381	+	}
382	+	#if PPC_REENTRANT_JIT
383	+	// Try to execute NativeOp trampoline
384	+	if (!FN_field::test(opcode))
385	+	dg.gen_set_PC_im(cg_context.pc + 4);
386	+	else {
387	+	dg.gen_load_A0_LR();
388	+	dg.gen_set_PC_A0();
389	+	}
390	+	dg.gen_mov_32_T0_im(selector);
391	+	dg.gen_jmp(native_op_trampoline);
392	+	cg_context.done_compile = true;
393	+	status = COMPILE_EPILOGUE_OK;
394	+	break;
395	+	#endif
396	+	// Invoke NativeOp handler
397	+	if (!FN_field::test(opcode)) {
398	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
399	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
400	+	dg.gen_invoke_CPU_im(func, selector);
401	+	cg_context.done_compile = false;
402	+	status = COMPILE_CODE_OK;
403	+	}
404	+	// Otherwise, let it generate a call to execute_sheep() which
405	+	// will cause necessary updates to the program counter
406	+	break;
407	+	}
408	+
409	+	default: { // EMUL_OP
410	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
411	+	#if PPC_REENTRANT_JIT
412	+	// Try to execute EmulOp trampoline
413	+	dg.gen_set_PC_im(cg_context.pc + 4);
414	+	dg.gen_mov_32_T0_im(emul_op);
415	+	dg.gen_jmp(emul_op_trampoline);
416	+	cg_context.done_compile = true;
417	+	status = COMPILE_EPILOGUE_OK;
418	+	break;
419	+	#endif
420	+	// Invoke EmulOp handler
421	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
422	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
423	+	dg.gen_invoke_CPU_im(func, emul_op);
424	+	cg_context.done_compile = false;
425	+	status = COMPILE_CODE_OK;
426	+	break;
427	+	}
428		}
429	+	return status;
430		}
431	+	#endif
432
433		// Handle MacOS interrupt
434		void sheepshaver_cpu::interrupt(uint32 entry)
435		{
436		#if EMUL_TIME_STATS
437	<	interrupt_count++;
437	>	ppc_interrupt_count++;
438		const clock_t interrupt_start = clock();
439		#endif
440
258	–	#if !MULTICORE_CPU
441		// Save program counters and branch registers
442		uint32 saved_pc = pc();
443		uint32 saved_lr = lr();
444		uint32 saved_ctr= ctr();
445		uint32 saved_sp = gpr(1);
264	–	#endif
446
447		// Initialize stack pointer to SheepShaver alternate stack base
448	<	gpr(1) = SheepStack1Base - 64;
448	>	gpr(1) = SignalStackBase() - 64;
449
450		// Build trampoline to return from interrupt
451	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
451	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
452
453		// Prepare registers for nanokernel interrupt routine
454		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 286 \| Line 467 \| void sheepshaver_cpu::interrupt(uint32 e
467		gpr(1) = KernelDataAddr;
468		gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
469		gpr(8) = 0;
470	<	gpr(10) = (uint32)trampoline;
471	<	gpr(12) = (uint32)trampoline;
470	>	gpr(10) = trampoline.addr();
471	>	gpr(12) = trampoline.addr();
472		gpr(13) = get_cr();
473
474		// rlwimi. r7,r7,8,0,0
#	Line 301 \| Line 482 \| void sheepshaver_cpu::interrupt(uint32 e
482		// Enter nanokernel
483		execute(entry);
484
304	–	#if !MULTICORE_CPU
485		// Restore program counters and branch registers
486		pc() = saved_pc;
487		lr() = saved_lr;
488		ctr()= saved_ctr;
489		gpr(1) = saved_sp;
310	–	#endif
490
491		#if EMUL_TIME_STATS
492		interrupt_time += (clock() - interrupt_start);
#	Line 424 \| Line 603 \| uint32 sheepshaver_cpu::execute_macos_co
603		uint32 saved_ctr= ctr();
604
605		// Build trampoline with EXEC_RETURN
606	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
607	<	lr() = (uint32)trampoline;
606	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
607	>	lr() = trampoline.addr();
608
609		gpr(1) -= 64; // Create stack frame
610		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 469 \| Line 648 \| inline void sheepshaver_cpu::execute_ppc
648		// Save branch registers
649		uint32 saved_lr = lr();
650
651	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
652	<	lr() = (uint32)trampoline;
651	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
652	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
653	>	lr() = trampoline.addr();
654
655		execute(entry);
656
#	Line 479 \| Line 659 \| inline void sheepshaver_cpu::execute_ppc
659		}
660
661		// Resource Manager thunk
482	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
483	–
662		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
663		{
664		uint32 type = gpr(3);
#	Line 506 \| Line 684 \| inline void sheepshaver_cpu::get_resourc
684		* SheepShaver CPU engine interface
685		**/
686
687	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
688	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
511	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
687	>	// PowerPC CPU emulator
688	>	static sheepshaver_cpu *ppc_cpu = NULL;
689
690		void FlushCodeCache(uintptr start, uintptr end)
691		{
692		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
693	<	main_cpu->invalidate_cache_range(start, end);
517	<	#if MULTICORE_CPU
518	<	interrupt_cpu->invalidate_cache_range(start, end);
519	<	#endif
520	<	}
521	<
522	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
523	<	{
524	<	#if MULTICORE_CPU
525	<	current_cpu = new_cpu;
526	<	#endif
527	<	}
528	<
529	<	static inline void cpu_pop()
530	<	{
531	<	#if MULTICORE_CPU
532	<	current_cpu = main_cpu;
533	<	#endif
693	>	ppc_cpu->invalidate_cache_range(start, end);
694		}
695
696		// Dump PPC registers
697		static void dump_registers(void)
698		{
699	<	current_cpu->dump_registers();
699	>	ppc_cpu->dump_registers();
700		}
701
702		// Dump log
703		static void dump_log(void)
704		{
705	<	current_cpu->dump_log();
705	>	ppc_cpu->dump_log();
706		}
707
708		/*
709		* Initialize CPU emulation
710		*/
711
712	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
712	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
713		{
714		#if ENABLE_VOSF
715		// Handle screen fault
#	Line 561 \| Line 721 \| static sigsegv_return_t sigsegv_handler(
721		const uintptr addr = (uintptr)fault_address;
722		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
723		// Ignore writes to ROM
724	<	if ((addr - ROM_BASE) < ROM_SIZE)
724	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
725		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
726
727		// Get program counter of target CPU
728	<	sheepshaver_cpu * const cpu = current_cpu;
728	>	sheepshaver_cpu * const cpu = ppc_cpu;
729		const uint32 pc = cpu->pc();
730
731		// Fault in Mac ROM or RAM?
732	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
732	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
733		if (mac_fault) {
734
735		// "VM settings" during MacOS 8 installation
#	Line 589 \| Line 749 \| static sigsegv_return_t sigsegv_handler(
749		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
750		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
751		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
752	+
753	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
754	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
755	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
756	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
757	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
758	+
759	+	// Ignore writes to the zero page
760	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
761	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
762
763		// Ignore all other faults, if requested
764		if (PrefsFindBool("ignoresegv"))
#	Line 598 \| Line 768 \| static sigsegv_return_t sigsegv_handler(
768		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
769		#endif
770
771	<	printf("SIGSEGV\n");
772	<	printf(" pc %p\n", fault_instruction);
773	<	printf(" ea %p\n", fault_address);
604	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
771	>	fprintf(stderr, "SIGSEGV\n");
772	>	fprintf(stderr, " pc %p\n", fault_instruction);
773	>	fprintf(stderr, " ea %p\n", fault_address);
774		dump_registers();
775	<	current_cpu->dump_log();
775	>	ppc_cpu->dump_log();
776		enter_mon();
777		QuitEmulator();
778
#	Line 612 \| Line 781 \| static sigsegv_return_t sigsegv_handler(
781
782		void init_emul_ppc(void)
783		{
784	+	// Get pointer to KernelData in host address space
785	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
786	+
787		// Initialize main CPU emulator
788	<	main_cpu = new sheepshaver_cpu();
789	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
788	>	ppc_cpu = new sheepshaver_cpu();
789	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
790	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
791		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
792
620	–	#if MULTICORE_CPU
621	–	// Initialize alternate CPU emulator to handle interrupts
622	–	interrupt_cpu = new sheepshaver_cpu();
623	–	#endif
624	–
625	–	// Install the handler for SIGSEGV
626	–	sigsegv_install_handler(sigsegv_handler);
627	–
793		#if ENABLE_MON
794		// Install "regs" command in cxmon
795		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 650 \| Line 815 \| void exit_emul_ppc(void)
815		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
816		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
817		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
818	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
819	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
820
821		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
822		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 666 \| Line 833 \| void exit_emul_ppc(void)
833		printf("\n");
834		#endif
835
836	<	delete main_cpu;
837	<	#if MULTICORE_CPU
671	<	delete interrupt_cpu;
672	<	#endif
836	>	delete ppc_cpu;
837	>	ppc_cpu = NULL;
838		}
839
840	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
841	+	// Initialize EmulOp trampolines
842	+	void init_emul_op_trampolines(basic_dyngen & dg)
843	+	{
844	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
845	+	func_t func;
846	+
847	+	// EmulOp
848	+	emul_op_trampoline = dg.gen_start();
849	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
850	+	dg.gen_invoke_CPU_T0(func);
851	+	dg.gen_exec_return();
852	+	dg.gen_end();
853	+
854	+	// NativeOp
855	+	native_op_trampoline = dg.gen_start();
856	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
857	+	dg.gen_invoke_CPU_T0(func);
858	+	dg.gen_exec_return();
859	+	dg.gen_end();
860	+
861	+	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
862	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
863	+	}
864	+	#endif
865	+
866		/*
867		* Emulation loop
868		*/
869
870		void emul_ppc(uint32 entry)
871		{
872	<	current_cpu = main_cpu;
873	<	#if DEBUG
683	<	current_cpu->start_log();
872	>	#if 0
873	>	ppc_cpu->start_log();
874		#endif
875		// start emulation loop and enable code translation or caching
876	<	current_cpu->execute(entry);
876	>	ppc_cpu->execute(entry);
877		}
878
879		/*
880		* Handle PowerPC interrupt
881		*/
882
693	–	#if ASYNC_IRQ
694	–	void HandleInterrupt(void)
695	–	{
696	–	main_cpu->handle_interrupt();
697	–	}
698	–	#else
883		void TriggerInterrupt(void)
884		{
885	+	idle_resume();
886		#if 0
887		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
888		#else
889		// Trigger interrupt to main cpu only
890	<	if (main_cpu)
891	<	main_cpu->trigger_interrupt();
890	>	if (ppc_cpu)
891	>	ppc_cpu->trigger_interrupt();
892		#endif
893		}
709	–	#endif
894
895	<	void sheepshaver_cpu::handle_interrupt(void)
895	>	void HandleInterrupt(powerpc_registers *r)
896		{
897	<	// Do nothing if interrupts are disabled
898	<	if ((int32 )XLM_IRQ_NEST > 0)
899	<	return;
897	>	#ifdef USE_SDL_VIDEO
898	>	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
899	>	SDL_PumpEvents();
900	>	#endif
901
902	<	// Do nothing if there is no interrupt pending
903	<	if (InterruptFlags == 0)
902	>	// Do nothing if interrupts are disabled
903	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
904		return;
905
906	<	// Disable MacOS stack sniffer
907	<	WriteMacInt32(0x110, 0);
906	>	// Update interrupt count
907	>	#if EMUL_TIME_STATS
908	>	interrupt_count++;
909	>	#endif
910
911		// Interrupt action depends on current run mode
912		switch (ReadMacInt32(XLM_RUN_MODE)) {
913		case MODE_68K:
914		// 68k emulator active, trigger 68k interrupt level 1
728	–	assert(current_cpu == main_cpu);
915		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
916	<	set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
916	>	r->cr.set(r->cr.get() \| tswap32(kernel_data->v[0x674 >> 2]));
917		break;
918
919		#if INTERRUPTS_IN_NATIVE_MODE
920		case MODE_NATIVE:
921		// 68k emulator inactive, in nanokernel?
922	<	assert(current_cpu == main_cpu);
923	<	if (gpr(1) != KernelDataAddr) {
922	>	if (r->gpr[1] != KernelDataAddr) {
923	>
924		// Prepare for 68k interrupt level 1
925		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
926		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 743 \| Line 929 \| void sheepshaver_cpu::handle_interrupt(v
929
930		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
931		DisableInterrupt();
746	–	cpu_push(interrupt_cpu);
932		if (ROMType == ROMTYPE_NEWWORLD)
933	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
933	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
934		else
935	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
751	<	cpu_pop();
935	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
936		}
937		break;
938		#endif
#	Line 757 \| Line 941 \| void sheepshaver_cpu::handle_interrupt(v
941		case MODE_EMUL_OP:
942		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
943		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
944	+	#if EMUL_TIME_STATS
945	+	const clock_t interrupt_start = clock();
946	+	#endif
947		#if 1
948		// Execute full 68k interrupt routine
949		M68kRegisters r;
950		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
951		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
952	<	static const uint8 proc[] = {
952	>	static const uint8 proc_template[] = {
953		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
954		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
955		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 770 \| Line 957 \| void sheepshaver_cpu::handle_interrupt(v
957		0x4e, 0xd0, // jmp (a0)
958		M68K_RTS >> 8, M68K_RTS & 0xff // @1
959		};
960	<	Execute68k((uint32)proc, &r);
960	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
961	>	Execute68k(proc, &r);
962		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
963		#else
964		// Only update cursor
#	Line 778 \| Line 966 \| void sheepshaver_cpu::handle_interrupt(v
966		if (InterruptFlags & INTFLAG_VIA) {
967		ClearInterruptFlag(INTFLAG_VIA);
968		ADBInterrupt();
969	<	ExecutePPC(VideoVBL);
969	>	ExecuteNative(NATIVE_VIDEO_VBL);
970		}
971		}
972		#endif
973	+	#if EMUL_TIME_STATS
974	+	interrupt_time += (clock() - interrupt_start);
975	+	#endif
976		}
977		break;
978		#endif
979		}
980		}
981
982	<	/*
983	<	* Execute NATIVE_OP opcode (called by PowerPC emulator)
793	<	*/
794	<
795	<	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
796	<	tswap32(POWERPC_EMUL_OP \| ((LR) << 11) \| (((uint32)OP) << 6) \| 2)
797	<
798	<	// FIXME: Make sure 32-bit relocations are used
799	<	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
800	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
801	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
802	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
803	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
804	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
805	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
806	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
807	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
808	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
809	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
810	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
811	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
812	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
813	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
814	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
815	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
816	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
817	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
818	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
819	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
820	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
821	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
822	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
823	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
824	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
825	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
826	<	};
827	<
828	<	static void get_resource(void);
829	<	static void get_1_resource(void);
830	<	static void get_ind_resource(void);
831	<	static void get_1_ind_resource(void);
832	<	static void r_get_resource(void);
833	<
834	<	#define GPR(REG) current_cpu->gpr(REG)
835	<
836	<	static void NativeOp(int selector)
982	>	// Execute NATIVE_OP routine
983	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
984		{
985		#if EMUL_TIME_STATS
986		native_exec_count++;
#	Line 851 \| Line 998 \| static void NativeOp(int selector)
998		VideoVBL();
999		break;
1000		case NATIVE_VIDEO_DO_DRIVER_IO:
1001	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
1002	<	(void *)GPR(5), GPR(6), GPR(7));
1001	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1002	>	break;
1003	>	case NATIVE_ETHER_AO_GET_HWADDR:
1004	>	AO_get_ethernet_address(gpr(3));
1005	>	break;
1006	>	case NATIVE_ETHER_AO_ADD_MULTI:
1007	>	AO_enable_multicast(gpr(3));
1008	>	break;
1009	>	case NATIVE_ETHER_AO_DEL_MULTI:
1010	>	AO_disable_multicast(gpr(3));
1011	>	break;
1012	>	case NATIVE_ETHER_AO_SEND_PACKET:
1013	>	AO_transmit_packet(gpr(3));
1014		break;
857	–	#ifdef WORDS_BIGENDIAN
1015		case NATIVE_ETHER_IRQ:
1016		EtherIRQ();
1017		break;
1018		case NATIVE_ETHER_INIT:
1019	<	GPR(3) = InitStreamModule((void *)GPR(3));
1019	>	gpr(3) = InitStreamModule((void *)gpr(3));
1020		break;
1021		case NATIVE_ETHER_TERM:
1022		TerminateStreamModule();
1023		break;
1024		case NATIVE_ETHER_OPEN:
1025	<	GPR(3) = ether_open((queue_t )GPR(3), (void )GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1025	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1026		break;
1027		case NATIVE_ETHER_CLOSE:
1028	<	GPR(3) = ether_close((queue_t )GPR(3), GPR(4), (void )GPR(5));
1028	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1029		break;
1030		case NATIVE_ETHER_WPUT:
1031	<	GPR(3) = ether_wput((queue_t )GPR(3), (mblk_t )GPR(4));
1031	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1032		break;
1033		case NATIVE_ETHER_RSRV:
1034	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1034	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1035		break;
1036	<	#else
1037	<	case NATIVE_ETHER_INIT:
1038	<	// FIXME: needs more complicated thunks
1039	<	GPR(3) = false;
1036	>	case NATIVE_NQD_SYNC_HOOK:
1037	>	gpr(3) = NQD_sync_hook(gpr(3));
1038	>	break;
1039	>	case NATIVE_NQD_BITBLT_HOOK:
1040	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1041	>	break;
1042	>	case NATIVE_NQD_BITBLT:
1043	>	NQD_bitblt(gpr(3));
1044	>	break;
1045	>	case NATIVE_NQD_FILLRECT_HOOK:
1046	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1047	>	break;
1048	>	case NATIVE_NQD_INVRECT:
1049	>	NQD_invrect(gpr(3));
1050	>	break;
1051	>	case NATIVE_NQD_FILLRECT:
1052	>	NQD_fillrect(gpr(3));
1053		break;
884	–	#endif
1054		case NATIVE_SERIAL_NOTHING:
1055		case NATIVE_SERIAL_OPEN:
1056		case NATIVE_SERIAL_PRIME_IN:
#	Line 899 \| Line 1068 \| static void NativeOp(int selector)
1068		SerialStatus,
1069		SerialClose
1070		};
1071	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1071	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1072		break;
1073		}
1074		case NATIVE_GET_RESOURCE:
1075	+	get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1076	+	break;
1077		case NATIVE_GET_1_RESOURCE:
1078	+	get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1079	+	break;
1080		case NATIVE_GET_IND_RESOURCE:
1081	<	case NATIVE_GET_1_IND_RESOURCE:
909	<	case NATIVE_R_GET_RESOURCE: {
910	<	typedef void (*GetResourceCallback)(void);
911	<	static const GetResourceCallback get_resource_callbacks[] = {
912	<	get_resource,
913	<	get_1_resource,
914	<	get_ind_resource,
915	<	get_1_ind_resource,
916	<	r_get_resource
917	<	};
918	<	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1081	>	get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1082		break;
1083	<	}
1084	<	case NATIVE_DISABLE_INTERRUPT:
922	<	DisableInterrupt();
1083	>	case NATIVE_GET_1_IND_RESOURCE:
1084	>	get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1085		break;
1086	<	case NATIVE_ENABLE_INTERRUPT:
1087	<	EnableInterrupt();
1086	>	case NATIVE_R_GET_RESOURCE:
1087	>	get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1088		break;
1089		case NATIVE_MAKE_EXECUTABLE:
1090	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1090	>	MakeExecutable(0, gpr(4), gpr(5));
1091	>	break;
1092	>	case NATIVE_CHECK_LOAD_INVOC:
1093	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1094	>	break;
1095	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
1096	>	named_check_load_invoc(gpr(3), gpr(4), gpr(5));
1097		break;
1098		default:
1099		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 939 \| Line 1107 \| static void NativeOp(int selector)
1107		}
1108
1109		/*
942	–	* Execute native subroutine (LR must contain return address)
943	–	*/
944	–
945	–	void ExecuteNative(int selector)
946	–	{
947	–	uint32 tvect[2];
948	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
949	–	tvect[1] = 0; // Fake TVECT
950	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
951	–	M68kRegisters r;
952	–	Execute68k((uint32)&desc, &r);
953	–	}
954	–
955	–	/*
1110		* Execute 68k subroutine (must be ended with EXEC_RETURN)
1111		* This must only be called by the emul_thread when in EMUL_OP mode
1112		* r->a[7] is unused, the routine runs on the caller's stack
#	Line 960 \| Line 1114 \| void ExecuteNative(int selector)
1114
1115		void Execute68k(uint32 pc, M68kRegisters *r)
1116		{
1117	<	current_cpu->execute_68k(pc, r);
1117	>	ppc_cpu->execute_68k(pc, r);
1118		}
1119
1120		/*
#	Line 970 \| Line 1124 \| void Execute68k(uint32 pc, M68kRegisters
1124
1125		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1126		{
1127	<	uint16 proc[2];
1128	<	proc[0] = htons(trap);
1129	<	proc[1] = htons(M68K_RTS);
1130	<	Execute68k((uint32)proc, r);
1127	>	SheepVar proc_var(4);
1128	>	uint32 proc = proc_var.addr();
1129	>	WriteMacInt16(proc, trap);
1130	>	WriteMacInt16(proc + 2, M68K_RTS);
1131	>	Execute68k(proc, r);
1132		}
1133
1134		/*
#	Line 982 \| Line 1137 \| void Execute68kTrap(uint16 trap, M68kReg
1137
1138		uint32 call_macos(uint32 tvect)
1139		{
1140	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1140	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1141		}
1142
1143		uint32 call_macos1(uint32 tvect, uint32 arg1)
1144		{
1145		const uint32 args[] = { arg1 };
1146	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1146	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1147		}
1148
1149		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1150		{
1151		const uint32 args[] = { arg1, arg2 };
1152	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1152	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1153		}
1154
1155		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1156		{
1157		const uint32 args[] = { arg1, arg2, arg3 };
1158	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1158	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1159		}
1160
1161		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1162		{
1163		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1164	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1164	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1165		}
1166
1167		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1168		{
1169		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1170	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1170	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1171		}
1172
1173		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1174		{
1175		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1176	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1176	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1177		}
1178
1179		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1180		{
1181		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1182	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1028	<	}
1029	<
1030	<	/*
1031	<	* Resource Manager thunks
1032	<	*/
1033	<
1034	<	void get_resource(void)
1035	<	{
1036	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1037	<	}
1038	<
1039	<	void get_1_resource(void)
1040	<	{
1041	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1042	<	}
1043	<
1044	<	void get_ind_resource(void)
1045	<	{
1046	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1047	<	}
1048	<
1049	<	void get_1_ind_resource(void)
1050	<	{
1051	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1052	<	}
1053	<
1054	<	void r_get_resource(void)
1055	<	{
1056	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1182	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1183		}

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.20 by gbeauche, 2003-12-03T10:52:49Z vs. Revision 1.69 by gbeauche, 2006-05-13T17:12:18Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.20 by gbeauche, 2003-12-03T10:52:49Z vs.
Revision 1.69 by gbeauche, 2006-05-13T17:12:18Z