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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.20 by gbeauche, 2003-12-03T10:52:49Z vs.
Revision 1.33 by gbeauche, 2004-04-22T20:57:31Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 31 | Line 31
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33		#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
#	Line 39 | Line 40
40		#include "ether.h"
41
42		#include <stdio.h>
43	+	#include <stdlib.h>
44
45		#if ENABLE_MON
46		#include "mon.h"
#	Line 72 | Line 74 | static void enter_mon(void)
74		#endif
75		}
76
77	+	// From main_*.cpp
78	+	extern uintptr SignalStackBase();
79	+
80	+	// From rsrc_patches.cpp
81	+	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
82	+
83	+	// PowerPC EmulOp to exit from emulation looop
84	+	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
85	+
86		// Enable multicore (main/interrupts) cpu emulation?
87		#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
88
#	Line 120 | Line 131 | public:
131		// Constructor
132		sheepshaver_cpu();
133
134	<	// Condition Register accessors
134	>	// CR & XER accessors
135		uint32 get_cr() const           { return cr().get(); }
136		void set_cr(uint32 v)           { cr().set(v); }
137	+	uint32 get_xer() const          { return xer().get(); }
138	+	void set_xer(uint32 v)          { xer().set(v); }
139	+
140	+	// Execute EMUL_OP routine
141	+	void execute_emul_op(uint32 emul_op);
142
143		// Execute 68k routine
144		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 133 | Line 149 | public:
149		// Execute MacOS/PPC code
150		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
151
152	+	// Compile one instruction
153	+	virtual bool compile1(codegen_context_t & cg_context);
154	+
155		// Resource manager thunk
156		void get_resource(uint32 old_get_resource);
157
#	Line 140 | Line 159 | public:
159		void interrupt(uint32 entry);
160		void handle_interrupt();
161
143	–	// Lazy memory allocator (one item at a time)
144	–	void *operator new(size_t size)
145	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
146	–	void operator delete(void *p)
147	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
148	–	// FIXME: really make surre array allocation fail at link time?
149	–	void *operator new[](size_t);
150	–	void operator delete[](void *p);
151	–
162		// Make sure the SIGSEGV handler can access CPU registers
163		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
164		};
165
166	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
166	>	// Memory allocator returning areas aligned on 16-byte boundaries
167	>	void *operator new(size_t size)
168	>	{
169	>	void *p;
170	>
171	>	#if defined(HAVE_POSIX_MEMALIGN)
172	>	if (posix_memalign(&p, 16, size) != 0)
173	>	throw std::bad_alloc();
174	>	#elif defined(HAVE_MEMALIGN)
175	>	p = memalign(16, size);
176	>	#elif defined(HAVE_VALLOC)
177	>	p = valloc(size); // page-aligned!
178	>	#else
179	>	/* XXX: handle padding ourselves */
180	>	p = malloc(size);
181	>	#endif
182	>
183	>	return p;
184	>	}
185	>
186	>	void operator delete(void *p)
187	>	{
188	>	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
189	>	#if defined(__GLIBC__)
190	>	// this is known to work only with GNU libc
191	>	free(p);
192	>	#endif
193	>	#else
194	>	free(p);
195	>	#endif
196	>	}
197
198		sheepshaver_cpu::sheepshaver_cpu()
199		: powerpc_cpu(enable_jit_p())
#	Line 163 | Line 203 | sheepshaver_cpu::sheepshaver_cpu()
203
204		void sheepshaver_cpu::init_decoder()
205		{
166	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
167	–	static bool initialized = false;
168	–	if (initialized)
169	–	return;
170	–	initialized = true;
171	–	#endif
172	–
206		static const instr_info_t sheep_ii_table[] = {
207		{ "sheep",
208		(execute_pmf)&sheepshaver_cpu::execute_sheep,
#	Line 202 | Line 235 | typedef bit_field< 20, 20 > FN_field;
235		typedef bit_field< 21, 25 > NATIVE_OP_field;
236		typedef bit_field< 26, 31 > EMUL_OP_field;
237
238	+	// Execute EMUL_OP routine
239	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
240	+	{
241	+	M68kRegisters r68;
242	+	WriteMacInt32(XLM_68K_R25, gpr(25));
243	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
244	+	for (int i = 0; i < 8; i++)
245	+	r68.d[i] = gpr(8 + i);
246	+	for (int i = 0; i < 7; i++)
247	+	r68.a[i] = gpr(16 + i);
248	+	r68.a[7] = gpr(1);
249	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
250	+	uint32 saved_xer = get_xer();
251	+	EmulOp(&r68, gpr(24), emul_op);
252	+	set_cr(saved_cr);
253	+	set_xer(saved_xer);
254	+	for (int i = 0; i < 8; i++)
255	+	gpr(8 + i) = r68.d[i];
256	+	for (int i = 0; i < 7; i++)
257	+	gpr(16 + i) = r68.a[i];
258	+	gpr(1) = r68.a[7];
259	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
260	+	}
261	+
262		// Execute SheepShaver instruction
263		void sheepshaver_cpu::execute_sheep(uint32 opcode)
264		{
#	Line 225 | Line 282 | void sheepshaver_cpu::execute_sheep(uint
282		pc() += 4;
283		break;
284
285	<	default: {      // EMUL_OP
286	<	M68kRegisters r68;
230	<	WriteMacInt32(XLM_68K_R25, gpr(25));
231	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
232	<	for (int i = 0; i < 8; i++)
233	<	r68.d[i] = gpr(8 + i);
234	<	for (int i = 0; i < 7; i++)
235	<	r68.a[i] = gpr(16 + i);
236	<	r68.a[7] = gpr(1);
237	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
238	<	for (int i = 0; i < 8; i++)
239	<	gpr(8 + i) = r68.d[i];
240	<	for (int i = 0; i < 7; i++)
241	<	gpr(16 + i) = r68.a[i];
242	<	gpr(1) = r68.a[7];
243	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
285	>	default:        // EMUL_OP
286	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
287		pc() += 4;
288		break;
289		}
290	+	}
291	+
292	+	// Compile one instruction
293	+	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
294	+	{
295	+	#if PPC_ENABLE_JIT
296	+	const instr_info_t *ii = cg_context.instr_info;
297	+	if (ii->mnemo != PPC_I(SHEEP))
298	+	return false;
299	+
300	+	bool compiled = false;
301	+	powerpc_dyngen & dg = cg_context.codegen;
302	+	uint32 opcode = cg_context.opcode;
303	+
304	+	switch (opcode & 0x3f) {
305	+	case 0:         // EMUL_RETURN
306	+	dg.gen_invoke(QuitEmulator);
307	+	compiled = true;
308	+	break;
309	+
310	+	case 1:         // EXEC_RETURN
311	+	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
312	+	compiled = true;
313	+	break;
314	+
315	+	case 2: {       // EXEC_NATIVE
316	+	uint32 selector = NATIVE_OP_field::extract(opcode);
317	+	switch (selector) {
318	+	case NATIVE_PATCH_NAME_REGISTRY:
319	+	dg.gen_invoke(DoPatchNameRegistry);
320	+	compiled = true;
321	+	break;
322	+	case NATIVE_VIDEO_INSTALL_ACCEL:
323	+	dg.gen_invoke(VideoInstallAccel);
324	+	compiled = true;
325	+	break;
326	+	case NATIVE_VIDEO_VBL:
327	+	dg.gen_invoke(VideoVBL);
328	+	compiled = true;
329	+	break;
330	+	case NATIVE_GET_RESOURCE:
331	+	case NATIVE_GET_1_RESOURCE:
332	+	case NATIVE_GET_IND_RESOURCE:
333	+	case NATIVE_GET_1_IND_RESOURCE:
334	+	case NATIVE_R_GET_RESOURCE: {
335	+	static const uint32 get_resource_ptr[] = {
336	+	XLM_GET_RESOURCE,
337	+	XLM_GET_1_RESOURCE,
338	+	XLM_GET_IND_RESOURCE,
339	+	XLM_GET_1_IND_RESOURCE,
340	+	XLM_R_GET_RESOURCE
341	+	};
342	+	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
343	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
344	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
345	+	dg.gen_invoke_CPU_im(func, old_get_resource);
346	+	compiled = true;
347	+	break;
348	+	}
349	+	case NATIVE_DISABLE_INTERRUPT:
350	+	dg.gen_invoke(DisableInterrupt);
351	+	compiled = true;
352	+	break;
353	+	case NATIVE_ENABLE_INTERRUPT:
354	+	dg.gen_invoke(EnableInterrupt);
355	+	compiled = true;
356	+	break;
357	+	case NATIVE_CHECK_LOAD_INVOC:
358	+	dg.gen_load_T0_GPR(3);
359	+	dg.gen_load_T1_GPR(4);
360	+	dg.gen_se_16_32_T1();
361	+	dg.gen_load_T2_GPR(5);
362	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
363	+	compiled = true;
364	+	break;
365	+	}
366	+	if (FN_field::test(opcode)) {
367	+	if (compiled) {
368	+	dg.gen_load_A0_LR();
369	+	dg.gen_set_PC_A0();
370	+	}
371	+	cg_context.done_compile = true;
372	+	}
373	+	else
374	+	cg_context.done_compile = false;
375	+	break;
376	+	}
377	+
378	+	default: {      // EMUL_OP
379	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
380	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
381	+	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
382	+	cg_context.done_compile = false;
383	+	compiled = true;
384	+	break;
385		}
386	+	}
387	+	return compiled;
388	+	#endif
389	+	return false;
390		}
391
392		// Handle MacOS interrupt
#	Line 264 | Line 406 | void sheepshaver_cpu::interrupt(uint32 e
406		#endif
407
408		// Initialize stack pointer to SheepShaver alternate stack base
409	<	gpr(1) = SheepStack1Base - 64;
409	>	gpr(1) = SignalStackBase() - 64;
410
411		// Build trampoline to return from interrupt
412	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
412	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
413
414		// Prepare registers for nanokernel interrupt routine
415		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 286 | Line 428 | void sheepshaver_cpu::interrupt(uint32 e
428		gpr(1)  = KernelDataAddr;
429		gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
430		gpr(8)  = 0;
431	<	gpr(10) = (uint32)trampoline;
432	<	gpr(12) = (uint32)trampoline;
431	>	gpr(10) = trampoline.addr();
432	>	gpr(12) = trampoline.addr();
433		gpr(13) = get_cr();
434
435		// rlwimi. r7,r7,8,0,0
#	Line 424 | Line 566 | uint32 sheepshaver_cpu::execute_macos_co
566		uint32 saved_ctr= ctr();
567
568		// Build trampoline with EXEC_RETURN
569	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
570	<	lr() = (uint32)trampoline;
569	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
570	>	lr() = trampoline.addr();
571
572		gpr(1) -= 64;                                                           // Create stack frame
573		uint32 proc = ReadMacInt32(tvect);                      // Get routine address
#	Line 469 | Line 611 | inline void sheepshaver_cpu::execute_ppc
611		// Save branch registers
612		uint32 saved_lr = lr();
613
614	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
615	<	lr() = (uint32)trampoline;
614	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
615	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
616	>	lr() = trampoline.addr();
617
618		execute(entry);
619
#	Line 479 | Line 622 | inline void sheepshaver_cpu::execute_ppc
622		}
623
624		// Resource Manager thunk
482	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
483	–
625		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
626		{
627		uint32 type = gpr(3);
#	Line 590 | Line 731 | static sigsegv_return_t sigsegv_handler(
731		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
732		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
733
734	+	// Ignore writes to the zero page
735	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
736	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
737	+
738		// Ignore all other faults, if requested
739		if (PrefsFindBool("ignoresegv"))
740		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
#	Line 615 | Line 760 | void init_emul_ppc(void)
760		// Initialize main CPU emulator
761		main_cpu = new sheepshaver_cpu();
762		main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
763	+	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
764		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
765
766		#if MULTICORE_CPU
#	Line 679 | Line 825 | void exit_emul_ppc(void)
825		void emul_ppc(uint32 entry)
826		{
827		current_cpu = main_cpu;
828	<	#if DEBUG
828	>	#if 0
829		current_cpu->start_log();
830		#endif
831		// start emulation loop and enable code translation or caching
#	Line 778 | Line 924 | void sheepshaver_cpu::handle_interrupt(v
924		if (InterruptFlags & INTFLAG_VIA) {
925		ClearInterruptFlag(INTFLAG_VIA);
926		ADBInterrupt();
927	<	ExecutePPC(VideoVBL);
927	>	ExecuteNative(NATIVE_VIDEO_VBL);
928		}
929		}
930		#endif
#	Line 788 | Line 934 | void sheepshaver_cpu::handle_interrupt(v
934		}
935		}
936
791	–	/*
792	–	*  Execute NATIVE_OP opcode (called by PowerPC emulator)
793	–	*/
794	–
795	–	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
796	–	tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
797	–
798	–	// FIXME: Make sure 32-bit relocations are used
799	–	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
800	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
801	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
802	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
803	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
804	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
805	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
806	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
807	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
808	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
809	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
810	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
811	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
812	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
813	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
814	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
815	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
816	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
817	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
818	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
819	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
820	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
821	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
822	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
823	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
824	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
825	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
826	–	};
827	–
937		static void get_resource(void);
938		static void get_1_resource(void);
939		static void get_ind_resource(void);
#	Line 876 | Line 985 | static void NativeOp(int selector)
985		case NATIVE_ETHER_RSRV:
986		GPR(3) = ether_rsrv((queue_t *)GPR(3));
987		break;
988	+	case NATIVE_SYNC_HOOK:
989	+	GPR(3) = NQD_sync_hook(GPR(3));
990	+	break;
991	+	case NATIVE_BITBLT_HOOK:
992	+	GPR(3) = NQD_bitblt_hook(GPR(3));
993	+	break;
994	+	case NATIVE_BITBLT:
995	+	NQD_bitblt(GPR(3));
996	+	break;
997	+	case NATIVE_FILLRECT_HOOK:
998	+	GPR(3) = NQD_fillrect_hook(GPR(3));
999	+	break;
1000	+	case NATIVE_INVRECT:
1001	+	NQD_invrect(GPR(3));
1002	+	break;
1003	+	case NATIVE_FILLRECT:
1004	+	NQD_fillrect(GPR(3));
1005	+	break;
1006		#else
1007		case NATIVE_ETHER_INIT:
1008		// FIXME: needs more complicated thunks
#	Line 927 | Line 1054 | static void NativeOp(int selector)
1054		case NATIVE_MAKE_EXECUTABLE:
1055		MakeExecutable(0, (void *)GPR(4), GPR(5));
1056		break;
1057	+	case NATIVE_CHECK_LOAD_INVOC:
1058	+	check_load_invoc(GPR(3), GPR(4), GPR(5));
1059	+	break;
1060		default:
1061		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1062		QuitEmulator();
#	Line 939 | Line 1069 | static void NativeOp(int selector)
1069		}
1070
1071		/*
942	–	*  Execute native subroutine (LR must contain return address)
943	–	*/
944	–
945	–	void ExecuteNative(int selector)
946	–	{
947	–	uint32 tvect[2];
948	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
949	–	tvect[1] = 0; // Fake TVECT
950	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
951	–	M68kRegisters r;
952	–	Execute68k((uint32)&desc, &r);
953	–	}
954	–
955	–	/*
1072		*  Execute 68k subroutine (must be ended with EXEC_RETURN)
1073		*  This must only be called by the emul_thread when in EMUL_OP mode
1074		*  r->a[7] is unused, the routine runs on the caller's stack
#	Line 970 | Line 1086 | void Execute68k(uint32 pc, M68kRegisters
1086
1087		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1088		{
1089	<	uint16 proc[2];
1090	<	proc[0] = htons(trap);
1091	<	proc[1] = htons(M68K_RTS);
1092	<	Execute68k((uint32)proc, r);
1089	>	SheepVar proc_var(4);
1090	>	uint32 proc = proc_var.addr();
1091	>	WriteMacInt16(proc, trap);
1092	>	WriteMacInt16(proc + 2, M68K_RTS);
1093	>	Execute68k(proc, r);
1094		}
1095
1096		/*

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