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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.2 by gbeauche, 2003-09-28T21:27:34Z vs.
Revision 1.51 by gbeauche, 2004-07-11T08:12:21Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 21 | Line 21
21		#include "sysdeps.h"
22		#include "cpu_emulation.h"
23		#include "main.h"
24	+	#include "prefs.h"
25		#include "xlowmem.h"
26		#include "emul_op.h"
27		#include "rom_patches.h"
28		#include "macos_util.h"
29		#include "block-alloc.hpp"
30		#include "sigsegv.h"
30	–	#include "spcflags.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+
46	+	#ifdef USE_SDL_VIDEO
47	+	#include <SDL_events.h>
48	+	#endif
49
50		#if ENABLE_MON
51		#include "mon.h"
52		#include "mon_disass.h"
53		#endif
54
55	<	#define DEBUG 1
55	>	#define DEBUG 0
56		#include "debug.h"
57
58	+	// Emulation time statistics
59	+	#ifndef EMUL_TIME_STATS
60	+	#define EMUL_TIME_STATS 0
61	+	#endif
62	+
63	+	#if EMUL_TIME_STATS
64	+	static clock_t emul_start_time;
65	+	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
66	+	static clock_t interrupt_time = 0;
67	+	static uint32 exec68k_count = 0;
68	+	static clock_t exec68k_time = 0;
69	+	static uint32 native_exec_count = 0;
70	+	static clock_t native_exec_time = 0;
71	+	static uint32 macos_exec_count = 0;
72	+	static clock_t macos_exec_time = 0;
73	+	#endif
74	+
75		static void enter_mon(void)
76		{
77		// Start up mon in real-mode
#	Line 55 | Line 81 | static void enter_mon(void)
81		#endif
82		}
83
84	<	// Enable multicore (main/interrupts) cpu emulation?
85	<	#define MULTICORE_CPU 0
84	>	// From main_*.cpp
85	>	extern uintptr SignalStackBase();
86	>
87	>	// From rsrc_patches.cpp
88	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
89	>
90	>	// PowerPC EmulOp to exit from emulation looop
91	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
92	>
93	>	// Enable interrupt routine safety checks?
94	>	#define SAFE_INTERRUPT_PPC 1
95
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
#	Line 70 | Line 105 | static void enter_mon(void)
105		// Interrupts in native mode?
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
108	<	// 68k Emulator Data
109	<	struct EmulatorData {
75	<	uint32  v[0x400];
76	<	};
108	>	// Pointer to Kernel Data
109	>	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110
111	<	// Kernel Data
112	<	struct KernelData {
80	<	uint32  v[0x400];
81	<	EmulatorData ed;
82	<	};
111	>	// SIGSEGV handler
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113
114	<	// Pointer to Kernel Data
115	<	static KernelData * const kernel_data = (KernelData *)0x68ffe000;
114	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115	>	// Special trampolines for EmulOp and NativeOp
116	>	static uint8 *emul_op_trampoline;
117	>	static uint8 *native_op_trampoline;
118	>	#endif
119	>
120	>	// JIT Compiler enabled?
121	>	static inline bool enable_jit_p()
122	>	{
123	>	return PrefsFindBool("jit");
124	>	}
125
126
127		/**
128		*              PowerPC emulator glue with special 'sheep' opcodes
129		**/
130
131	<	struct sheepshaver_exec_return { };
131	>	enum {
132	>	PPC_I(SHEEP) = PPC_I(MAX),
133	>	PPC_I(SHEEP_MAX)
134	>	};
135
136		class sheepshaver_cpu
137		: public powerpc_cpu
#	Line 97 | Line 139 | class sheepshaver_cpu
139		void init_decoder();
140		void execute_sheep(uint32 opcode);
141
142	+	// CPU context to preserve on interrupt
143	+	class interrupt_context {
144	+	uint32 gpr[32];
145	+	uint32 pc;
146	+	uint32 lr;
147	+	uint32 ctr;
148	+	uint32 cr;
149	+	uint32 xer;
150	+	sheepshaver_cpu *cpu;
151	+	const char *where;
152	+	public:
153	+	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
154	+	~interrupt_context();
155	+	};
156	+
157		public:
158
159	<	sheepshaver_cpu()
160	<	: powerpc_cpu()
104	<	{ init_decoder(); }
159	>	// Constructor
160	>	sheepshaver_cpu();
161
162	<	// Condition Register accessors
162	>	// CR & XER accessors
163		uint32 get_cr() const           { return cr().get(); }
164		void set_cr(uint32 v)           { cr().set(v); }
165	+	uint32 get_xer() const          { return xer().get(); }
166	+	void set_xer(uint32 v)          { xer().set(v); }
167	+
168	+	// Execute NATIVE_OP routine
169	+	void execute_native_op(uint32 native_op);
170
171	<	// Execution loop
172	<	void execute(uint32 pc);
171	>	// Execute EMUL_OP routine
172	>	void execute_emul_op(uint32 emul_op);
173
174		// Execute 68k routine
175		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 119 | Line 180 | public:
180		// Execute MacOS/PPC code
181		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
182
183	+	// Compile one instruction
184	+	virtual int compile1(codegen_context_t & cg_context);
185	+
186		// Resource manager thunk
187		void get_resource(uint32 old_get_resource);
188
189		// Handle MacOS interrupt
190	<	void interrupt(uint32 entry, sheepshaver_cpu *cpu);
191	<
128	<	// spcflags for interrupts handling
129	<	static uint32 spcflags;
190	>	void interrupt(uint32 entry);
191	>	void handle_interrupt();
192
193	<	// Lazy memory allocator (one item at a time)
194	<	void *operator new(size_t size)
133	<	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
134	<	void operator delete(void *p)
135	<	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
136	<	// FIXME: really make surre array allocation fail at link time?
137	<	void *operator new[](size_t);
138	<	void operator delete[](void *p);
193	>	// Make sure the SIGSEGV handler can access CPU registers
194	>	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
195		};
196
197	<	uint32 sheepshaver_cpu::spcflags = 0;
198	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
197	>	// Memory allocator returning areas aligned on 16-byte boundaries
198	>	void *operator new(size_t size)
199	>	{
200	>	void *p;
201
202	<	void sheepshaver_cpu::init_decoder()
202	>	#if defined(HAVE_POSIX_MEMALIGN)
203	>	if (posix_memalign(&p, 16, size) != 0)
204	>	throw std::bad_alloc();
205	>	#elif defined(HAVE_MEMALIGN)
206	>	p = memalign(16, size);
207	>	#elif defined(HAVE_VALLOC)
208	>	p = valloc(size); // page-aligned!
209	>	#else
210	>	/* XXX: handle padding ourselves */
211	>	p = malloc(size);
212	>	#endif
213	>
214	>	return p;
215	>	}
216	>
217	>	void operator delete(void *p)
218		{
219	<	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
220	<	static bool initialized = false;
221	<	if (initialized)
222	<	return;
150	<	initialized = true;
219	>	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
220	>	#if defined(__GLIBC__)
221	>	// this is known to work only with GNU libc
222	>	free(p);
223		#endif
224	+	#else
225	+	free(p);
226	+	#endif
227	+	}
228
229	+	sheepshaver_cpu::sheepshaver_cpu()
230	+	: powerpc_cpu(enable_jit_p())
231	+	{
232	+	init_decoder();
233	+	}
234	+
235	+	void sheepshaver_cpu::init_decoder()
236	+	{
237		static const instr_info_t sheep_ii_table[] = {
238		{ "sheep",
239	<	(execute_fn)&sheepshaver_cpu::execute_sheep,
239	>	(execute_pmf)&sheepshaver_cpu::execute_sheep,
240		NULL,
241	<	D_form, 6, 0, CFLOW_TRAP
241	>	PPC_I(SHEEP),
242	>	D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
243		}
244		};
245
#	Line 167 | Line 252 | void sheepshaver_cpu::init_decoder()
252		}
253		}
254
170	–	// Forward declaration for native opcode handler
171	–	static void NativeOp(int selector);
172	–
255		/*              NativeOp instruction format:
256	<	+------------+--------------------------+--+----------+------------+
257	<	|      6     |                          |FN|    OP    |      2     |
258	<	+------------+--------------------------+--+----------+------------+
259	<	0         5 |6                       19 20 21      25 26        31
256	>	+------------+-------------------------+--+-----------+------------+
257	>	|      6     |                         |FN|    OP     |      2     |
258	>	+------------+-------------------------+--+-----------+------------+
259	>	0         5 |6                      18 19 20      25 26        31
260		*/
261
262	<	typedef bit_field< 20, 20 > FN_field;
263	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
262	>	typedef bit_field< 19, 19 > FN_field;
263	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
264		typedef bit_field< 26, 31 > EMUL_OP_field;
265
266	+	// Execute EMUL_OP routine
267	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
268	+	{
269	+	M68kRegisters r68;
270	+	WriteMacInt32(XLM_68K_R25, gpr(25));
271	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
272	+	for (int i = 0; i < 8; i++)
273	+	r68.d[i] = gpr(8 + i);
274	+	for (int i = 0; i < 7; i++)
275	+	r68.a[i] = gpr(16 + i);
276	+	r68.a[7] = gpr(1);
277	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
278	+	uint32 saved_xer = get_xer();
279	+	EmulOp(&r68, gpr(24), emul_op);
280	+	set_cr(saved_cr);
281	+	set_xer(saved_xer);
282	+	for (int i = 0; i < 8; i++)
283	+	gpr(8 + i) = r68.d[i];
284	+	for (int i = 0; i < 7; i++)
285	+	gpr(16 + i) = r68.a[i];
286	+	gpr(1) = r68.a[7];
287	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
288	+	}
289	+
290		// Execute SheepShaver instruction
291		void sheepshaver_cpu::execute_sheep(uint32 opcode)
292		{
#	Line 191 | Line 297 | void sheepshaver_cpu::execute_sheep(uint
297		case 0:         // EMUL_RETURN
298		QuitEmulator();
299		break;
300	<
300	>
301		case 1:         // EXEC_RETURN
302	<	throw sheepshaver_exec_return();
302	>	spcflags().set(SPCFLAG_CPU_EXEC_RETURN);
303		break;
304
305		case 2:         // EXEC_NATIVE
306	<	NativeOp(NATIVE_OP_field::extract(opcode));
306	>	execute_native_op(NATIVE_OP_field::extract(opcode));
307		if (FN_field::test(opcode))
308		pc() = lr();
309		else
310		pc() += 4;
311		break;
312
313	<	default: {      // EMUL_OP
314	<	M68kRegisters r68;
209	<	WriteMacInt32(XLM_68K_R25, gpr(25));
210	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
211	<	for (int i = 0; i < 8; i++)
212	<	r68.d[i] = gpr(8 + i);
213	<	for (int i = 0; i < 7; i++)
214	<	r68.a[i] = gpr(16 + i);
215	<	r68.a[7] = gpr(1);
216	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
217	<	for (int i = 0; i < 8; i++)
218	<	gpr(8 + i) = r68.d[i];
219	<	for (int i = 0; i < 7; i++)
220	<	gpr(16 + i) = r68.a[i];
221	<	gpr(1) = r68.a[7];
222	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
313	>	default:        // EMUL_OP
314	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
315		pc() += 4;
316		break;
317		}
226	–	}
318		}
319
320	<	// Checks for pending interrupts
321	<	struct execute_nothing {
322	<	static inline void execute(powerpc_cpu *) { }
323	<	};
320	>	// Compile one instruction
321	>	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
322	>	{
323	>	#if PPC_ENABLE_JIT
324	>	const instr_info_t *ii = cg_context.instr_info;
325	>	if (ii->mnemo != PPC_I(SHEEP))
326	>	return COMPILE_FAILURE;
327	>
328	>	int status = COMPILE_FAILURE;
329	>	powerpc_dyngen & dg = cg_context.codegen;
330	>	uint32 opcode = cg_context.opcode;
331
332	<	static void HandleInterrupt(void);
332	>	switch (opcode & 0x3f) {
333	>	case 0:         // EMUL_RETURN
334	>	dg.gen_invoke(QuitEmulator);
335	>	status = COMPILE_CODE_OK;
336	>	break;
337
338	<	struct execute_spcflags_check {
339	<	static inline void execute(powerpc_cpu *cpu) {
340	<	if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) {
341	<	if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) {
342	<	SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON );
343	<	enter_mon();
344	<	}
345	<	if (SPCFLAGS_TEST( SPCFLAG_DOINT )) {
346	<	SPCFLAGS_CLEAR( SPCFLAG_DOINT );
347	<	HandleInterrupt();
348	<	}
349	<	if (SPCFLAGS_TEST( SPCFLAG_INT )) {
350	<	SPCFLAGS_CLEAR( SPCFLAG_INT );
351	<	SPCFLAGS_SET( SPCFLAG_DOINT );
338	>	case 1:         // EXEC_RETURN
339	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
340	>	// Don't check for pending interrupts, we do know we have to
341	>	// get out of this block ASAP
342	>	dg.gen_exec_return();
343	>	status = COMPILE_EPILOGUE_OK;
344	>	break;
345	>
346	>	case 2: {       // EXEC_NATIVE
347	>	uint32 selector = NATIVE_OP_field::extract(opcode);
348	>	switch (selector) {
349	>	#if !PPC_REENTRANT_JIT
350	>	// Filter out functions that may invoke Execute68k() or
351	>	// CallMacOS(), this would break reentrancy as they could
352	>	// invalidate the translation cache and even overwrite
353	>	// continuation code when we are done with them.
354	>	case NATIVE_PATCH_NAME_REGISTRY:
355	>	dg.gen_invoke(DoPatchNameRegistry);
356	>	status = COMPILE_CODE_OK;
357	>	break;
358	>	case NATIVE_VIDEO_INSTALL_ACCEL:
359	>	dg.gen_invoke(VideoInstallAccel);
360	>	status = COMPILE_CODE_OK;
361	>	break;
362	>	case NATIVE_VIDEO_VBL:
363	>	dg.gen_invoke(VideoVBL);
364	>	status = COMPILE_CODE_OK;
365	>	break;
366	>	case NATIVE_GET_RESOURCE:
367	>	case NATIVE_GET_1_RESOURCE:
368	>	case NATIVE_GET_IND_RESOURCE:
369	>	case NATIVE_GET_1_IND_RESOURCE:
370	>	case NATIVE_R_GET_RESOURCE: {
371	>	static const uint32 get_resource_ptr[] = {
372	>	XLM_GET_RESOURCE,
373	>	XLM_GET_1_RESOURCE,
374	>	XLM_GET_IND_RESOURCE,
375	>	XLM_GET_1_IND_RESOURCE,
376	>	XLM_R_GET_RESOURCE
377	>	};
378	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
379	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
380	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
381	>	dg.gen_invoke_CPU_im(func, old_get_resource);
382	>	status = COMPILE_CODE_OK;
383	>	break;
384	>	}
385	>	case NATIVE_CHECK_LOAD_INVOC:
386	>	dg.gen_load_T0_GPR(3);
387	>	dg.gen_load_T1_GPR(4);
388	>	dg.gen_se_16_32_T1();
389	>	dg.gen_load_T2_GPR(5);
390	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
391	>	status = COMPILE_CODE_OK;
392	>	break;
393	>	#endif
394	>	case NATIVE_BITBLT:
395	>	dg.gen_load_T0_GPR(3);
396	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
397	>	status = COMPILE_CODE_OK;
398	>	break;
399	>	case NATIVE_INVRECT:
400	>	dg.gen_load_T0_GPR(3);
401	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
402	>	status = COMPILE_CODE_OK;
403	>	break;
404	>	case NATIVE_FILLRECT:
405	>	dg.gen_load_T0_GPR(3);
406	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
407	>	status = COMPILE_CODE_OK;
408	>	break;
409	>	}
410	>	// Could we fully translate this NativeOp?
411	>	if (status == COMPILE_CODE_OK) {
412	>	if (!FN_field::test(opcode))
413	>	cg_context.done_compile = false;
414	>	else {
415	>	dg.gen_load_A0_LR();
416	>	dg.gen_set_PC_A0();
417	>	cg_context.done_compile = true;
418		}
419	+	break;
420		}
421	+	#if PPC_REENTRANT_JIT
422	+	// Try to execute NativeOp trampoline
423	+	if (!FN_field::test(opcode))
424	+	dg.gen_set_PC_im(cg_context.pc + 4);
425	+	else {
426	+	dg.gen_load_A0_LR();
427	+	dg.gen_set_PC_A0();
428	+	}
429	+	dg.gen_mov_32_T0_im(selector);
430	+	dg.gen_jmp(native_op_trampoline);
431	+	cg_context.done_compile = true;
432	+	status = COMPILE_EPILOGUE_OK;
433	+	break;
434	+	#endif
435	+	// Invoke NativeOp handler
436	+	if (!FN_field::test(opcode)) {
437	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
438	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
439	+	dg.gen_invoke_CPU_im(func, selector);
440	+	cg_context.done_compile = false;
441	+	status = COMPILE_CODE_OK;
442	+	}
443	+	// Otherwise, let it generate a call to execute_sheep() which
444	+	// will cause necessary updates to the program counter
445	+	break;
446		}
253	–	};
447
448	<	// Execution loop
449	<	void sheepshaver_cpu::execute(uint32 entry)
450	<	{
451	<	try {
452	<	pc() = entry;
453	<	powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>();
448	>	default: {      // EMUL_OP
449	>	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
450	>	#if PPC_REENTRANT_JIT
451	>	// Try to execute EmulOp trampoline
452	>	dg.gen_set_PC_im(cg_context.pc + 4);
453	>	dg.gen_mov_32_T0_im(emul_op);
454	>	dg.gen_jmp(emul_op_trampoline);
455	>	cg_context.done_compile = true;
456	>	status = COMPILE_EPILOGUE_OK;
457	>	break;
458	>	#endif
459	>	// Invoke EmulOp handler
460	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
461	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
462	>	dg.gen_invoke_CPU_im(func, emul_op);
463	>	cg_context.done_compile = false;
464	>	status = COMPILE_CODE_OK;
465	>	break;
466		}
262	–	catch (sheepshaver_exec_return const &) {
263	–	// Nothing, simply return
467		}
468	<	catch (...) {
469	<	printf("ERROR: execute() received an unknown exception!\n");
470	<	QuitEmulator();
468	>	return status;
469	>	#endif
470	>	return COMPILE_FAILURE;
471	>	}
472	>
473	>	// CPU context to preserve on interrupt
474	>	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
475	>	{
476	>	#if SAFE_INTERRUPT_PPC >= 2
477	>	cpu = _cpu;
478	>	where = _where;
479	>
480	>	// Save interrupt context
481	>	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
482	>	pc = cpu->pc();
483	>	lr = cpu->lr();
484	>	ctr = cpu->ctr();
485	>	cr = cpu->get_cr();
486	>	xer = cpu->get_xer();
487	>	#endif
488	>	}
489	>
490	>	sheepshaver_cpu::interrupt_context::~interrupt_context()
491	>	{
492	>	#if SAFE_INTERRUPT_PPC >= 2
493	>	// Check whether CPU context was preserved by interrupt
494	>	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
495	>	printf("FATAL: %s: interrupt clobbers registers\n", where);
496	>	for (int i = 0; i < 32; i++)
497	>	if (gpr[i] != cpu->gpr(i))
498	>	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
499		}
500	+	if (pc != cpu->pc())
501	+	printf("FATAL: %s: interrupt clobbers PC\n", where);
502	+	if (lr != cpu->lr())
503	+	printf("FATAL: %s: interrupt clobbers LR\n", where);
504	+	if (ctr != cpu->ctr())
505	+	printf("FATAL: %s: interrupt clobbers CTR\n", where);
506	+	if (cr != cpu->get_cr())
507	+	printf("FATAL: %s: interrupt clobbers CR\n", where);
508	+	if (xer != cpu->get_xer())
509	+	printf("FATAL: %s: interrupt clobbers XER\n", where);
510	+	#endif
511		}
512
513		// Handle MacOS interrupt
514	<	void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu)
514	>	void sheepshaver_cpu::interrupt(uint32 entry)
515		{
516	<	#if MULTICORE_CPU
517	<	// Initialize stack pointer from previous CPU running
518	<	gpr(1) = cpu->gpr(1);
519	<	#else
516	>	#if EMUL_TIME_STATS
517	>	ppc_interrupt_count++;
518	>	const clock_t interrupt_start = clock();
519	>	#endif
520	>
521	>	#if SAFE_INTERRUPT_PPC
522	>	static int depth = 0;
523	>	if (depth != 0)
524	>	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
525	>	depth++;
526	>	#endif
527	>
528		// Save program counters and branch registers
529		uint32 saved_pc = pc();
530		uint32 saved_lr = lr();
531		uint32 saved_ctr= ctr();
532	<	#endif
532	>	uint32 saved_sp = gpr(1);
533
534	<	// Create stack frame
535	<	gpr(1) -= 64;
534	>	// Initialize stack pointer to SheepShaver alternate stack base
535	>	gpr(1) = SignalStackBase() - 64;
536
537		// Build trampoline to return from interrupt
538	<	uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
538	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
539
540		// Prepare registers for nanokernel interrupt routine
541	<	kernel_data->v[0x004 >> 2] = gpr(1);
542	<	kernel_data->v[0x018 >> 2] = gpr(6);
541	>	kernel_data->v[0x004 >> 2] = htonl(gpr(1));
542	>	kernel_data->v[0x018 >> 2] = htonl(gpr(6));
543
544	<	gpr(6) = kernel_data->v[0x65c >> 2];
544	>	gpr(6) = ntohl(kernel_data->v[0x65c >> 2]);
545		assert(gpr(6) != 0);
546		WriteMacInt32(gpr(6) + 0x13c, gpr(7));
547		WriteMacInt32(gpr(6) + 0x144, gpr(8));
#	Line 302 | Line 552 | void sheepshaver_cpu::interrupt(uint32 e
552		WriteMacInt32(gpr(6) + 0x16c, gpr(13));
553
554		gpr(1)  = KernelDataAddr;
555	<	gpr(7)  = kernel_data->v[0x660 >> 2];
555	>	gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
556		gpr(8)  = 0;
557	<	gpr(10) = (uint32)trampoline;
558	<	gpr(12) = (uint32)trampoline;
559	<	gpr(13) = cr().get();
557	>	gpr(10) = trampoline.addr();
558	>	gpr(12) = trampoline.addr();
559	>	gpr(13) = get_cr();
560
561		// rlwimi. r7,r7,8,0,0
562		uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7));
#	Line 314 | Line 564 | void sheepshaver_cpu::interrupt(uint32 e
564		gpr(7) = result;
565
566		gpr(11) = 0xf072; // MSR (SRR1)
567	<	cr().set((gpr(11) & 0x0fff0000) | (cr().get() & ~0x0fff0000));
567	>	cr().set((gpr(11) & 0x0fff0000) | (get_cr() & ~0x0fff0000));
568
569		// Enter nanokernel
570		execute(entry);
571
322	–	// Cleanup stack
323	–	gpr(1) += 64;
324	–
325	–	#if !MULTICORE_CPU
572		// Restore program counters and branch registers
573		pc() = saved_pc;
574		lr() = saved_lr;
575		ctr()= saved_ctr;
576	+	gpr(1) = saved_sp;
577	+
578	+	#if EMUL_TIME_STATS
579	+	interrupt_time += (clock() - interrupt_start);
580	+	#endif
581	+
582	+	#if SAFE_INTERRUPT_PPC
583	+	depth--;
584		#endif
585		}
586
587		// Execute 68k routine
588		void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r)
589		{
590	+	#if EMUL_TIME_STATS
591	+	exec68k_count++;
592	+	const clock_t exec68k_start = clock();
593	+	#endif
594	+
595		#if SAFE_EXEC_68K
596		if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP)
597		printf("FATAL: Execute68k() not called from EMUL_OP mode\n");
#	Line 342 | Line 601 | void sheepshaver_cpu::execute_68k(uint32
601		uint32 saved_pc = pc();
602		uint32 saved_lr = lr();
603		uint32 saved_ctr= ctr();
604	+	uint32 saved_cr = get_cr();
605
606		// Create MacOS stack frame
607	+	// FIXME: make sure MacOS doesn't expect PPC registers to live on top
608		uint32 sp = gpr(1);
609	<	gpr(1) -= 56 + 19*4 + 18*8;
609	>	gpr(1) -= 56;
610		WriteMacInt32(gpr(1), sp);
611
612		// Save PowerPC registers
613	<	memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13));
613	>	uint32 saved_GPRs[19];
614	>	memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13));
615		#if SAVE_FP_EXEC_68K
616	<	memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14));
616	>	double saved_FPRs[18];
617	>	memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14));
618		#endif
619
620		// Setup registers for 68k emulator
#	Line 365 | Line 628 | void sheepshaver_cpu::execute_68k(uint32
628		gpr(25) = ReadMacInt32(XLM_68K_R25);            // MSB of SR
629		gpr(26) = 0;
630		gpr(28) = 0;                                                            // VBR
631	<	gpr(29) = kernel_data->ed.v[0x74 >> 2];         // Pointer to opcode table
632	<	gpr(30) = kernel_data->ed.v[0x78 >> 2];         // Address of emulator
631	>	gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]);          // Pointer to opcode table
632	>	gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]);          // Address of emulator
633		gpr(31) = KernelDataAddr + 0x1000;
634
635		// Push return address (points to EXEC_RETURN opcode) on stack
#	Line 398 | Line 661 | void sheepshaver_cpu::execute_68k(uint32
661		r->a[i] = gpr(16 + i);
662
663		// Restore PowerPC registers
664	<	memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13));
664	>	memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13));
665		#if SAVE_FP_EXEC_68K
666	<	memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14));
666	>	memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14));
667		#endif
668
669		// Cleanup stack
670	<	gpr(1) += 56 + 19*4 + 18*8;
670	>	gpr(1) += 56;
671
672		// Restore program counters and branch registers
673		pc() = saved_pc;
674		lr() = saved_lr;
675		ctr()= saved_ctr;
676	+	set_cr(saved_cr);
677	+
678	+	#if EMUL_TIME_STATS
679	+	exec68k_time += (clock() - exec68k_start);
680	+	#endif
681		}
682
683		// Call MacOS PPC code
684		uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args)
685		{
686	+	#if EMUL_TIME_STATS
687	+	macos_exec_count++;
688	+	const clock_t macos_exec_start = clock();
689	+	#endif
690	+
691		// Save program counters and branch registers
692		uint32 saved_pc = pc();
693		uint32 saved_lr = lr();
694		uint32 saved_ctr= ctr();
695
696		// Build trampoline with EXEC_RETURN
697	<	uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
698	<	lr() = (uint32)trampoline;
697	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
698	>	lr() = trampoline.addr();
699
700		gpr(1) -= 64;                                                           // Create stack frame
701		uint32 proc = ReadMacInt32(tvect);                      // Get routine address
#	Line 453 | Line 726 | uint32 sheepshaver_cpu::execute_macos_co
726		lr() = saved_lr;
727		ctr()= saved_ctr;
728
729	+	#if EMUL_TIME_STATS
730	+	macos_exec_time += (clock() - macos_exec_start);
731	+	#endif
732	+
733		return retval;
734		}
735
#	Line 461 | Line 738 | inline void sheepshaver_cpu::execute_ppc
738		{
739		// Save branch registers
740		uint32 saved_lr = lr();
464	–	uint32 saved_ctr= ctr();
741
742	<	const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
742	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
743	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
744	>	lr() = trampoline.addr();
745
468	–	lr() = (uint32)trampoline;
469	–	ctr()= entry;
746		execute(entry);
747
748		// Restore branch registers
749		lr() = saved_lr;
474	–	ctr()= saved_ctr;
750		}
751
752		// Resource Manager thunk
478	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h);
479	–
753		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
754		{
755		uint32 type = gpr(3);
#	Line 487 | Line 760 | inline void sheepshaver_cpu::get_resourc
760
761		// Call old routine
762		execute_ppc(old_get_resource);
490	–	uint16 **handle = (uint16 **)gpr(3);
763
764		// Call CheckLoad()
765	+	uint32 handle = gpr(3);
766		check_load_invoc(type, id, handle);
767	<	gpr(3) = (uint32)handle;
767	>	gpr(3) = handle;
768
769		// Cleanup stack
770		gpr(1) += 56;
#	Line 502 | Line 775 | inline void sheepshaver_cpu::get_resourc
775		*              SheepShaver CPU engine interface
776		**/
777
778	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
779	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
507	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
508	<
509	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
510	<	{
511	<	#if MULTICORE_CPU
512	<	current_cpu = new_cpu;
513	<	#endif
514	<	}
778	>	// PowerPC CPU emulator
779	>	static sheepshaver_cpu *ppc_cpu = NULL;
780
781	<	static inline void cpu_pop()
781	>	void FlushCodeCache(uintptr start, uintptr end)
782		{
783	<	#if MULTICORE_CPU
784	<	current_cpu = main_cpu;
520	<	#endif
783	>	D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
784	>	ppc_cpu->invalidate_cache_range(start, end);
785		}
786
787		// Dump PPC registers
788		static void dump_registers(void)
789		{
790	<	current_cpu->dump_registers();
790	>	ppc_cpu->dump_registers();
791		}
792
793		// Dump log
794		static void dump_log(void)
795		{
796	<	current_cpu->dump_log();
796	>	ppc_cpu->dump_log();
797		}
798
799		/*
800		*  Initialize CPU emulation
801		*/
802
803	<	static struct sigaction sigsegv_action;
540	<
541	<	#if defined(__powerpc__)
542	<	#include <sys/ucontext.h>
543	<	#endif
544	<
545	<	static void sigsegv_handler(int sig, siginfo_t *sip, void *scp)
803	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
804		{
547	–	const uintptr addr = (uintptr)sip->si_addr;
805		#if ENABLE_VOSF
806	<	// Handle screen fault.
807	<	extern bool Screen_fault_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction);
808	<	if (Screen_fault_handler((sigsegv_address_t)addr, SIGSEGV_INVALID_PC))
809	<	return;
806	>	// Handle screen fault
807	>	extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
808	>	if (Screen_fault_handler(fault_address, fault_instruction))
809	>	return SIGSEGV_RETURN_SUCCESS;
810		#endif
811	<	#if defined(__powerpc__)
812	<	if (addr >= ROM_BASE && addr < ROM_BASE + ROM_SIZE) {
813	<	printf("IGNORE write access to ROM at %08x\n", addr);
814	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
815	<	return;
816	<	}
817	<	if (addr >= 0xf3012000 && addr < 0xf3014000 && 0) {
818	<	printf("IGNORE write access to ROM at %08x\n", addr);
819	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
820	<	return;
811	>
812	>	const uintptr addr = (uintptr)fault_address;
813	>	#if HAVE_SIGSEGV_SKIP_INSTRUCTION
814	>	// Ignore writes to ROM
815	>	if ((addr - ROM_BASE) < ROM_SIZE)
816	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
817	>
818	>	// Get program counter of target CPU
819	>	sheepshaver_cpu * const cpu = ppc_cpu;
820	>	const uint32 pc = cpu->pc();
821	>
822	>	// Fault in Mac ROM or RAM?
823	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
824	>	if (mac_fault) {
825	>
826	>	// "VM settings" during MacOS 8 installation
827	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
828	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
829	>
830	>	// MacOS 8.5 installation
831	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
832	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
833	>
834	>	// MacOS 8 serial drivers on startup
835	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
836	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
837	>
838	>	// MacOS 8.1 serial drivers on startup
839	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
840	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
841	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
842	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
843	>
844	>	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
845	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
846	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
847	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
848	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
849	>
850	>	// Ignore writes to the zero page
851	>	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
852	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
853	>
854	>	// Ignore all other faults, if requested
855	>	if (PrefsFindBool("ignoresegv"))
856	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
857		}
565	–	#endif
566	–	printf("Caught SIGSEGV at address %p\n", sip->si_addr);
567	–	printf("Native PC: %08x\n", (((ucontext_t *)scp)->uc_mcontext.regs)->nip);
568	–	printf("Current CPU: %s\n", current_cpu == main_cpu ? "main" : "interrupts");
569	–	#if 1
570	–	dump_registers();
858		#else
859	<	printf("Main CPU context\n");
573	<	main_cpu->dump_registers();
574	<	printf("Interrupts CPU context\n");
575	<	interrupt_cpu->dump_registers();
859	>	#error "FIXME: You don't have the capability to skip instruction within signal handlers"
860		#endif
861	<	current_cpu->dump_log();
861	>
862	>	printf("SIGSEGV\n");
863	>	printf("  pc %p\n", fault_instruction);
864	>	printf("  ea %p\n", fault_address);
865	>	dump_registers();
866	>	ppc_cpu->dump_log();
867		enter_mon();
868		QuitEmulator();
869	+
870	+	return SIGSEGV_RETURN_FAILURE;
871		}
872
873		void init_emul_ppc(void)
874		{
875		// Initialize main CPU emulator
876	<	main_cpu = new sheepshaver_cpu();
877	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
876	>	ppc_cpu = new sheepshaver_cpu();
877	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
878	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
879		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
880
589	–	#if MULTICORE_CPU
590	–	// Initialize alternate CPU emulator to handle interrupts
591	–	interrupt_cpu = new sheepshaver_cpu();
592	–	#endif
593	–
594	–	// Install SIGSEGV handler
595	–	sigemptyset(&sigsegv_action.sa_mask);
596	–	sigsegv_action.sa_sigaction = sigsegv_handler;
597	–	sigsegv_action.sa_flags = SA_SIGINFO;
598	–	sigsegv_action.sa_restorer = NULL;
599	–	sigaction(SIGSEGV, &sigsegv_action, NULL);
600	–
881		#if ENABLE_MON
882		// Install "regs" command in cxmon
883		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
884		mon_add_command("log", dump_log, "log                      Dump PowerPC emulation log\n");
885		#endif
886	+
887	+	#if EMUL_TIME_STATS
888	+	emul_start_time = clock();
889	+	#endif
890	+	}
891	+
892	+	/*
893	+	*  Deinitialize emulation
894	+	*/
895	+
896	+	void exit_emul_ppc(void)
897	+	{
898	+	#if EMUL_TIME_STATS
899	+	clock_t emul_end_time = clock();
900	+
901	+	printf("### Statistics for SheepShaver emulation parts\n");
902	+	const clock_t emul_time = emul_end_time - emul_start_time;
903	+	printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
904	+	printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
905	+	(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
906	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
907	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
908	+
909	+	#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
910	+	printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
911	+	printf("Total " LABEL " time  : %.1f sec (%.1f%%)\n",                   \
912	+	double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC),          \
913	+	100.0 * double(VAR_PREFIX##_time) / double(emul_time));      \
914	+	} while (0)
915	+
916	+	PRINT_STATS("Execute68k[Trap] execution", exec68k);
917	+	PRINT_STATS("NativeOp execution", native_exec);
918	+	PRINT_STATS("MacOS routine execution", macos_exec);
919	+
920	+	#undef PRINT_STATS
921	+	printf("\n");
922	+	#endif
923	+
924	+	delete ppc_cpu;
925		}
926
927	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
928	+	// Initialize EmulOp trampolines
929	+	void init_emul_op_trampolines(basic_dyngen & dg)
930	+	{
931	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
932	+	func_t func;
933	+
934	+	// EmulOp
935	+	emul_op_trampoline = dg.gen_start();
936	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
937	+	dg.gen_invoke_CPU_T0(func);
938	+	dg.gen_exec_return();
939	+	dg.gen_end();
940	+
941	+	// NativeOp
942	+	native_op_trampoline = dg.gen_start();
943	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
944	+	dg.gen_invoke_CPU_T0(func);
945	+	dg.gen_exec_return();
946	+	dg.gen_end();
947	+
948	+	D(bug("EmulOp trampoline:   %p\n", emul_op_trampoline));
949	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
950	+	}
951	+	#endif
952	+
953		/*
954		*  Emulation loop
955		*/
956
957		void emul_ppc(uint32 entry)
958		{
959	<	current_cpu = main_cpu;
960	<	current_cpu->start_log();
961	<	current_cpu->execute(entry);
959	>	#if 0
960	>	ppc_cpu->start_log();
961	>	#endif
962	>	// start emulation loop and enable code translation or caching
963	>	ppc_cpu->execute(entry);
964		}
965
966		/*
967		*  Handle PowerPC interrupt
968		*/
969
623	–	// Atomic operations
624	–	extern int atomic_add(int *var, int v);
625	–	extern int atomic_and(int *var, int v);
626	–	extern int atomic_or(int *var, int v);
627	–
970		void TriggerInterrupt(void)
971		{
972		#if 0
973		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
974		#else
975	<	SPCFLAGS_SET( SPCFLAG_INT );
975	>	// Trigger interrupt to main cpu only
976	>	if (ppc_cpu)
977	>	ppc_cpu->trigger_interrupt();
978		#endif
979		}
980
981	<	static void HandleInterrupt(void)
981	>	void sheepshaver_cpu::handle_interrupt(void)
982		{
983	+	#ifdef USE_SDL_VIDEO
984	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
985	+	SDL_PumpEvents();
986	+	#endif
987	+
988		// Do nothing if interrupts are disabled
989		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
990		return;
991
992	<	// Do nothing if there is no interrupt pending
993	<	if (InterruptFlags == 0)
994	<	return;
992	>	// Current interrupt nest level
993	>	static int interrupt_depth = 0;
994	>	++interrupt_depth;
995	>	#if EMUL_TIME_STATS
996	>	interrupt_count++;
997	>	#endif
998
999		// Disable MacOS stack sniffer
1000		WriteMacInt32(0x110, 0);
#	Line 651 | Line 1003 | static void HandleInterrupt(void)
1003		switch (ReadMacInt32(XLM_RUN_MODE)) {
1004		case MODE_68K:
1005		// 68k emulator active, trigger 68k interrupt level 1
654	–	assert(current_cpu == main_cpu);
1006		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1007	<	main_cpu->set_cr(main_cpu->get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
1007	>	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
1008		break;
1009
1010		#if INTERRUPTS_IN_NATIVE_MODE
1011		case MODE_NATIVE:
1012		// 68k emulator inactive, in nanokernel?
1013	<	assert(current_cpu == main_cpu);
1014	<	if (main_cpu->gpr(1) != KernelDataAddr) {
1013	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1014	>	interrupt_context ctx(this, "PowerPC mode");
1015	>
1016		// Prepare for 68k interrupt level 1
1017		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1018		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 669 | Line 1021 | static void HandleInterrupt(void)
1021
1022		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1023		DisableInterrupt();
672	–	cpu_push(interrupt_cpu);
1024		if (ROMType == ROMTYPE_NEWWORLD)
1025	<	current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu);
1025	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1026		else
1027	<	current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu);
677	<	cpu_pop();
1027	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1028		}
1029		break;
1030		#endif
#	Line 683 | Line 1033 | static void HandleInterrupt(void)
1033		case MODE_EMUL_OP:
1034		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1035		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1036	+	interrupt_context ctx(this, "68k mode");
1037	+	#if EMUL_TIME_STATS
1038	+	const clock_t interrupt_start = clock();
1039	+	#endif
1040		#if 1
1041		// Execute full 68k interrupt routine
1042		M68kRegisters r;
#	Line 704 | Line 1058 | static void HandleInterrupt(void)
1058		if (InterruptFlags & INTFLAG_VIA) {
1059		ClearInterruptFlag(INTFLAG_VIA);
1060		ADBInterrupt();
1061	<	ExecutePPC(VideoVBL);
1061	>	ExecuteNative(NATIVE_VIDEO_VBL);
1062		}
1063		}
1064		#endif
1065	+	#if EMUL_TIME_STATS
1066	+	interrupt_time += (clock() - interrupt_start);
1067	+	#endif
1068		}
1069		break;
1070		#endif
1071		}
715	–	}
716	–
717	–	/*
718	–	*  Execute NATIVE_OP opcode (called by PowerPC emulator)
719	–	*/
1072
1073	<	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
1074	<	tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
1075	<
724	<	// FIXME: Make sure 32-bit relocations are used
725	<	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
726	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
727	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
728	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
729	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
730	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
731	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
732	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
733	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
734	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
735	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
736	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
737	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
738	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
739	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
740	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
741	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
742	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
743	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
744	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
745	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
746	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
747	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
748	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
749	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
750	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
751	<	};
1073	>	// We are done with this interrupt
1074	>	--interrupt_depth;
1075	>	}
1076
1077		static void get_resource(void);
1078		static void get_1_resource(void);
#	Line 756 | Line 1080 | static void get_ind_resource(void);
1080		static void get_1_ind_resource(void);
1081		static void r_get_resource(void);
1082
1083	<	#define GPR(REG) current_cpu->gpr(REG)
1084	<
761	<	static void NativeOp(int selector)
1083	>	// Execute NATIVE_OP routine
1084	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1085		{
1086	+	#if EMUL_TIME_STATS
1087	+	native_exec_count++;
1088	+	const clock_t native_exec_start = clock();
1089	+	#endif
1090	+
1091		switch (selector) {
1092		case NATIVE_PATCH_NAME_REGISTRY:
1093		DoPatchNameRegistry();
#	Line 771 | Line 1099 | static void NativeOp(int selector)
1099		VideoVBL();
1100		break;
1101		case NATIVE_VIDEO_DO_DRIVER_IO:
1102	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
1103	<	(void *)GPR(5), GPR(6), GPR(7));
1102	>	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1103	>	(void *)gpr(5), gpr(6), gpr(7));
1104		break;
1105	<	case NATIVE_GET_RESOURCE:
1106	<	get_resource();
1105	>	#ifdef WORDS_BIGENDIAN
1106	>	case NATIVE_ETHER_IRQ:
1107	>	EtherIRQ();
1108		break;
1109	<	case NATIVE_GET_1_RESOURCE:
1110	<	get_1_resource();
1109	>	case NATIVE_ETHER_INIT:
1110	>	gpr(3) = InitStreamModule((void *)gpr(3));
1111		break;
1112	<	case NATIVE_GET_IND_RESOURCE:
1113	<	get_ind_resource();
1112	>	case NATIVE_ETHER_TERM:
1113	>	TerminateStreamModule();
1114		break;
1115	<	case NATIVE_GET_1_IND_RESOURCE:
1116	<	get_1_ind_resource();
1115	>	case NATIVE_ETHER_OPEN:
1116	>	gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1117	>	break;
1118	>	case NATIVE_ETHER_CLOSE:
1119	>	gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5));
1120	>	break;
1121	>	case NATIVE_ETHER_WPUT:
1122	>	gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4));
1123	>	break;
1124	>	case NATIVE_ETHER_RSRV:
1125	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1126	>	break;
1127	>	#else
1128	>	case NATIVE_ETHER_INIT:
1129	>	// FIXME: needs more complicated thunks
1130	>	gpr(3) = false;
1131	>	break;
1132	>	#endif
1133	>	case NATIVE_SYNC_HOOK:
1134	>	gpr(3) = NQD_sync_hook(gpr(3));
1135	>	break;
1136	>	case NATIVE_BITBLT_HOOK:
1137	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1138	>	break;
1139	>	case NATIVE_BITBLT:
1140	>	NQD_bitblt(gpr(3));
1141	>	break;
1142	>	case NATIVE_FILLRECT_HOOK:
1143	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1144		break;
1145	<	case NATIVE_R_GET_RESOURCE:
1146	<	r_get_resource();
1145	>	case NATIVE_INVRECT:
1146	>	NQD_invrect(gpr(3));
1147	>	break;
1148	>	case NATIVE_FILLRECT:
1149	>	NQD_fillrect(gpr(3));
1150		break;
1151		case NATIVE_SERIAL_NOTHING:
1152		case NATIVE_SERIAL_OPEN:
#	Line 806 | Line 1165 | static void NativeOp(int selector)
1165		SerialStatus,
1166		SerialClose
1167		};
1168	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1168	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1169		break;
1170		}
1171	<	case NATIVE_DISABLE_INTERRUPT:
1172	<	DisableInterrupt();
1171	>	case NATIVE_GET_RESOURCE:
1172	>	case NATIVE_GET_1_RESOURCE:
1173	>	case NATIVE_GET_IND_RESOURCE:
1174	>	case NATIVE_GET_1_IND_RESOURCE:
1175	>	case NATIVE_R_GET_RESOURCE: {
1176	>	typedef void (*GetResourceCallback)(void);
1177	>	static const GetResourceCallback get_resource_callbacks[] = {
1178	>	::get_resource,
1179	>	::get_1_resource,
1180	>	::get_ind_resource,
1181	>	::get_1_ind_resource,
1182	>	::r_get_resource
1183	>	};
1184	>	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1185		break;
1186	<	case NATIVE_ENABLE_INTERRUPT:
1187	<	EnableInterrupt();
1186	>	}
1187	>	case NATIVE_MAKE_EXECUTABLE:
1188	>	MakeExecutable(0, (void *)gpr(4), gpr(5));
1189	>	break;
1190	>	case NATIVE_CHECK_LOAD_INVOC:
1191	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1192		break;
1193		default:
1194		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1195		QuitEmulator();
1196		break;
1197		}
823	–	}
824	–
825	–	/*
826	–	*  Execute native subroutine (LR must contain return address)
827	–	*/
1198
1199	<	void ExecuteNative(int selector)
1200	<	{
1201	<	uint32 tvect[2];
832	<	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
833	<	tvect[1] = 0; // Fake TVECT
834	<	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
835	<	M68kRegisters r;
836	<	Execute68k((uint32)&desc, &r);
1199	>	#if EMUL_TIME_STATS
1200	>	native_exec_time += (clock() - native_exec_start);
1201	>	#endif
1202		}
1203
1204		/*
#	Line 844 | Line 1209 | void ExecuteNative(int selector)
1209
1210		void Execute68k(uint32 pc, M68kRegisters *r)
1211		{
1212	<	current_cpu->execute_68k(pc, r);
1212	>	ppc_cpu->execute_68k(pc, r);
1213		}
1214
1215		/*
#	Line 854 | Line 1219 | void Execute68k(uint32 pc, M68kRegisters
1219
1220		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1221		{
1222	<	uint16 proc[2] = {trap, M68K_RTS};
1223	<	Execute68k((uint32)proc, r);
1222	>	SheepVar proc_var(4);
1223	>	uint32 proc = proc_var.addr();
1224	>	WriteMacInt16(proc, trap);
1225	>	WriteMacInt16(proc + 2, M68K_RTS);
1226	>	Execute68k(proc, r);
1227		}
1228
1229		/*
#	Line 864 | Line 1232 | void Execute68kTrap(uint16 trap, M68kReg
1232
1233		uint32 call_macos(uint32 tvect)
1234		{
1235	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1235	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1236		}
1237
1238		uint32 call_macos1(uint32 tvect, uint32 arg1)
1239		{
1240		const uint32 args[] = { arg1 };
1241	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1241	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1242		}
1243
1244		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1245		{
1246		const uint32 args[] = { arg1, arg2 };
1247	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1247	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1248		}
1249
1250		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1251		{
1252		const uint32 args[] = { arg1, arg2, arg3 };
1253	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1253	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1254		}
1255
1256		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1257		{
1258		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1259	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1259	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1260		}
1261
1262		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1263		{
1264		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1265	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1265	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1266		}
1267
1268		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1269		{
1270		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1271	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1271	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1272		}
1273
1274		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1275		{
1276		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1277	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
910	<	}
911	<
912	<	/*
913	<	*  Atomic operations
914	<	*/
915	<
916	<	int atomic_add(int *var, int v)
917	<	{
918	<	int ret = *var;
919	<	*var += v;
920	<	return ret;
921	<	}
922	<
923	<	int atomic_and(int *var, int v)
924	<	{
925	<	int ret = *var;
926	<	*var &= v;
927	<	return ret;
928	<	}
929	<
930	<	int atomic_or(int *var, int v)
931	<	{
932	<	int ret = *var;
933	<	*var |= v;
934	<	return ret;
1277	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1278		}
1279
1280		/*
#	Line 940 | Line 1283 | int atomic_or(int *var, int v)
1283
1284		void get_resource(void)
1285		{
1286	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1286	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1287		}
1288
1289		void get_1_resource(void)
1290		{
1291	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1291	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1292		}
1293
1294		void get_ind_resource(void)
1295		{
1296	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1296	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1297		}
1298
1299		void get_1_ind_resource(void)
1300		{
1301	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1301	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1302		}
1303
1304		void r_get_resource(void)
1305		{
1306	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1306	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1307		}

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