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/* |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
3 |
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* |
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< |
* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
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* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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#include "sysdeps.h" |
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#include "cpu_emulation.h" |
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#include "main.h" |
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#include "prefs.h" |
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#include "xlowmem.h" |
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#include "emul_op.h" |
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#include "rom_patches.h" |
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#include "macos_util.h" |
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#include "block-alloc.hpp" |
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#include "sigsegv.h" |
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#include "spcflags.h" |
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#include "cpu/ppc/ppc-cpu.hpp" |
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#include "cpu/ppc/ppc-operations.hpp" |
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#include "cpu/ppc/ppc-instructions.hpp" |
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#include "thunks.h" |
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|
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// Used for NativeOp trampolines |
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#include "video.h" |
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#include "name_registry.h" |
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#include "serial.h" |
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#include "ether.h" |
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#include "timer.h" |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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|
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#if ENABLE_MON |
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#include "mon.h" |
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#include "mon_disass.h" |
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#endif |
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|
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#define DEBUG 1 |
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#define DEBUG 0 |
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#include "debug.h" |
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|
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// Emulation time statistics |
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#define EMUL_TIME_STATS 1 |
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|
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#if EMUL_TIME_STATS |
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static clock_t emul_start_time; |
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static uint32 interrupt_count = 0; |
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static clock_t interrupt_time = 0; |
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static uint32 exec68k_count = 0; |
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static clock_t exec68k_time = 0; |
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static uint32 native_exec_count = 0; |
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static clock_t native_exec_time = 0; |
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static uint32 macos_exec_count = 0; |
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static clock_t macos_exec_time = 0; |
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#endif |
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|
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static void enter_mon(void) |
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{ |
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// Start up mon in real-mode |
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#endif |
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} |
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|
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// Enable multicore (main/interrupts) cpu emulation? |
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#define MULTICORE_CPU 0 |
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// From main_*.cpp |
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extern uintptr SignalStackBase(); |
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|
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// From rsrc_patches.cpp |
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extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
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|
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// PowerPC EmulOp to exit from emulation looop |
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const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
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|
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// Enable interrupt routine safety checks? |
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#define SAFE_INTERRUPT_PPC 1 |
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|
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// Enable Execute68k() safety checks? |
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#define SAFE_EXEC_68K 1 |
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// Interrupts in native mode? |
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#define INTERRUPTS_IN_NATIVE_MODE 1 |
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|
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// 68k Emulator Data |
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struct EmulatorData { |
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uint32 v[0x400]; |
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}; |
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|
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// Kernel Data |
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struct KernelData { |
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uint32 v[0x400]; |
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EmulatorData ed; |
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}; |
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// Enable native EMUL_OPs to be run without a mode switch |
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#define ENABLE_NATIVE_EMUL_OP 1 |
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|
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// Pointer to Kernel Data |
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static KernelData * const kernel_data = (KernelData *)0x68ffe000; |
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static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
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|
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// SIGSEGV handler |
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static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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|
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#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
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// Special trampolines for EmulOp and NativeOp |
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static uint8 *emul_op_trampoline; |
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static uint8 *native_op_trampoline; |
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#endif |
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|
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// JIT Compiler enabled? |
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static inline bool enable_jit_p() |
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{ |
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return PrefsFindBool("jit"); |
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} |
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/** |
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* PowerPC emulator glue with special 'sheep' opcodes |
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**/ |
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|
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struct sheepshaver_exec_return { }; |
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enum { |
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PPC_I(SHEEP) = PPC_I(MAX), |
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PPC_I(SHEEP_MAX) |
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}; |
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|
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class sheepshaver_cpu |
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: public powerpc_cpu |
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void init_decoder(); |
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void execute_sheep(uint32 opcode); |
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|
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// Filter out EMUL_OP routines that only call native code |
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bool filter_execute_emul_op(uint32 emul_op); |
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|
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// "Native" EMUL_OP routines |
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void execute_emul_op_microseconds(); |
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void execute_emul_op_idle_time_1(); |
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void execute_emul_op_idle_time_2(); |
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|
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// CPU context to preserve on interrupt |
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class interrupt_context { |
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uint32 gpr[32]; |
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uint32 pc; |
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uint32 lr; |
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uint32 ctr; |
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uint32 cr; |
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uint32 xer; |
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sheepshaver_cpu *cpu; |
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const char *where; |
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public: |
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interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
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~interrupt_context(); |
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}; |
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|
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public: |
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|
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sheepshaver_cpu() |
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: powerpc_cpu() |
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{ init_decoder(); } |
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// Constructor |
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sheepshaver_cpu(); |
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|
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// Condition Register accessors |
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// CR & XER accessors |
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uint32 get_cr() const { return cr().get(); } |
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void set_cr(uint32 v) { cr().set(v); } |
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uint32 get_xer() const { return xer().get(); } |
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void set_xer(uint32 v) { xer().set(v); } |
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|
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// Execution loop |
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void execute(uint32 pc); |
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// Execute NATIVE_OP routine |
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void execute_native_op(uint32 native_op); |
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|
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// Execute EMUL_OP routine |
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void execute_emul_op(uint32 emul_op); |
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|
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// Execute 68k routine |
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void execute_68k(uint32 entry, M68kRegisters *r); |
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// Execute MacOS/PPC code |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
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|
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+ |
// Compile one instruction |
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virtual int compile1(codegen_context_t & cg_context); |
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|
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// Resource manager thunk |
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void get_resource(uint32 old_get_resource); |
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|
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// Handle MacOS interrupt |
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< |
void interrupt(uint32 entry, sheepshaver_cpu *cpu); |
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< |
|
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// spcflags for interrupts handling |
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static uint32 spcflags; |
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> |
void interrupt(uint32 entry); |
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> |
void handle_interrupt(); |
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|
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// Lazy memory allocator (one item at a time) |
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void *operator new(size_t size) |
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{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); } |
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void operator delete(void *p) |
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{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); } |
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// FIXME: really make surre array allocation fail at link time? |
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void *operator new[](size_t); |
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< |
void operator delete[](void *p); |
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// Make sure the SIGSEGV handler can access CPU registers |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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}; |
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|
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< |
uint32 sheepshaver_cpu::spcflags = 0; |
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< |
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
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> |
// Memory allocator returning areas aligned on 16-byte boundaries |
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void *operator new(size_t size) |
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{ |
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void *p; |
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|
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< |
void sheepshaver_cpu::init_decoder() |
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> |
#if defined(HAVE_POSIX_MEMALIGN) |
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if (posix_memalign(&p, 16, size) != 0) |
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throw std::bad_alloc(); |
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#elif defined(HAVE_MEMALIGN) |
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p = memalign(16, size); |
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> |
#elif defined(HAVE_VALLOC) |
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p = valloc(size); // page-aligned! |
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#else |
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> |
/* XXX: handle padding ourselves */ |
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p = malloc(size); |
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> |
#endif |
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|
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return p; |
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} |
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|
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void operator delete(void *p) |
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{ |
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< |
#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
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< |
static bool initialized = false; |
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< |
if (initialized) |
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return; |
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initialized = true; |
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> |
#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
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> |
#if defined(__GLIBC__) |
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> |
// this is known to work only with GNU libc |
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> |
free(p); |
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> |
#endif |
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#else |
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free(p); |
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#endif |
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+ |
} |
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|
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+ |
sheepshaver_cpu::sheepshaver_cpu() |
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: powerpc_cpu(enable_jit_p()) |
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{ |
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init_decoder(); |
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+ |
} |
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|
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void sheepshaver_cpu::init_decoder() |
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{ |
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static const instr_info_t sheep_ii_table[] = { |
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{ "sheep", |
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< |
(execute_fn)&sheepshaver_cpu::execute_sheep, |
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(execute_pmf)&sheepshaver_cpu::execute_sheep, |
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NULL, |
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< |
D_form, 6, 0, CFLOW_TRAP |
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> |
PPC_I(SHEEP), |
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> |
D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
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} |
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}; |
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|
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} |
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} |
259 |
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|
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– |
// Forward declaration for native opcode handler |
171 |
– |
static void NativeOp(int selector); |
172 |
– |
|
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/* NativeOp instruction format: |
261 |
< |
+------------+--------------------------+--+----------+------------+ |
262 |
< |
| 6 | |FN| OP | 2 | |
263 |
< |
+------------+--------------------------+--+----------+------------+ |
264 |
< |
0 5 |6 19 20 21 25 26 31 |
261 |
> |
+------------+-------------------------+--+-----------+------------+ |
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> |
| 6 | |FN| OP | 2 | |
263 |
> |
+------------+-------------------------+--+-----------+------------+ |
264 |
> |
0 5 |6 18 19 20 25 26 31 |
265 |
|
*/ |
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|
|
267 |
< |
typedef bit_field< 20, 20 > FN_field; |
268 |
< |
typedef bit_field< 21, 25 > NATIVE_OP_field; |
267 |
> |
typedef bit_field< 19, 19 > FN_field; |
268 |
> |
typedef bit_field< 20, 25 > NATIVE_OP_field; |
269 |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
270 |
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|
271 |
+ |
// "Native" EMUL_OP routines |
272 |
+ |
#define GPR_A(REG) gpr(16 + (REG)) |
273 |
+ |
#define GPR_D(REG) gpr( 8 + (REG)) |
274 |
+ |
|
275 |
+ |
void sheepshaver_cpu::execute_emul_op_microseconds() |
276 |
+ |
{ |
277 |
+ |
Microseconds(GPR_A(0), GPR_D(0)); |
278 |
+ |
} |
279 |
+ |
|
280 |
+ |
void sheepshaver_cpu::execute_emul_op_idle_time_1() |
281 |
+ |
{ |
282 |
+ |
// Sleep if no events pending |
283 |
+ |
if (ReadMacInt32(0x14c) == 0) |
284 |
+ |
Delay_usec(16667); |
285 |
+ |
GPR_A(0) = ReadMacInt32(0x2b6); |
286 |
+ |
} |
287 |
+ |
|
288 |
+ |
void sheepshaver_cpu::execute_emul_op_idle_time_2() |
289 |
+ |
{ |
290 |
+ |
// Sleep if no events pending |
291 |
+ |
if (ReadMacInt32(0x14c) == 0) |
292 |
+ |
Delay_usec(16667); |
293 |
+ |
GPR_D(0) = (uint32)-2; |
294 |
+ |
} |
295 |
+ |
|
296 |
+ |
// Filter out EMUL_OP routines that only call native code |
297 |
+ |
bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op) |
298 |
+ |
{ |
299 |
+ |
switch (emul_op) { |
300 |
+ |
case OP_MICROSECONDS: |
301 |
+ |
execute_emul_op_microseconds(); |
302 |
+ |
return true; |
303 |
+ |
case OP_IDLE_TIME: |
304 |
+ |
execute_emul_op_idle_time_1(); |
305 |
+ |
return true; |
306 |
+ |
case OP_IDLE_TIME_2: |
307 |
+ |
execute_emul_op_idle_time_2(); |
308 |
+ |
return true; |
309 |
+ |
} |
310 |
+ |
return false; |
311 |
+ |
} |
312 |
+ |
|
313 |
+ |
// Execute EMUL_OP routine |
314 |
+ |
void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
315 |
+ |
{ |
316 |
+ |
#if ENABLE_NATIVE_EMUL_OP |
317 |
+ |
// First, filter out EMUL_OPs that can be executed without a mode switch |
318 |
+ |
if (filter_execute_emul_op(emul_op)) |
319 |
+ |
return; |
320 |
+ |
#endif |
321 |
+ |
|
322 |
+ |
M68kRegisters r68; |
323 |
+ |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
324 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
325 |
+ |
for (int i = 0; i < 8; i++) |
326 |
+ |
r68.d[i] = gpr(8 + i); |
327 |
+ |
for (int i = 0; i < 7; i++) |
328 |
+ |
r68.a[i] = gpr(16 + i); |
329 |
+ |
r68.a[7] = gpr(1); |
330 |
+ |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
331 |
+ |
uint32 saved_xer = get_xer(); |
332 |
+ |
EmulOp(&r68, gpr(24), emul_op); |
333 |
+ |
set_cr(saved_cr); |
334 |
+ |
set_xer(saved_xer); |
335 |
+ |
for (int i = 0; i < 8; i++) |
336 |
+ |
gpr(8 + i) = r68.d[i]; |
337 |
+ |
for (int i = 0; i < 7; i++) |
338 |
+ |
gpr(16 + i) = r68.a[i]; |
339 |
+ |
gpr(1) = r68.a[7]; |
340 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
341 |
+ |
} |
342 |
+ |
|
343 |
|
// Execute SheepShaver instruction |
344 |
|
void sheepshaver_cpu::execute_sheep(uint32 opcode) |
345 |
|
{ |
350 |
|
case 0: // EMUL_RETURN |
351 |
|
QuitEmulator(); |
352 |
|
break; |
353 |
< |
|
353 |
> |
|
354 |
|
case 1: // EXEC_RETURN |
355 |
< |
throw sheepshaver_exec_return(); |
355 |
> |
spcflags().set(SPCFLAG_CPU_EXEC_RETURN); |
356 |
|
break; |
357 |
|
|
358 |
|
case 2: // EXEC_NATIVE |
359 |
< |
NativeOp(NATIVE_OP_field::extract(opcode)); |
359 |
> |
execute_native_op(NATIVE_OP_field::extract(opcode)); |
360 |
|
if (FN_field::test(opcode)) |
361 |
|
pc() = lr(); |
362 |
|
else |
363 |
|
pc() += 4; |
364 |
|
break; |
365 |
|
|
366 |
< |
default: { // EMUL_OP |
367 |
< |
M68kRegisters r68; |
209 |
< |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
210 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
211 |
< |
for (int i = 0; i < 8; i++) |
212 |
< |
r68.d[i] = gpr(8 + i); |
213 |
< |
for (int i = 0; i < 7; i++) |
214 |
< |
r68.a[i] = gpr(16 + i); |
215 |
< |
r68.a[7] = gpr(1); |
216 |
< |
EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3); |
217 |
< |
for (int i = 0; i < 8; i++) |
218 |
< |
gpr(8 + i) = r68.d[i]; |
219 |
< |
for (int i = 0; i < 7; i++) |
220 |
< |
gpr(16 + i) = r68.a[i]; |
221 |
< |
gpr(1) = r68.a[7]; |
222 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
366 |
> |
default: // EMUL_OP |
367 |
> |
execute_emul_op(EMUL_OP_field::extract(opcode) - 3); |
368 |
|
pc() += 4; |
369 |
|
break; |
370 |
|
} |
226 |
– |
} |
371 |
|
} |
372 |
|
|
373 |
< |
// Checks for pending interrupts |
374 |
< |
struct execute_nothing { |
375 |
< |
static inline void execute(powerpc_cpu *) { } |
376 |
< |
}; |
373 |
> |
// Compile one instruction |
374 |
> |
int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
375 |
> |
{ |
376 |
> |
#if PPC_ENABLE_JIT |
377 |
> |
const instr_info_t *ii = cg_context.instr_info; |
378 |
> |
if (ii->mnemo != PPC_I(SHEEP)) |
379 |
> |
return COMPILE_FAILURE; |
380 |
> |
|
381 |
> |
int status = COMPILE_FAILURE; |
382 |
> |
powerpc_dyngen & dg = cg_context.codegen; |
383 |
> |
uint32 opcode = cg_context.opcode; |
384 |
|
|
385 |
< |
static void HandleInterrupt(void); |
385 |
> |
switch (opcode & 0x3f) { |
386 |
> |
case 0: // EMUL_RETURN |
387 |
> |
dg.gen_invoke(QuitEmulator); |
388 |
> |
status = COMPILE_CODE_OK; |
389 |
> |
break; |
390 |
|
|
391 |
< |
struct execute_spcflags_check { |
392 |
< |
static inline void execute(powerpc_cpu *cpu) { |
393 |
< |
if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) { |
394 |
< |
if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) { |
395 |
< |
SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON ); |
396 |
< |
enter_mon(); |
397 |
< |
} |
398 |
< |
if (SPCFLAGS_TEST( SPCFLAG_DOINT )) { |
399 |
< |
SPCFLAGS_CLEAR( SPCFLAG_DOINT ); |
400 |
< |
HandleInterrupt(); |
401 |
< |
} |
402 |
< |
if (SPCFLAGS_TEST( SPCFLAG_INT )) { |
403 |
< |
SPCFLAGS_CLEAR( SPCFLAG_INT ); |
404 |
< |
SPCFLAGS_SET( SPCFLAG_DOINT ); |
391 |
> |
case 1: // EXEC_RETURN |
392 |
> |
dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN); |
393 |
> |
// Don't check for pending interrupts, we do know we have to |
394 |
> |
// get out of this block ASAP |
395 |
> |
dg.gen_exec_return(); |
396 |
> |
status = COMPILE_EPILOGUE_OK; |
397 |
> |
break; |
398 |
> |
|
399 |
> |
case 2: { // EXEC_NATIVE |
400 |
> |
uint32 selector = NATIVE_OP_field::extract(opcode); |
401 |
> |
switch (selector) { |
402 |
> |
#if !PPC_REENTRANT_JIT |
403 |
> |
// Filter out functions that may invoke Execute68k() or |
404 |
> |
// CallMacOS(), this would break reentrancy as they could |
405 |
> |
// invalidate the translation cache and even overwrite |
406 |
> |
// continuation code when we are done with them. |
407 |
> |
case NATIVE_PATCH_NAME_REGISTRY: |
408 |
> |
dg.gen_invoke(DoPatchNameRegistry); |
409 |
> |
status = COMPILE_CODE_OK; |
410 |
> |
break; |
411 |
> |
case NATIVE_VIDEO_INSTALL_ACCEL: |
412 |
> |
dg.gen_invoke(VideoInstallAccel); |
413 |
> |
status = COMPILE_CODE_OK; |
414 |
> |
break; |
415 |
> |
case NATIVE_VIDEO_VBL: |
416 |
> |
dg.gen_invoke(VideoVBL); |
417 |
> |
status = COMPILE_CODE_OK; |
418 |
> |
break; |
419 |
> |
case NATIVE_GET_RESOURCE: |
420 |
> |
case NATIVE_GET_1_RESOURCE: |
421 |
> |
case NATIVE_GET_IND_RESOURCE: |
422 |
> |
case NATIVE_GET_1_IND_RESOURCE: |
423 |
> |
case NATIVE_R_GET_RESOURCE: { |
424 |
> |
static const uint32 get_resource_ptr[] = { |
425 |
> |
XLM_GET_RESOURCE, |
426 |
> |
XLM_GET_1_RESOURCE, |
427 |
> |
XLM_GET_IND_RESOURCE, |
428 |
> |
XLM_GET_1_IND_RESOURCE, |
429 |
> |
XLM_R_GET_RESOURCE |
430 |
> |
}; |
431 |
> |
uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]); |
432 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
433 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr(); |
434 |
> |
dg.gen_invoke_CPU_im(func, old_get_resource); |
435 |
> |
status = COMPILE_CODE_OK; |
436 |
> |
break; |
437 |
> |
} |
438 |
> |
case NATIVE_CHECK_LOAD_INVOC: |
439 |
> |
dg.gen_load_T0_GPR(3); |
440 |
> |
dg.gen_load_T1_GPR(4); |
441 |
> |
dg.gen_se_16_32_T1(); |
442 |
> |
dg.gen_load_T2_GPR(5); |
443 |
> |
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc); |
444 |
> |
status = COMPILE_CODE_OK; |
445 |
> |
break; |
446 |
> |
#endif |
447 |
> |
case NATIVE_DISABLE_INTERRUPT: |
448 |
> |
dg.gen_invoke(DisableInterrupt); |
449 |
> |
status = COMPILE_CODE_OK; |
450 |
> |
break; |
451 |
> |
case NATIVE_ENABLE_INTERRUPT: |
452 |
> |
dg.gen_invoke(EnableInterrupt); |
453 |
> |
status = COMPILE_CODE_OK; |
454 |
> |
break; |
455 |
> |
case NATIVE_BITBLT: |
456 |
> |
dg.gen_load_T0_GPR(3); |
457 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
458 |
> |
status = COMPILE_CODE_OK; |
459 |
> |
break; |
460 |
> |
case NATIVE_INVRECT: |
461 |
> |
dg.gen_load_T0_GPR(3); |
462 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_invrect); |
463 |
> |
status = COMPILE_CODE_OK; |
464 |
> |
break; |
465 |
> |
case NATIVE_FILLRECT: |
466 |
> |
dg.gen_load_T0_GPR(3); |
467 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect); |
468 |
> |
status = COMPILE_CODE_OK; |
469 |
> |
break; |
470 |
> |
} |
471 |
> |
// Could we fully translate this NativeOp? |
472 |
> |
if (FN_field::test(opcode)) { |
473 |
> |
if (status != COMPILE_FAILURE) { |
474 |
> |
dg.gen_load_A0_LR(); |
475 |
> |
dg.gen_set_PC_A0(); |
476 |
|
} |
477 |
+ |
cg_context.done_compile = true; |
478 |
+ |
break; |
479 |
+ |
} |
480 |
+ |
else if (status != COMPILE_FAILURE) { |
481 |
+ |
cg_context.done_compile = false; |
482 |
+ |
break; |
483 |
|
} |
484 |
+ |
#if PPC_REENTRANT_JIT |
485 |
+ |
// Try to execute NativeOp trampoline |
486 |
+ |
dg.gen_set_PC_im(cg_context.pc + 4); |
487 |
+ |
dg.gen_mov_32_T0_im(selector); |
488 |
+ |
dg.gen_jmp(native_op_trampoline); |
489 |
+ |
cg_context.done_compile = true; |
490 |
+ |
status = COMPILE_EPILOGUE_OK; |
491 |
+ |
break; |
492 |
+ |
#endif |
493 |
+ |
// Invoke NativeOp handler |
494 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
495 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
496 |
+ |
dg.gen_invoke_CPU_im(func, selector); |
497 |
+ |
cg_context.done_compile = false; |
498 |
+ |
status = COMPILE_CODE_OK; |
499 |
+ |
break; |
500 |
|
} |
253 |
– |
}; |
501 |
|
|
502 |
< |
// Execution loop |
503 |
< |
void sheepshaver_cpu::execute(uint32 entry) |
504 |
< |
{ |
505 |
< |
try { |
506 |
< |
pc() = entry; |
507 |
< |
powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>(); |
502 |
> |
default: { // EMUL_OP |
503 |
> |
uint32 emul_op = EMUL_OP_field::extract(opcode) - 3; |
504 |
> |
#if ENABLE_NATIVE_EMUL_OP |
505 |
> |
typedef void (*emul_op_func_t)(dyngen_cpu_base); |
506 |
> |
emul_op_func_t emul_op_func = 0; |
507 |
> |
switch (emul_op) { |
508 |
> |
case OP_MICROSECONDS: |
509 |
> |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr(); |
510 |
> |
break; |
511 |
> |
case OP_IDLE_TIME: |
512 |
> |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr(); |
513 |
> |
break; |
514 |
> |
case OP_IDLE_TIME_2: |
515 |
> |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr(); |
516 |
> |
break; |
517 |
> |
} |
518 |
> |
if (emul_op_func) { |
519 |
> |
dg.gen_invoke_CPU(emul_op_func); |
520 |
> |
cg_context.done_compile = false; |
521 |
> |
status = COMPILE_CODE_OK; |
522 |
> |
break; |
523 |
> |
} |
524 |
> |
#endif |
525 |
> |
#if PPC_REENTRANT_JIT |
526 |
> |
// Try to execute EmulOp trampoline |
527 |
> |
dg.gen_set_PC_im(cg_context.pc + 4); |
528 |
> |
dg.gen_mov_32_T0_im(emul_op); |
529 |
> |
dg.gen_jmp(emul_op_trampoline); |
530 |
> |
cg_context.done_compile = true; |
531 |
> |
status = COMPILE_EPILOGUE_OK; |
532 |
> |
break; |
533 |
> |
#endif |
534 |
> |
// Invoke EmulOp handler |
535 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
536 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
537 |
> |
dg.gen_invoke_CPU_im(func, emul_op); |
538 |
> |
cg_context.done_compile = false; |
539 |
> |
status = COMPILE_CODE_OK; |
540 |
> |
break; |
541 |
|
} |
262 |
– |
catch (sheepshaver_exec_return const &) { |
263 |
– |
// Nothing, simply return |
542 |
|
} |
543 |
< |
catch (...) { |
544 |
< |
printf("ERROR: execute() received an unknown exception!\n"); |
545 |
< |
QuitEmulator(); |
543 |
> |
return status; |
544 |
> |
#endif |
545 |
> |
return COMPILE_FAILURE; |
546 |
> |
} |
547 |
> |
|
548 |
> |
// CPU context to preserve on interrupt |
549 |
> |
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
550 |
> |
{ |
551 |
> |
#if SAFE_INTERRUPT_PPC >= 2 |
552 |
> |
cpu = _cpu; |
553 |
> |
where = _where; |
554 |
> |
|
555 |
> |
// Save interrupt context |
556 |
> |
memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
557 |
> |
pc = cpu->pc(); |
558 |
> |
lr = cpu->lr(); |
559 |
> |
ctr = cpu->ctr(); |
560 |
> |
cr = cpu->get_cr(); |
561 |
> |
xer = cpu->get_xer(); |
562 |
> |
#endif |
563 |
> |
} |
564 |
> |
|
565 |
> |
sheepshaver_cpu::interrupt_context::~interrupt_context() |
566 |
> |
{ |
567 |
> |
#if SAFE_INTERRUPT_PPC >= 2 |
568 |
> |
// Check whether CPU context was preserved by interrupt |
569 |
> |
if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
570 |
> |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
571 |
> |
for (int i = 0; i < 32; i++) |
572 |
> |
if (gpr[i] != cpu->gpr(i)) |
573 |
> |
printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
574 |
|
} |
575 |
+ |
if (pc != cpu->pc()) |
576 |
+ |
printf("FATAL: %s: interrupt clobbers PC\n", where); |
577 |
+ |
if (lr != cpu->lr()) |
578 |
+ |
printf("FATAL: %s: interrupt clobbers LR\n", where); |
579 |
+ |
if (ctr != cpu->ctr()) |
580 |
+ |
printf("FATAL: %s: interrupt clobbers CTR\n", where); |
581 |
+ |
if (cr != cpu->get_cr()) |
582 |
+ |
printf("FATAL: %s: interrupt clobbers CR\n", where); |
583 |
+ |
if (xer != cpu->get_xer()) |
584 |
+ |
printf("FATAL: %s: interrupt clobbers XER\n", where); |
585 |
+ |
#endif |
586 |
|
} |
587 |
|
|
588 |
|
// Handle MacOS interrupt |
589 |
< |
void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu) |
589 |
> |
void sheepshaver_cpu::interrupt(uint32 entry) |
590 |
|
{ |
591 |
< |
#if MULTICORE_CPU |
592 |
< |
// Initialize stack pointer from previous CPU running |
593 |
< |
gpr(1) = cpu->gpr(1); |
594 |
< |
#else |
591 |
> |
#if EMUL_TIME_STATS |
592 |
> |
interrupt_count++; |
593 |
> |
const clock_t interrupt_start = clock(); |
594 |
> |
#endif |
595 |
> |
|
596 |
> |
#if SAFE_INTERRUPT_PPC |
597 |
> |
static int depth = 0; |
598 |
> |
if (depth != 0) |
599 |
> |
printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
600 |
> |
depth++; |
601 |
> |
#endif |
602 |
> |
|
603 |
|
// Save program counters and branch registers |
604 |
|
uint32 saved_pc = pc(); |
605 |
|
uint32 saved_lr = lr(); |
606 |
|
uint32 saved_ctr= ctr(); |
607 |
< |
#endif |
607 |
> |
uint32 saved_sp = gpr(1); |
608 |
|
|
609 |
< |
// Create stack frame |
610 |
< |
gpr(1) -= 64; |
609 |
> |
// Initialize stack pointer to SheepShaver alternate stack base |
610 |
> |
gpr(1) = SignalStackBase() - 64; |
611 |
|
|
612 |
|
// Build trampoline to return from interrupt |
613 |
< |
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
613 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
614 |
|
|
615 |
|
// Prepare registers for nanokernel interrupt routine |
616 |
< |
kernel_data->v[0x004 >> 2] = gpr(1); |
617 |
< |
kernel_data->v[0x018 >> 2] = gpr(6); |
616 |
> |
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
617 |
> |
kernel_data->v[0x018 >> 2] = htonl(gpr(6)); |
618 |
|
|
619 |
< |
gpr(6) = kernel_data->v[0x65c >> 2]; |
619 |
> |
gpr(6) = ntohl(kernel_data->v[0x65c >> 2]); |
620 |
|
assert(gpr(6) != 0); |
621 |
|
WriteMacInt32(gpr(6) + 0x13c, gpr(7)); |
622 |
|
WriteMacInt32(gpr(6) + 0x144, gpr(8)); |
627 |
|
WriteMacInt32(gpr(6) + 0x16c, gpr(13)); |
628 |
|
|
629 |
|
gpr(1) = KernelDataAddr; |
630 |
< |
gpr(7) = kernel_data->v[0x660 >> 2]; |
630 |
> |
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
631 |
|
gpr(8) = 0; |
632 |
< |
gpr(10) = (uint32)trampoline; |
633 |
< |
gpr(12) = (uint32)trampoline; |
634 |
< |
gpr(13) = cr().get(); |
632 |
> |
gpr(10) = trampoline.addr(); |
633 |
> |
gpr(12) = trampoline.addr(); |
634 |
> |
gpr(13) = get_cr(); |
635 |
|
|
636 |
|
// rlwimi. r7,r7,8,0,0 |
637 |
|
uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7)); |
639 |
|
gpr(7) = result; |
640 |
|
|
641 |
|
gpr(11) = 0xf072; // MSR (SRR1) |
642 |
< |
cr().set((gpr(11) & 0x0fff0000) | (cr().get() & ~0x0fff0000)); |
642 |
> |
cr().set((gpr(11) & 0x0fff0000) | (get_cr() & ~0x0fff0000)); |
643 |
|
|
644 |
|
// Enter nanokernel |
645 |
|
execute(entry); |
646 |
|
|
322 |
– |
// Cleanup stack |
323 |
– |
gpr(1) += 64; |
324 |
– |
|
325 |
– |
#if !MULTICORE_CPU |
647 |
|
// Restore program counters and branch registers |
648 |
|
pc() = saved_pc; |
649 |
|
lr() = saved_lr; |
650 |
|
ctr()= saved_ctr; |
651 |
+ |
gpr(1) = saved_sp; |
652 |
+ |
|
653 |
+ |
#if EMUL_TIME_STATS |
654 |
+ |
interrupt_time += (clock() - interrupt_start); |
655 |
+ |
#endif |
656 |
+ |
|
657 |
+ |
#if SAFE_INTERRUPT_PPC |
658 |
+ |
depth--; |
659 |
|
#endif |
660 |
|
} |
661 |
|
|
662 |
|
// Execute 68k routine |
663 |
|
void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r) |
664 |
|
{ |
665 |
+ |
#if EMUL_TIME_STATS |
666 |
+ |
exec68k_count++; |
667 |
+ |
const clock_t exec68k_start = clock(); |
668 |
+ |
#endif |
669 |
+ |
|
670 |
|
#if SAFE_EXEC_68K |
671 |
|
if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP) |
672 |
|
printf("FATAL: Execute68k() not called from EMUL_OP mode\n"); |
676 |
|
uint32 saved_pc = pc(); |
677 |
|
uint32 saved_lr = lr(); |
678 |
|
uint32 saved_ctr= ctr(); |
679 |
+ |
uint32 saved_cr = get_cr(); |
680 |
|
|
681 |
|
// Create MacOS stack frame |
682 |
+ |
// FIXME: make sure MacOS doesn't expect PPC registers to live on top |
683 |
|
uint32 sp = gpr(1); |
684 |
< |
gpr(1) -= 56 + 19*4 + 18*8; |
684 |
> |
gpr(1) -= 56; |
685 |
|
WriteMacInt32(gpr(1), sp); |
686 |
|
|
687 |
|
// Save PowerPC registers |
688 |
< |
memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13)); |
688 |
> |
uint32 saved_GPRs[19]; |
689 |
> |
memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13)); |
690 |
|
#if SAVE_FP_EXEC_68K |
691 |
< |
memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14)); |
691 |
> |
double saved_FPRs[18]; |
692 |
> |
memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14)); |
693 |
|
#endif |
694 |
|
|
695 |
|
// Setup registers for 68k emulator |
703 |
|
gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR |
704 |
|
gpr(26) = 0; |
705 |
|
gpr(28) = 0; // VBR |
706 |
< |
gpr(29) = kernel_data->ed.v[0x74 >> 2]; // Pointer to opcode table |
707 |
< |
gpr(30) = kernel_data->ed.v[0x78 >> 2]; // Address of emulator |
706 |
> |
gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]); // Pointer to opcode table |
707 |
> |
gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]); // Address of emulator |
708 |
|
gpr(31) = KernelDataAddr + 0x1000; |
709 |
|
|
710 |
|
// Push return address (points to EXEC_RETURN opcode) on stack |
736 |
|
r->a[i] = gpr(16 + i); |
737 |
|
|
738 |
|
// Restore PowerPC registers |
739 |
< |
memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13)); |
739 |
> |
memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13)); |
740 |
|
#if SAVE_FP_EXEC_68K |
741 |
< |
memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14)); |
741 |
> |
memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14)); |
742 |
|
#endif |
743 |
|
|
744 |
|
// Cleanup stack |
745 |
< |
gpr(1) += 56 + 19*4 + 18*8; |
745 |
> |
gpr(1) += 56; |
746 |
|
|
747 |
|
// Restore program counters and branch registers |
748 |
|
pc() = saved_pc; |
749 |
|
lr() = saved_lr; |
750 |
|
ctr()= saved_ctr; |
751 |
+ |
set_cr(saved_cr); |
752 |
+ |
|
753 |
+ |
#if EMUL_TIME_STATS |
754 |
+ |
exec68k_time += (clock() - exec68k_start); |
755 |
+ |
#endif |
756 |
|
} |
757 |
|
|
758 |
|
// Call MacOS PPC code |
759 |
|
uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args) |
760 |
|
{ |
761 |
+ |
#if EMUL_TIME_STATS |
762 |
+ |
macos_exec_count++; |
763 |
+ |
const clock_t macos_exec_start = clock(); |
764 |
+ |
#endif |
765 |
+ |
|
766 |
|
// Save program counters and branch registers |
767 |
|
uint32 saved_pc = pc(); |
768 |
|
uint32 saved_lr = lr(); |
769 |
|
uint32 saved_ctr= ctr(); |
770 |
|
|
771 |
|
// Build trampoline with EXEC_RETURN |
772 |
< |
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
773 |
< |
lr() = (uint32)trampoline; |
772 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
773 |
> |
lr() = trampoline.addr(); |
774 |
|
|
775 |
|
gpr(1) -= 64; // Create stack frame |
776 |
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
801 |
|
lr() = saved_lr; |
802 |
|
ctr()= saved_ctr; |
803 |
|
|
804 |
+ |
#if EMUL_TIME_STATS |
805 |
+ |
macos_exec_time += (clock() - macos_exec_start); |
806 |
+ |
#endif |
807 |
+ |
|
808 |
|
return retval; |
809 |
|
} |
810 |
|
|
813 |
|
{ |
814 |
|
// Save branch registers |
815 |
|
uint32 saved_lr = lr(); |
464 |
– |
uint32 saved_ctr= ctr(); |
816 |
|
|
817 |
< |
const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
817 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
818 |
> |
WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN); |
819 |
> |
lr() = trampoline.addr(); |
820 |
|
|
468 |
– |
lr() = (uint32)trampoline; |
469 |
– |
ctr()= entry; |
821 |
|
execute(entry); |
822 |
|
|
823 |
|
// Restore branch registers |
824 |
|
lr() = saved_lr; |
474 |
– |
ctr()= saved_ctr; |
825 |
|
} |
826 |
|
|
827 |
|
// Resource Manager thunk |
478 |
– |
extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h); |
479 |
– |
|
828 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
829 |
|
{ |
830 |
|
uint32 type = gpr(3); |
835 |
|
|
836 |
|
// Call old routine |
837 |
|
execute_ppc(old_get_resource); |
490 |
– |
uint16 **handle = (uint16 **)gpr(3); |
838 |
|
|
839 |
|
// Call CheckLoad() |
840 |
+ |
uint32 handle = gpr(3); |
841 |
|
check_load_invoc(type, id, handle); |
842 |
< |
gpr(3) = (uint32)handle; |
842 |
> |
gpr(3) = handle; |
843 |
|
|
844 |
|
// Cleanup stack |
845 |
|
gpr(1) += 56; |
850 |
|
* SheepShaver CPU engine interface |
851 |
|
**/ |
852 |
|
|
853 |
< |
static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow |
854 |
< |
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
507 |
< |
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
853 |
> |
// PowerPC CPU emulator |
854 |
> |
static sheepshaver_cpu *ppc_cpu = NULL; |
855 |
|
|
856 |
< |
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
856 |
> |
void FlushCodeCache(uintptr start, uintptr end) |
857 |
|
{ |
858 |
< |
#if MULTICORE_CPU |
859 |
< |
current_cpu = new_cpu; |
513 |
< |
#endif |
514 |
< |
} |
515 |
< |
|
516 |
< |
static inline void cpu_pop() |
517 |
< |
{ |
518 |
< |
#if MULTICORE_CPU |
519 |
< |
current_cpu = main_cpu; |
520 |
< |
#endif |
858 |
> |
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
859 |
> |
ppc_cpu->invalidate_cache_range(start, end); |
860 |
|
} |
861 |
|
|
862 |
|
// Dump PPC registers |
863 |
|
static void dump_registers(void) |
864 |
|
{ |
865 |
< |
current_cpu->dump_registers(); |
865 |
> |
ppc_cpu->dump_registers(); |
866 |
|
} |
867 |
|
|
868 |
|
// Dump log |
869 |
|
static void dump_log(void) |
870 |
|
{ |
871 |
< |
current_cpu->dump_log(); |
871 |
> |
ppc_cpu->dump_log(); |
872 |
|
} |
873 |
|
|
874 |
|
/* |
875 |
|
* Initialize CPU emulation |
876 |
|
*/ |
877 |
|
|
878 |
< |
static struct sigaction sigsegv_action; |
540 |
< |
|
541 |
< |
#if defined(__powerpc__) |
542 |
< |
#include <sys/ucontext.h> |
543 |
< |
#endif |
544 |
< |
|
545 |
< |
static void sigsegv_handler(int sig, siginfo_t *sip, void *scp) |
878 |
> |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
879 |
|
{ |
547 |
– |
const uintptr addr = (uintptr)sip->si_addr; |
880 |
|
#if ENABLE_VOSF |
881 |
< |
// Handle screen fault. |
882 |
< |
extern bool Screen_fault_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction); |
883 |
< |
if (Screen_fault_handler((sigsegv_address_t)addr, SIGSEGV_INVALID_PC)) |
884 |
< |
return; |
881 |
> |
// Handle screen fault |
882 |
> |
extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t); |
883 |
> |
if (Screen_fault_handler(fault_address, fault_instruction)) |
884 |
> |
return SIGSEGV_RETURN_SUCCESS; |
885 |
|
#endif |
886 |
< |
#if defined(__powerpc__) |
887 |
< |
if (addr >= ROM_BASE && addr < ROM_BASE + ROM_SIZE) { |
888 |
< |
printf("IGNORE write access to ROM at %08x\n", addr); |
889 |
< |
(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4; |
890 |
< |
return; |
891 |
< |
} |
892 |
< |
if (addr >= 0xf3012000 && addr < 0xf3014000 && 0) { |
893 |
< |
printf("IGNORE write access to ROM at %08x\n", addr); |
894 |
< |
(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4; |
895 |
< |
return; |
886 |
> |
|
887 |
> |
const uintptr addr = (uintptr)fault_address; |
888 |
> |
#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
889 |
> |
// Ignore writes to ROM |
890 |
> |
if ((addr - ROM_BASE) < ROM_SIZE) |
891 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
892 |
> |
|
893 |
> |
// Get program counter of target CPU |
894 |
> |
sheepshaver_cpu * const cpu = ppc_cpu; |
895 |
> |
const uint32 pc = cpu->pc(); |
896 |
> |
|
897 |
> |
// Fault in Mac ROM or RAM? |
898 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
899 |
> |
if (mac_fault) { |
900 |
> |
|
901 |
> |
// "VM settings" during MacOS 8 installation |
902 |
> |
if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000) |
903 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
904 |
> |
|
905 |
> |
// MacOS 8.5 installation |
906 |
> |
else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000) |
907 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
908 |
> |
|
909 |
> |
// MacOS 8 serial drivers on startup |
910 |
> |
else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000)) |
911 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
912 |
> |
|
913 |
> |
// MacOS 8.1 serial drivers on startup |
914 |
> |
else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
915 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
916 |
> |
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
917 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
918 |
> |
|
919 |
> |
// Ignore writes to the zero page |
920 |
> |
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
921 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
922 |
> |
|
923 |
> |
// Ignore all other faults, if requested |
924 |
> |
if (PrefsFindBool("ignoresegv")) |
925 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
926 |
|
} |
565 |
– |
#endif |
566 |
– |
printf("Caught SIGSEGV at address %p\n", sip->si_addr); |
567 |
– |
printf("Native PC: %08x\n", (((ucontext_t *)scp)->uc_mcontext.regs)->nip); |
568 |
– |
printf("Current CPU: %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
569 |
– |
#if 1 |
570 |
– |
dump_registers(); |
927 |
|
#else |
928 |
< |
printf("Main CPU context\n"); |
573 |
< |
main_cpu->dump_registers(); |
574 |
< |
printf("Interrupts CPU context\n"); |
575 |
< |
interrupt_cpu->dump_registers(); |
928 |
> |
#error "FIXME: You don't have the capability to skip instruction within signal handlers" |
929 |
|
#endif |
930 |
< |
current_cpu->dump_log(); |
930 |
> |
|
931 |
> |
printf("SIGSEGV\n"); |
932 |
> |
printf(" pc %p\n", fault_instruction); |
933 |
> |
printf(" ea %p\n", fault_address); |
934 |
> |
dump_registers(); |
935 |
> |
ppc_cpu->dump_log(); |
936 |
|
enter_mon(); |
937 |
|
QuitEmulator(); |
938 |
+ |
|
939 |
+ |
return SIGSEGV_RETURN_FAILURE; |
940 |
|
} |
941 |
|
|
942 |
|
void init_emul_ppc(void) |
943 |
|
{ |
944 |
|
// Initialize main CPU emulator |
945 |
< |
main_cpu = new sheepshaver_cpu(); |
946 |
< |
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
945 |
> |
ppc_cpu = new sheepshaver_cpu(); |
946 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
947 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
948 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
949 |
|
|
950 |
< |
#if MULTICORE_CPU |
951 |
< |
// Initialize alternate CPU emulator to handle interrupts |
591 |
< |
interrupt_cpu = new sheepshaver_cpu(); |
592 |
< |
#endif |
593 |
< |
|
594 |
< |
// Install SIGSEGV handler |
595 |
< |
sigemptyset(&sigsegv_action.sa_mask); |
596 |
< |
sigsegv_action.sa_sigaction = sigsegv_handler; |
597 |
< |
sigsegv_action.sa_flags = SA_SIGINFO; |
598 |
< |
sigsegv_action.sa_restorer = NULL; |
599 |
< |
sigaction(SIGSEGV, &sigsegv_action, NULL); |
950 |
> |
// Install the handler for SIGSEGV |
951 |
> |
sigsegv_install_handler(sigsegv_handler); |
952 |
|
|
953 |
|
#if ENABLE_MON |
954 |
|
// Install "regs" command in cxmon |
955 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
956 |
|
mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n"); |
957 |
|
#endif |
958 |
+ |
|
959 |
+ |
#if EMUL_TIME_STATS |
960 |
+ |
emul_start_time = clock(); |
961 |
+ |
#endif |
962 |
+ |
} |
963 |
+ |
|
964 |
+ |
/* |
965 |
+ |
* Deinitialize emulation |
966 |
+ |
*/ |
967 |
+ |
|
968 |
+ |
void exit_emul_ppc(void) |
969 |
+ |
{ |
970 |
+ |
#if EMUL_TIME_STATS |
971 |
+ |
clock_t emul_end_time = clock(); |
972 |
+ |
|
973 |
+ |
printf("### Statistics for SheepShaver emulation parts\n"); |
974 |
+ |
const clock_t emul_time = emul_end_time - emul_start_time; |
975 |
+ |
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
976 |
+ |
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
977 |
+ |
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
978 |
+ |
|
979 |
+ |
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
980 |
+ |
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
981 |
+ |
printf("Total " LABEL " time : %.1f sec (%.1f%%)\n", \ |
982 |
+ |
double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC), \ |
983 |
+ |
100.0 * double(VAR_PREFIX##_time) / double(emul_time)); \ |
984 |
+ |
} while (0) |
985 |
+ |
|
986 |
+ |
PRINT_STATS("Execute68k[Trap] execution", exec68k); |
987 |
+ |
PRINT_STATS("NativeOp execution", native_exec); |
988 |
+ |
PRINT_STATS("MacOS routine execution", macos_exec); |
989 |
+ |
|
990 |
+ |
#undef PRINT_STATS |
991 |
+ |
printf("\n"); |
992 |
+ |
#endif |
993 |
+ |
|
994 |
+ |
delete ppc_cpu; |
995 |
|
} |
996 |
|
|
997 |
+ |
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
998 |
+ |
// Initialize EmulOp trampolines |
999 |
+ |
void init_emul_op_trampolines(basic_dyngen & dg) |
1000 |
+ |
{ |
1001 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
1002 |
+ |
func_t func; |
1003 |
+ |
|
1004 |
+ |
// EmulOp |
1005 |
+ |
emul_op_trampoline = dg.gen_start(); |
1006 |
+ |
func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
1007 |
+ |
dg.gen_invoke_CPU_T0(func); |
1008 |
+ |
dg.gen_exec_return(); |
1009 |
+ |
dg.gen_end(); |
1010 |
+ |
|
1011 |
+ |
// NativeOp |
1012 |
+ |
native_op_trampoline = dg.gen_start(); |
1013 |
+ |
func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
1014 |
+ |
dg.gen_invoke_CPU_T0(func); |
1015 |
+ |
dg.gen_exec_return(); |
1016 |
+ |
dg.gen_end(); |
1017 |
+ |
|
1018 |
+ |
D(bug("EmulOp trampoline: %p\n", emul_op_trampoline)); |
1019 |
+ |
D(bug("NativeOp trampoline: %p\n", native_op_trampoline)); |
1020 |
+ |
} |
1021 |
+ |
#endif |
1022 |
+ |
|
1023 |
|
/* |
1024 |
|
* Emulation loop |
1025 |
|
*/ |
1026 |
|
|
1027 |
|
void emul_ppc(uint32 entry) |
1028 |
|
{ |
1029 |
< |
current_cpu = main_cpu; |
1030 |
< |
current_cpu->start_log(); |
1031 |
< |
current_cpu->execute(entry); |
1029 |
> |
#if 0 |
1030 |
> |
ppc_cpu->start_log(); |
1031 |
> |
#endif |
1032 |
> |
// start emulation loop and enable code translation or caching |
1033 |
> |
ppc_cpu->execute(entry); |
1034 |
|
} |
1035 |
|
|
1036 |
|
/* |
1037 |
|
* Handle PowerPC interrupt |
1038 |
|
*/ |
1039 |
|
|
623 |
– |
// Atomic operations |
624 |
– |
extern int atomic_add(int *var, int v); |
625 |
– |
extern int atomic_and(int *var, int v); |
626 |
– |
extern int atomic_or(int *var, int v); |
627 |
– |
|
1040 |
|
void TriggerInterrupt(void) |
1041 |
|
{ |
1042 |
|
#if 0 |
1043 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
1044 |
|
#else |
1045 |
< |
SPCFLAGS_SET( SPCFLAG_INT ); |
1045 |
> |
// Trigger interrupt to main cpu only |
1046 |
> |
if (ppc_cpu) |
1047 |
> |
ppc_cpu->trigger_interrupt(); |
1048 |
|
#endif |
1049 |
|
} |
1050 |
|
|
1051 |
< |
static void HandleInterrupt(void) |
1051 |
> |
void sheepshaver_cpu::handle_interrupt(void) |
1052 |
|
{ |
1053 |
|
// Do nothing if interrupts are disabled |
1054 |
< |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
1054 |
> |
if (*(int32 *)XLM_IRQ_NEST > 0) |
1055 |
|
return; |
1056 |
|
|
1057 |
|
// Do nothing if there is no interrupt pending |
1058 |
|
if (InterruptFlags == 0) |
1059 |
|
return; |
1060 |
|
|
1061 |
+ |
// Current interrupt nest level |
1062 |
+ |
static int interrupt_depth = 0; |
1063 |
+ |
++interrupt_depth; |
1064 |
+ |
|
1065 |
|
// Disable MacOS stack sniffer |
1066 |
|
WriteMacInt32(0x110, 0); |
1067 |
|
|
1069 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
1070 |
|
case MODE_68K: |
1071 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
654 |
– |
assert(current_cpu == main_cpu); |
1072 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1073 |
< |
main_cpu->set_cr(main_cpu->get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
1073 |
> |
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
1074 |
|
break; |
1075 |
|
|
1076 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
1077 |
|
case MODE_NATIVE: |
1078 |
|
// 68k emulator inactive, in nanokernel? |
1079 |
< |
assert(current_cpu == main_cpu); |
1080 |
< |
if (main_cpu->gpr(1) != KernelDataAddr) { |
1079 |
> |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
1080 |
> |
interrupt_context ctx(this, "PowerPC mode"); |
1081 |
> |
|
1082 |
|
// Prepare for 68k interrupt level 1 |
1083 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1084 |
|
WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc, |
1087 |
|
|
1088 |
|
// Execute nanokernel interrupt routine (this will activate the 68k emulator) |
1089 |
|
DisableInterrupt(); |
672 |
– |
cpu_push(interrupt_cpu); |
1090 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
1091 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu); |
1091 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312b1c); |
1092 |
|
else |
1093 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu); |
677 |
< |
cpu_pop(); |
1093 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312a3c); |
1094 |
|
} |
1095 |
|
break; |
1096 |
|
#endif |
1099 |
|
case MODE_EMUL_OP: |
1100 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
1101 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
1102 |
+ |
interrupt_context ctx(this, "68k mode"); |
1103 |
|
#if 1 |
1104 |
|
// Execute full 68k interrupt routine |
1105 |
|
M68kRegisters r; |
1121 |
|
if (InterruptFlags & INTFLAG_VIA) { |
1122 |
|
ClearInterruptFlag(INTFLAG_VIA); |
1123 |
|
ADBInterrupt(); |
1124 |
< |
ExecutePPC(VideoVBL); |
1124 |
> |
ExecuteNative(NATIVE_VIDEO_VBL); |
1125 |
|
} |
1126 |
|
} |
1127 |
|
#endif |
1129 |
|
break; |
1130 |
|
#endif |
1131 |
|
} |
715 |
– |
} |
716 |
– |
|
717 |
– |
/* |
718 |
– |
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
719 |
– |
*/ |
720 |
– |
|
721 |
– |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
722 |
– |
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
1132 |
|
|
1133 |
< |
// FIXME: Make sure 32-bit relocations are used |
1134 |
< |
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
1135 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
727 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
728 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
729 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
730 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
731 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
732 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
733 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
734 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
735 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
736 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
737 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
738 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
739 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
740 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
741 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
742 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
743 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
744 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
745 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
746 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
747 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
748 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
749 |
< |
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
750 |
< |
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
751 |
< |
}; |
1133 |
> |
// We are done with this interrupt |
1134 |
> |
--interrupt_depth; |
1135 |
> |
} |
1136 |
|
|
1137 |
|
static void get_resource(void); |
1138 |
|
static void get_1_resource(void); |
1140 |
|
static void get_1_ind_resource(void); |
1141 |
|
static void r_get_resource(void); |
1142 |
|
|
1143 |
< |
#define GPR(REG) current_cpu->gpr(REG) |
1144 |
< |
|
761 |
< |
static void NativeOp(int selector) |
1143 |
> |
// Execute NATIVE_OP routine |
1144 |
> |
void sheepshaver_cpu::execute_native_op(uint32 selector) |
1145 |
|
{ |
1146 |
+ |
#if EMUL_TIME_STATS |
1147 |
+ |
native_exec_count++; |
1148 |
+ |
const clock_t native_exec_start = clock(); |
1149 |
+ |
#endif |
1150 |
+ |
|
1151 |
|
switch (selector) { |
1152 |
|
case NATIVE_PATCH_NAME_REGISTRY: |
1153 |
|
DoPatchNameRegistry(); |
1159 |
|
VideoVBL(); |
1160 |
|
break; |
1161 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
1162 |
< |
GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4), |
1163 |
< |
(void *)GPR(5), GPR(6), GPR(7)); |
1162 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4), |
1163 |
> |
(void *)gpr(5), gpr(6), gpr(7)); |
1164 |
|
break; |
1165 |
< |
case NATIVE_GET_RESOURCE: |
1166 |
< |
get_resource(); |
1165 |
> |
#ifdef WORDS_BIGENDIAN |
1166 |
> |
case NATIVE_ETHER_IRQ: |
1167 |
> |
EtherIRQ(); |
1168 |
|
break; |
1169 |
< |
case NATIVE_GET_1_RESOURCE: |
1170 |
< |
get_1_resource(); |
1169 |
> |
case NATIVE_ETHER_INIT: |
1170 |
> |
gpr(3) = InitStreamModule((void *)gpr(3)); |
1171 |
|
break; |
1172 |
< |
case NATIVE_GET_IND_RESOURCE: |
1173 |
< |
get_ind_resource(); |
1172 |
> |
case NATIVE_ETHER_TERM: |
1173 |
> |
TerminateStreamModule(); |
1174 |
|
break; |
1175 |
< |
case NATIVE_GET_1_IND_RESOURCE: |
1176 |
< |
get_1_ind_resource(); |
1175 |
> |
case NATIVE_ETHER_OPEN: |
1176 |
> |
gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7)); |
1177 |
> |
break; |
1178 |
> |
case NATIVE_ETHER_CLOSE: |
1179 |
> |
gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5)); |
1180 |
> |
break; |
1181 |
> |
case NATIVE_ETHER_WPUT: |
1182 |
> |
gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4)); |
1183 |
> |
break; |
1184 |
> |
case NATIVE_ETHER_RSRV: |
1185 |
> |
gpr(3) = ether_rsrv((queue_t *)gpr(3)); |
1186 |
> |
break; |
1187 |
> |
#else |
1188 |
> |
case NATIVE_ETHER_INIT: |
1189 |
> |
// FIXME: needs more complicated thunks |
1190 |
> |
gpr(3) = false; |
1191 |
> |
break; |
1192 |
> |
#endif |
1193 |
> |
case NATIVE_SYNC_HOOK: |
1194 |
> |
gpr(3) = NQD_sync_hook(gpr(3)); |
1195 |
> |
break; |
1196 |
> |
case NATIVE_BITBLT_HOOK: |
1197 |
> |
gpr(3) = NQD_bitblt_hook(gpr(3)); |
1198 |
> |
break; |
1199 |
> |
case NATIVE_BITBLT: |
1200 |
> |
NQD_bitblt(gpr(3)); |
1201 |
> |
break; |
1202 |
> |
case NATIVE_FILLRECT_HOOK: |
1203 |
> |
gpr(3) = NQD_fillrect_hook(gpr(3)); |
1204 |
|
break; |
1205 |
< |
case NATIVE_R_GET_RESOURCE: |
1206 |
< |
r_get_resource(); |
1205 |
> |
case NATIVE_INVRECT: |
1206 |
> |
NQD_invrect(gpr(3)); |
1207 |
> |
break; |
1208 |
> |
case NATIVE_FILLRECT: |
1209 |
> |
NQD_fillrect(gpr(3)); |
1210 |
|
break; |
1211 |
|
case NATIVE_SERIAL_NOTHING: |
1212 |
|
case NATIVE_SERIAL_OPEN: |
1225 |
|
SerialStatus, |
1226 |
|
SerialClose |
1227 |
|
}; |
1228 |
< |
GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4)); |
1228 |
> |
gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4)); |
1229 |
> |
break; |
1230 |
> |
} |
1231 |
> |
case NATIVE_GET_RESOURCE: |
1232 |
> |
case NATIVE_GET_1_RESOURCE: |
1233 |
> |
case NATIVE_GET_IND_RESOURCE: |
1234 |
> |
case NATIVE_GET_1_IND_RESOURCE: |
1235 |
> |
case NATIVE_R_GET_RESOURCE: { |
1236 |
> |
typedef void (*GetResourceCallback)(void); |
1237 |
> |
static const GetResourceCallback get_resource_callbacks[] = { |
1238 |
> |
::get_resource, |
1239 |
> |
::get_1_resource, |
1240 |
> |
::get_ind_resource, |
1241 |
> |
::get_1_ind_resource, |
1242 |
> |
::r_get_resource |
1243 |
> |
}; |
1244 |
> |
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
1245 |
|
break; |
1246 |
|
} |
1247 |
|
case NATIVE_DISABLE_INTERRUPT: |
1250 |
|
case NATIVE_ENABLE_INTERRUPT: |
1251 |
|
EnableInterrupt(); |
1252 |
|
break; |
1253 |
+ |
case NATIVE_MAKE_EXECUTABLE: |
1254 |
+ |
MakeExecutable(0, (void *)gpr(4), gpr(5)); |
1255 |
+ |
break; |
1256 |
+ |
case NATIVE_CHECK_LOAD_INVOC: |
1257 |
+ |
check_load_invoc(gpr(3), gpr(4), gpr(5)); |
1258 |
+ |
break; |
1259 |
|
default: |
1260 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
1261 |
|
QuitEmulator(); |
1262 |
|
break; |
1263 |
|
} |
823 |
– |
} |
824 |
– |
|
825 |
– |
/* |
826 |
– |
* Execute native subroutine (LR must contain return address) |
827 |
– |
*/ |
1264 |
|
|
1265 |
< |
void ExecuteNative(int selector) |
1266 |
< |
{ |
1267 |
< |
uint32 tvect[2]; |
832 |
< |
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
833 |
< |
tvect[1] = 0; // Fake TVECT |
834 |
< |
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
835 |
< |
M68kRegisters r; |
836 |
< |
Execute68k((uint32)&desc, &r); |
1265 |
> |
#if EMUL_TIME_STATS |
1266 |
> |
native_exec_time += (clock() - native_exec_start); |
1267 |
> |
#endif |
1268 |
|
} |
1269 |
|
|
1270 |
|
/* |
1275 |
|
|
1276 |
|
void Execute68k(uint32 pc, M68kRegisters *r) |
1277 |
|
{ |
1278 |
< |
current_cpu->execute_68k(pc, r); |
1278 |
> |
ppc_cpu->execute_68k(pc, r); |
1279 |
|
} |
1280 |
|
|
1281 |
|
/* |
1285 |
|
|
1286 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
1287 |
|
{ |
1288 |
< |
uint16 proc[2] = {trap, M68K_RTS}; |
1289 |
< |
Execute68k((uint32)proc, r); |
1288 |
> |
SheepVar proc_var(4); |
1289 |
> |
uint32 proc = proc_var.addr(); |
1290 |
> |
WriteMacInt16(proc, trap); |
1291 |
> |
WriteMacInt16(proc + 2, M68K_RTS); |
1292 |
> |
Execute68k(proc, r); |
1293 |
|
} |
1294 |
|
|
1295 |
|
/* |
1298 |
|
|
1299 |
|
uint32 call_macos(uint32 tvect) |
1300 |
|
{ |
1301 |
< |
return current_cpu->execute_macos_code(tvect, 0, NULL); |
1301 |
> |
return ppc_cpu->execute_macos_code(tvect, 0, NULL); |
1302 |
|
} |
1303 |
|
|
1304 |
|
uint32 call_macos1(uint32 tvect, uint32 arg1) |
1305 |
|
{ |
1306 |
|
const uint32 args[] = { arg1 }; |
1307 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1307 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1308 |
|
} |
1309 |
|
|
1310 |
|
uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2) |
1311 |
|
{ |
1312 |
|
const uint32 args[] = { arg1, arg2 }; |
1313 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1313 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1314 |
|
} |
1315 |
|
|
1316 |
|
uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3) |
1317 |
|
{ |
1318 |
|
const uint32 args[] = { arg1, arg2, arg3 }; |
1319 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1319 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1320 |
|
} |
1321 |
|
|
1322 |
|
uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4) |
1323 |
|
{ |
1324 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4 }; |
1325 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1325 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1326 |
|
} |
1327 |
|
|
1328 |
|
uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5) |
1329 |
|
{ |
1330 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 }; |
1331 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1331 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1332 |
|
} |
1333 |
|
|
1334 |
|
uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6) |
1335 |
|
{ |
1336 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 }; |
1337 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1337 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1338 |
|
} |
1339 |
|
|
1340 |
|
uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7) |
1341 |
|
{ |
1342 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 }; |
1343 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
910 |
< |
} |
911 |
< |
|
912 |
< |
/* |
913 |
< |
* Atomic operations |
914 |
< |
*/ |
915 |
< |
|
916 |
< |
int atomic_add(int *var, int v) |
917 |
< |
{ |
918 |
< |
int ret = *var; |
919 |
< |
*var += v; |
920 |
< |
return ret; |
921 |
< |
} |
922 |
< |
|
923 |
< |
int atomic_and(int *var, int v) |
924 |
< |
{ |
925 |
< |
int ret = *var; |
926 |
< |
*var &= v; |
927 |
< |
return ret; |
928 |
< |
} |
929 |
< |
|
930 |
< |
int atomic_or(int *var, int v) |
931 |
< |
{ |
932 |
< |
int ret = *var; |
933 |
< |
*var |= v; |
934 |
< |
return ret; |
1343 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1344 |
|
} |
1345 |
|
|
1346 |
|
/* |
1349 |
|
|
1350 |
|
void get_resource(void) |
1351 |
|
{ |
1352 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1352 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1353 |
|
} |
1354 |
|
|
1355 |
|
void get_1_resource(void) |
1356 |
|
{ |
1357 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1357 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1358 |
|
} |
1359 |
|
|
1360 |
|
void get_ind_resource(void) |
1361 |
|
{ |
1362 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1362 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1363 |
|
} |
1364 |
|
|
1365 |
|
void get_1_ind_resource(void) |
1366 |
|
{ |
1367 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1367 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1368 |
|
} |
1369 |
|
|
1370 |
|
void r_get_resource(void) |
1371 |
|
{ |
1372 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1372 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1373 |
|
} |