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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.2 by gbeauche, 2003-09-28T21:27:34Z vs.
Revision 1.19 by gbeauche, 2003-11-30T17:21:52Z

#	Line 21 | Line 21
21		#include "sysdeps.h"
22		#include "cpu_emulation.h"
23		#include "main.h"
24	+	#include "prefs.h"
25		#include "xlowmem.h"
26		#include "emul_op.h"
27		#include "rom_patches.h"
28		#include "macos_util.h"
29		#include "block-alloc.hpp"
30		#include "sigsegv.h"
30	–	#include "spcflags.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34
35		// Used for NativeOp trampolines
36		#include "video.h"
37		#include "name_registry.h"
38		#include "serial.h"
39	+	#include "ether.h"
40
41		#include <stdio.h>
42
#	Line 43 | Line 45
45		#include "mon_disass.h"
46		#endif
47
48	<	#define DEBUG 1
48	>	#define DEBUG 0
49		#include "debug.h"
50
51	+	// Emulation time statistics
52	+	#define EMUL_TIME_STATS 1
53	+
54	+	#if EMUL_TIME_STATS
55	+	static clock_t emul_start_time;
56	+	static uint32 interrupt_count = 0;
57	+	static clock_t interrupt_time = 0;
58	+	static uint32 exec68k_count = 0;
59	+	static clock_t exec68k_time = 0;
60	+	static uint32 native_exec_count = 0;
61	+	static clock_t native_exec_time = 0;
62	+	static uint32 macos_exec_count = 0;
63	+	static clock_t macos_exec_time = 0;
64	+	#endif
65	+
66		static void enter_mon(void)
67		{
68		// Start up mon in real-mode
#	Line 56 | Line 73 | static void enter_mon(void)
73		}
74
75		// Enable multicore (main/interrupts) cpu emulation?
76	<	#define MULTICORE_CPU 0
76	>	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
77
78		// Enable Execute68k() safety checks?
79		#define SAFE_EXEC_68K 1
#	Line 70 | Line 87 | static void enter_mon(void)
87		// Interrupts in native mode?
88		#define INTERRUPTS_IN_NATIVE_MODE 1
89
73	–	// 68k Emulator Data
74	–	struct EmulatorData {
75	–	uint32  v[0x400];
76	–	};
77	–
78	–	// Kernel Data
79	–	struct KernelData {
80	–	uint32  v[0x400];
81	–	EmulatorData ed;
82	–	};
83	–
90		// Pointer to Kernel Data
91	<	static KernelData * const kernel_data = (KernelData *)0x68ffe000;
91	>	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
92	>
93	>	// SIGSEGV handler
94	>	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
95
96
97		/**
98		*              PowerPC emulator glue with special 'sheep' opcodes
99		**/
100
101	<	struct sheepshaver_exec_return { };
101	>	enum {
102	>	PPC_I(SHEEP) = PPC_I(MAX),
103	>	PPC_I(SHEEP_MAX)
104	>	};
105
106		class sheepshaver_cpu
107		: public powerpc_cpu
#	Line 99 | Line 111 | class sheepshaver_cpu
111
112		public:
113
114	<	sheepshaver_cpu()
115	<	: powerpc_cpu()
104	<	{ init_decoder(); }
114	>	// Constructor
115	>	sheepshaver_cpu();
116
117		// Condition Register accessors
118		uint32 get_cr() const           { return cr().get(); }
119		void set_cr(uint32 v)           { cr().set(v); }
120
110	–	// Execution loop
111	–	void execute(uint32 pc);
112	–
121		// Execute 68k routine
122		void execute_68k(uint32 entry, M68kRegisters *r);
123
#	Line 123 | Line 131 | public:
131		void get_resource(uint32 old_get_resource);
132
133		// Handle MacOS interrupt
134	<	void interrupt(uint32 entry, sheepshaver_cpu *cpu);
135	<
128	<	// spcflags for interrupts handling
129	<	static uint32 spcflags;
134	>	void interrupt(uint32 entry);
135	>	void handle_interrupt();
136
137		// Lazy memory allocator (one item at a time)
138		void *operator new(size_t size)
#	Line 136 | Line 142 | public:
142		// FIXME: really make surre array allocation fail at link time?
143		void *operator new[](size_t);
144		void operator delete[](void *p);
145	+
146	+	// Make sure the SIGSEGV handler can access CPU registers
147	+	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
148		};
149
141	–	uint32 sheepshaver_cpu::spcflags = 0;
150		lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
151
152	+	sheepshaver_cpu::sheepshaver_cpu()
153	+	: powerpc_cpu()
154	+	{
155	+	init_decoder();
156	+	}
157	+
158		void sheepshaver_cpu::init_decoder()
159		{
160		#ifndef PPC_NO_STATIC_II_INDEX_TABLE
#	Line 152 | Line 166 | void sheepshaver_cpu::init_decoder()
166
167		static const instr_info_t sheep_ii_table[] = {
168		{ "sheep",
169	<	(execute_fn)&sheepshaver_cpu::execute_sheep,
169	>	(execute_pmf)&sheepshaver_cpu::execute_sheep,
170		NULL,
171	<	D_form, 6, 0, CFLOW_TRAP
171	>	PPC_I(SHEEP),
172	>	D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
173		}
174		};
175
#	Line 191 | Line 206 | void sheepshaver_cpu::execute_sheep(uint
206		case 0:         // EMUL_RETURN
207		QuitEmulator();
208		break;
209	<
209	>
210		case 1:         // EXEC_RETURN
211	<	throw sheepshaver_exec_return();
211	>	spcflags().set(SPCFLAG_CPU_EXEC_RETURN);
212		break;
213
214		case 2:         // EXEC_NATIVE
#	Line 226 | Line 241 | void sheepshaver_cpu::execute_sheep(uint
241		}
242		}
243
229	–	// Checks for pending interrupts
230	–	struct execute_nothing {
231	–	static inline void execute(powerpc_cpu *) { }
232	–	};
233	–
234	–	static void HandleInterrupt(void);
235	–
236	–	struct execute_spcflags_check {
237	–	static inline void execute(powerpc_cpu *cpu) {
238	–	if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) {
239	–	if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) {
240	–	SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON );
241	–	enter_mon();
242	–	}
243	–	if (SPCFLAGS_TEST( SPCFLAG_DOINT )) {
244	–	SPCFLAGS_CLEAR( SPCFLAG_DOINT );
245	–	HandleInterrupt();
246	–	}
247	–	if (SPCFLAGS_TEST( SPCFLAG_INT )) {
248	–	SPCFLAGS_CLEAR( SPCFLAG_INT );
249	–	SPCFLAGS_SET( SPCFLAG_DOINT );
250	–	}
251	–	}
252	–	}
253	–	};
254	–
255	–	// Execution loop
256	–	void sheepshaver_cpu::execute(uint32 entry)
257	–	{
258	–	try {
259	–	pc() = entry;
260	–	powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>();
261	–	}
262	–	catch (sheepshaver_exec_return const &) {
263	–	// Nothing, simply return
264	–	}
265	–	catch (...) {
266	–	printf("ERROR: execute() received an unknown exception!\n");
267	–	QuitEmulator();
268	–	}
269	–	}
270	–
244		// Handle MacOS interrupt
245	<	void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu)
245	>	void sheepshaver_cpu::interrupt(uint32 entry)
246		{
247	<	#if MULTICORE_CPU
248	<	// Initialize stack pointer from previous CPU running
249	<	gpr(1) = cpu->gpr(1);
250	<	#else
247	>	#if EMUL_TIME_STATS
248	>	interrupt_count++;
249	>	const clock_t interrupt_start = clock();
250	>	#endif
251	>
252	>	#if !MULTICORE_CPU
253		// Save program counters and branch registers
254		uint32 saved_pc = pc();
255		uint32 saved_lr = lr();
256		uint32 saved_ctr= ctr();
257	+	uint32 saved_sp = gpr(1);
258		#endif
259
260	<	// Create stack frame
261	<	gpr(1) -= 64;
260	>	// Initialize stack pointer to SheepShaver alternate stack base
261	>	gpr(1) = SheepStack1Base - 64;
262
263		// Build trampoline to return from interrupt
264	<	uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
264	>	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
265
266		// Prepare registers for nanokernel interrupt routine
267	<	kernel_data->v[0x004 >> 2] = gpr(1);
268	<	kernel_data->v[0x018 >> 2] = gpr(6);
267	>	kernel_data->v[0x004 >> 2] = htonl(gpr(1));
268	>	kernel_data->v[0x018 >> 2] = htonl(gpr(6));
269
270	<	gpr(6) = kernel_data->v[0x65c >> 2];
270	>	gpr(6) = ntohl(kernel_data->v[0x65c >> 2]);
271		assert(gpr(6) != 0);
272		WriteMacInt32(gpr(6) + 0x13c, gpr(7));
273		WriteMacInt32(gpr(6) + 0x144, gpr(8));
#	Line 302 | Line 278 | void sheepshaver_cpu::interrupt(uint32 e
278		WriteMacInt32(gpr(6) + 0x16c, gpr(13));
279
280		gpr(1)  = KernelDataAddr;
281	<	gpr(7)  = kernel_data->v[0x660 >> 2];
281	>	gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
282		gpr(8)  = 0;
283		gpr(10) = (uint32)trampoline;
284		gpr(12) = (uint32)trampoline;
285	<	gpr(13) = cr().get();
285	>	gpr(13) = get_cr();
286
287		// rlwimi. r7,r7,8,0,0
288		uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7));
#	Line 314 | Line 290 | void sheepshaver_cpu::interrupt(uint32 e
290		gpr(7) = result;
291
292		gpr(11) = 0xf072; // MSR (SRR1)
293	<	cr().set((gpr(11) & 0x0fff0000) | (cr().get() & ~0x0fff0000));
293	>	cr().set((gpr(11) & 0x0fff0000) | (get_cr() & ~0x0fff0000));
294
295		// Enter nanokernel
296		execute(entry);
297
322	–	// Cleanup stack
323	–	gpr(1) += 64;
324	–
298		#if !MULTICORE_CPU
299		// Restore program counters and branch registers
300		pc() = saved_pc;
301		lr() = saved_lr;
302		ctr()= saved_ctr;
303	+	gpr(1) = saved_sp;
304	+	#endif
305	+
306	+	#if EMUL_TIME_STATS
307	+	interrupt_time += (clock() - interrupt_start);
308		#endif
309		}
310
311		// Execute 68k routine
312		void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r)
313		{
314	+	#if EMUL_TIME_STATS
315	+	exec68k_count++;
316	+	const clock_t exec68k_start = clock();
317	+	#endif
318	+
319		#if SAFE_EXEC_68K
320		if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP)
321		printf("FATAL: Execute68k() not called from EMUL_OP mode\n");
#	Line 342 | Line 325 | void sheepshaver_cpu::execute_68k(uint32
325		uint32 saved_pc = pc();
326		uint32 saved_lr = lr();
327		uint32 saved_ctr= ctr();
328	+	uint32 saved_cr = get_cr();
329
330		// Create MacOS stack frame
331	+	// FIXME: make sure MacOS doesn't expect PPC registers to live on top
332		uint32 sp = gpr(1);
333	<	gpr(1) -= 56 + 19*4 + 18*8;
333	>	gpr(1) -= 56;
334		WriteMacInt32(gpr(1), sp);
335
336		// Save PowerPC registers
337	<	memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13));
337	>	uint32 saved_GPRs[19];
338	>	memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13));
339		#if SAVE_FP_EXEC_68K
340	<	memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14));
340	>	double saved_FPRs[18];
341	>	memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14));
342		#endif
343
344		// Setup registers for 68k emulator
#	Line 365 | Line 352 | void sheepshaver_cpu::execute_68k(uint32
352		gpr(25) = ReadMacInt32(XLM_68K_R25);            // MSB of SR
353		gpr(26) = 0;
354		gpr(28) = 0;                                                            // VBR
355	<	gpr(29) = kernel_data->ed.v[0x74 >> 2];         // Pointer to opcode table
356	<	gpr(30) = kernel_data->ed.v[0x78 >> 2];         // Address of emulator
355	>	gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]);          // Pointer to opcode table
356	>	gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]);          // Address of emulator
357		gpr(31) = KernelDataAddr + 0x1000;
358
359		// Push return address (points to EXEC_RETURN opcode) on stack
#	Line 398 | Line 385 | void sheepshaver_cpu::execute_68k(uint32
385		r->a[i] = gpr(16 + i);
386
387		// Restore PowerPC registers
388	<	memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13));
388	>	memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13));
389		#if SAVE_FP_EXEC_68K
390	<	memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14));
390	>	memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14));
391		#endif
392
393		// Cleanup stack
394	<	gpr(1) += 56 + 19*4 + 18*8;
394	>	gpr(1) += 56;
395
396		// Restore program counters and branch registers
397		pc() = saved_pc;
398		lr() = saved_lr;
399		ctr()= saved_ctr;
400	+	set_cr(saved_cr);
401	+
402	+	#if EMUL_TIME_STATS
403	+	exec68k_time += (clock() - exec68k_start);
404	+	#endif
405		}
406
407		// Call MacOS PPC code
408		uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args)
409		{
410	+	#if EMUL_TIME_STATS
411	+	macos_exec_count++;
412	+	const clock_t macos_exec_start = clock();
413	+	#endif
414	+
415		// Save program counters and branch registers
416		uint32 saved_pc = pc();
417		uint32 saved_lr = lr();
418		uint32 saved_ctr= ctr();
419
420		// Build trampoline with EXEC_RETURN
421	<	uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
421	>	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
422		lr() = (uint32)trampoline;
423
424		gpr(1) -= 64;                                                           // Create stack frame
#	Line 453 | Line 450 | uint32 sheepshaver_cpu::execute_macos_co
450		lr() = saved_lr;
451		ctr()= saved_ctr;
452
453	+	#if EMUL_TIME_STATS
454	+	macos_exec_time += (clock() - macos_exec_start);
455	+	#endif
456	+
457		return retval;
458		}
459
#	Line 461 | Line 462 | inline void sheepshaver_cpu::execute_ppc
462		{
463		// Save branch registers
464		uint32 saved_lr = lr();
464	–	uint32 saved_ctr= ctr();
465	–
466	–	const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
465
466	+	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
467		lr() = (uint32)trampoline;
468	<	ctr()= entry;
468	>
469		execute(entry);
470
471		// Restore branch registers
472		lr() = saved_lr;
474	–	ctr()= saved_ctr;
473		}
474
475		// Resource Manager thunk
476	<	extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h);
476	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
477
478		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
479		{
#	Line 487 | Line 485 | inline void sheepshaver_cpu::get_resourc
485
486		// Call old routine
487		execute_ppc(old_get_resource);
490	–	uint16 **handle = (uint16 **)gpr(3);
488
489		// Call CheckLoad()
490	+	uint32 handle = gpr(3);
491		check_load_invoc(type, id, handle);
492	<	gpr(3) = (uint32)handle;
492	>	gpr(3) = handle;
493
494		// Cleanup stack
495		gpr(1) += 56;
#	Line 506 | Line 504 | static sheepshaver_cpu *main_cpu = NULL;
504		static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
505		static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
506
507	+	void FlushCodeCache(uintptr start, uintptr end)
508	+	{
509	+	D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
510	+	main_cpu->invalidate_cache_range(start, end);
511	+	#if MULTICORE_CPU
512	+	interrupt_cpu->invalidate_cache_range(start, end);
513	+	#endif
514	+	}
515	+
516		static inline void cpu_push(sheepshaver_cpu *new_cpu)
517		{
518		#if MULTICORE_CPU
#	Line 536 | Line 543 | static void dump_log(void)
543		*  Initialize CPU emulation
544		*/
545
546	<	static struct sigaction sigsegv_action;
540	<
541	<	#if defined(__powerpc__)
542	<	#include <sys/ucontext.h>
543	<	#endif
544	<
545	<	static void sigsegv_handler(int sig, siginfo_t *sip, void *scp)
546	>	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
547		{
547	–	const uintptr addr = (uintptr)sip->si_addr;
548		#if ENABLE_VOSF
549	<	// Handle screen fault.
550	<	extern bool Screen_fault_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction);
551	<	if (Screen_fault_handler((sigsegv_address_t)addr, SIGSEGV_INVALID_PC))
552	<	return;
549	>	// Handle screen fault
550	>	extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
551	>	if (Screen_fault_handler(fault_address, fault_instruction))
552	>	return SIGSEGV_RETURN_SUCCESS;
553		#endif
554	<	#if defined(__powerpc__)
555	<	if (addr >= ROM_BASE && addr < ROM_BASE + ROM_SIZE) {
556	<	printf("IGNORE write access to ROM at %08x\n", addr);
557	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
558	<	return;
559	<	}
560	<	if (addr >= 0xf3012000 && addr < 0xf3014000 && 0) {
561	<	printf("IGNORE write access to ROM at %08x\n", addr);
562	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
563	<	return;
554	>
555	>	const uintptr addr = (uintptr)fault_address;
556	>	#if HAVE_SIGSEGV_SKIP_INSTRUCTION
557	>	// Ignore writes to ROM
558	>	if ((addr - ROM_BASE) < ROM_SIZE)
559	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
560	>
561	>	// Get program counter of target CPU
562	>	sheepshaver_cpu * const cpu = current_cpu;
563	>	const uint32 pc = cpu->pc();
564	>
565	>	// Fault in Mac ROM or RAM?
566	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
567	>	if (mac_fault) {
568	>
569	>	// "VM settings" during MacOS 8 installation
570	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
571	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
572	>
573	>	// MacOS 8.5 installation
574	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
575	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
576	>
577	>	// MacOS 8 serial drivers on startup
578	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
579	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
580	>
581	>	// MacOS 8.1 serial drivers on startup
582	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
583	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
584	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
585	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
586	>
587	>	// Ignore all other faults, if requested
588	>	if (PrefsFindBool("ignoresegv"))
589	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
590		}
565	–	#endif
566	–	printf("Caught SIGSEGV at address %p\n", sip->si_addr);
567	–	printf("Native PC: %08x\n", (((ucontext_t *)scp)->uc_mcontext.regs)->nip);
568	–	printf("Current CPU: %s\n", current_cpu == main_cpu ? "main" : "interrupts");
569	–	#if 1
570	–	dump_registers();
591		#else
592	<	printf("Main CPU context\n");
573	<	main_cpu->dump_registers();
574	<	printf("Interrupts CPU context\n");
575	<	interrupt_cpu->dump_registers();
592	>	#error "FIXME: You don't have the capability to skip instruction within signal handlers"
593		#endif
594	+
595	+	printf("SIGSEGV\n");
596	+	printf("  pc %p\n", fault_instruction);
597	+	printf("  ea %p\n", fault_address);
598	+	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
599	+	dump_registers();
600		current_cpu->dump_log();
601		enter_mon();
602		QuitEmulator();
603	+
604	+	return SIGSEGV_RETURN_FAILURE;
605		}
606
607		void init_emul_ppc(void)
#	Line 591 | Line 616 | void init_emul_ppc(void)
616		interrupt_cpu = new sheepshaver_cpu();
617		#endif
618
619	<	// Install SIGSEGV handler
620	<	sigemptyset(&sigsegv_action.sa_mask);
596	<	sigsegv_action.sa_sigaction = sigsegv_handler;
597	<	sigsegv_action.sa_flags = SA_SIGINFO;
598	<	sigsegv_action.sa_restorer = NULL;
599	<	sigaction(SIGSEGV, &sigsegv_action, NULL);
619	>	// Install the handler for SIGSEGV
620	>	sigsegv_install_handler(sigsegv_handler);
621
622		#if ENABLE_MON
623		// Install "regs" command in cxmon
624		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
625		mon_add_command("log", dump_log, "log                      Dump PowerPC emulation log\n");
626		#endif
627	+
628	+	#if EMUL_TIME_STATS
629	+	emul_start_time = clock();
630	+	#endif
631	+	}
632	+
633	+	/*
634	+	*  Deinitialize emulation
635	+	*/
636	+
637	+	void exit_emul_ppc(void)
638	+	{
639	+	#if EMUL_TIME_STATS
640	+	clock_t emul_end_time = clock();
641	+
642	+	printf("### Statistics for SheepShaver emulation parts\n");
643	+	const clock_t emul_time = emul_end_time - emul_start_time;
644	+	printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
645	+	printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
646	+	(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
647	+
648	+	#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
649	+	printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
650	+	printf("Total " LABEL " time  : %.1f sec (%.1f%%)\n",                   \
651	+	double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC),          \
652	+	100.0 * double(VAR_PREFIX##_time) / double(emul_time));      \
653	+	} while (0)
654	+
655	+	PRINT_STATS("Execute68k[Trap] execution", exec68k);
656	+	PRINT_STATS("NativeOp execution", native_exec);
657	+	PRINT_STATS("MacOS routine execution", macos_exec);
658	+
659	+	#undef PRINT_STATS
660	+	printf("\n");
661	+	#endif
662	+
663	+	delete main_cpu;
664	+	#if MULTICORE_CPU
665	+	delete interrupt_cpu;
666	+	#endif
667		}
668
669		/*
#	Line 612 | Line 673 | void init_emul_ppc(void)
673		void emul_ppc(uint32 entry)
674		{
675		current_cpu = main_cpu;
676	+	#if DEBUG
677		current_cpu->start_log();
678	+	#endif
679	+	// start emulation loop and enable code translation or caching
680		current_cpu->execute(entry);
681		}
682
#	Line 620 | Line 684 | void emul_ppc(uint32 entry)
684		*  Handle PowerPC interrupt
685		*/
686
687	<	// Atomic operations
688	<	extern int atomic_add(int *var, int v);
689	<	extern int atomic_and(int *var, int v);
690	<	extern int atomic_or(int *var, int v);
691	<
687	>	#if ASYNC_IRQ
688	>	void HandleInterrupt(void)
689	>	{
690	>	main_cpu->handle_interrupt();
691	>	}
692	>	#else
693		void TriggerInterrupt(void)
694		{
695		#if 0
696		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
697		#else
698	<	SPCFLAGS_SET( SPCFLAG_INT );
698	>	// Trigger interrupt to main cpu only
699	>	if (main_cpu)
700	>	main_cpu->trigger_interrupt();
701		#endif
702		}
703	+	#endif
704
705	<	static void HandleInterrupt(void)
705	>	void sheepshaver_cpu::handle_interrupt(void)
706		{
707		// Do nothing if interrupts are disabled
708	<	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
708	>	if (*(int32 *)XLM_IRQ_NEST > 0)
709		return;
710
711		// Do nothing if there is no interrupt pending
#	Line 653 | Line 721 | static void HandleInterrupt(void)
721		// 68k emulator active, trigger 68k interrupt level 1
722		assert(current_cpu == main_cpu);
723		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
724	<	main_cpu->set_cr(main_cpu->get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
724	>	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
725		break;
726
727		#if INTERRUPTS_IN_NATIVE_MODE
728		case MODE_NATIVE:
729		// 68k emulator inactive, in nanokernel?
730		assert(current_cpu == main_cpu);
731	<	if (main_cpu->gpr(1) != KernelDataAddr) {
731	>	if (gpr(1) != KernelDataAddr) {
732		// Prepare for 68k interrupt level 1
733		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
734		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 671 | Line 739 | static void HandleInterrupt(void)
739		DisableInterrupt();
740		cpu_push(interrupt_cpu);
741		if (ROMType == ROMTYPE_NEWWORLD)
742	<	current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu);
742	>	current_cpu->interrupt(ROM_BASE + 0x312b1c);
743		else
744	<	current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu);
744	>	current_cpu->interrupt(ROM_BASE + 0x312a3c);
745		cpu_pop();
746		}
747		break;
#	Line 748 | Line 816 | const uint32 NativeOpTable[NATIVE_OP_MAX
816		POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
817		POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
818		POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
819	+	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
820		};
821
822		static void get_resource(void);
#	Line 760 | Line 829 | static void r_get_resource(void);
829
830		static void NativeOp(int selector)
831		{
832	+	#if EMUL_TIME_STATS
833	+	native_exec_count++;
834	+	const clock_t native_exec_start = clock();
835	+	#endif
836	+
837		switch (selector) {
838		case NATIVE_PATCH_NAME_REGISTRY:
839		DoPatchNameRegistry();
#	Line 774 | Line 848 | static void NativeOp(int selector)
848		GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
849		(void *)GPR(5), GPR(6), GPR(7));
850		break;
851	<	case NATIVE_GET_RESOURCE:
852	<	get_resource();
851	>	#ifdef WORDS_BIGENDIAN
852	>	case NATIVE_ETHER_IRQ:
853	>	EtherIRQ();
854		break;
855	<	case NATIVE_GET_1_RESOURCE:
856	<	get_1_resource();
855	>	case NATIVE_ETHER_INIT:
856	>	GPR(3) = InitStreamModule((void *)GPR(3));
857		break;
858	<	case NATIVE_GET_IND_RESOURCE:
859	<	get_ind_resource();
858	>	case NATIVE_ETHER_TERM:
859	>	TerminateStreamModule();
860		break;
861	<	case NATIVE_GET_1_IND_RESOURCE:
862	<	get_1_ind_resource();
861	>	case NATIVE_ETHER_OPEN:
862	>	GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7));
863	>	break;
864	>	case NATIVE_ETHER_CLOSE:
865	>	GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5));
866	>	break;
867	>	case NATIVE_ETHER_WPUT:
868	>	GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4));
869		break;
870	<	case NATIVE_R_GET_RESOURCE:
871	<	r_get_resource();
870	>	case NATIVE_ETHER_RSRV:
871	>	GPR(3) = ether_rsrv((queue_t *)GPR(3));
872		break;
873	+	#else
874	+	case NATIVE_ETHER_INIT:
875	+	// FIXME: needs more complicated thunks
876	+	GPR(3) = false;
877	+	break;
878	+	#endif
879		case NATIVE_SERIAL_NOTHING:
880		case NATIVE_SERIAL_OPEN:
881		case NATIVE_SERIAL_PRIME_IN:
#	Line 809 | Line 896 | static void NativeOp(int selector)
896		GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
897		break;
898		}
899	+	case NATIVE_GET_RESOURCE:
900	+	case NATIVE_GET_1_RESOURCE:
901	+	case NATIVE_GET_IND_RESOURCE:
902	+	case NATIVE_GET_1_IND_RESOURCE:
903	+	case NATIVE_R_GET_RESOURCE: {
904	+	typedef void (*GetResourceCallback)(void);
905	+	static const GetResourceCallback get_resource_callbacks[] = {
906	+	get_resource,
907	+	get_1_resource,
908	+	get_ind_resource,
909	+	get_1_ind_resource,
910	+	r_get_resource
911	+	};
912	+	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
913	+	break;
914	+	}
915		case NATIVE_DISABLE_INTERRUPT:
916		DisableInterrupt();
917		break;
918		case NATIVE_ENABLE_INTERRUPT:
919		EnableInterrupt();
920		break;
921	+	case NATIVE_MAKE_EXECUTABLE:
922	+	MakeExecutable(0, (void *)GPR(4), GPR(5));
923	+	break;
924		default:
925		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
926		QuitEmulator();
927		break;
928		}
929	+
930	+	#if EMUL_TIME_STATS
931	+	native_exec_time += (clock() - native_exec_start);
932	+	#endif
933		}
934
935		/*
#	Line 854 | Line 964 | void Execute68k(uint32 pc, M68kRegisters
964
965		void Execute68kTrap(uint16 trap, M68kRegisters *r)
966		{
967	<	uint16 proc[2] = {trap, M68K_RTS};
967	>	uint16 proc[2];
968	>	proc[0] = htons(trap);
969	>	proc[1] = htons(M68K_RTS);
970		Execute68k((uint32)proc, r);
971		}
972
#	Line 910 | Line 1022 | uint32 call_macos7(uint32 tvect, uint32
1022		}
1023
1024		/*
913	–	*  Atomic operations
914	–	*/
915	–
916	–	int atomic_add(int *var, int v)
917	–	{
918	–	int ret = *var;
919	–	*var += v;
920	–	return ret;
921	–	}
922	–
923	–	int atomic_and(int *var, int v)
924	–	{
925	–	int ret = *var;
926	–	*var &= v;
927	–	return ret;
928	–	}
929	–
930	–	int atomic_or(int *var, int v)
931	–	{
932	–	int ret = *var;
933	–	*var |= v;
934	–	return ret;
935	–	}
936	–
937	–	/*
1025		*  Resource Manager thunks
1026		*/
1027

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