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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.2 by gbeauche, 2003-09-28T21:27:34Z vs.
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z

#	Line 21 | Line 21
21		#include "sysdeps.h"
22		#include "cpu_emulation.h"
23		#include "main.h"
24	+	#include "prefs.h"
25		#include "xlowmem.h"
26		#include "emul_op.h"
27		#include "rom_patches.h"
28		#include "macos_util.h"
29		#include "block-alloc.hpp"
30		#include "sigsegv.h"
30	–	#include "spcflags.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33
#	Line 43 | Line 43
43		#include "mon_disass.h"
44		#endif
45
46	<	#define DEBUG 1
46	>	#define DEBUG 0
47		#include "debug.h"
48
49	+	// Emulation time statistics
50	+	#define EMUL_TIME_STATS 1
51	+
52	+	#if EMUL_TIME_STATS
53	+	static clock_t emul_start_time;
54	+	static uint32 interrupt_count = 0;
55	+	static clock_t interrupt_time = 0;
56	+	static uint32 exec68k_count = 0;
57	+	static clock_t exec68k_time = 0;
58	+	static uint32 native_exec_count = 0;
59	+	static clock_t native_exec_time = 0;
60	+	static uint32 macos_exec_count = 0;
61	+	static clock_t macos_exec_time = 0;
62	+	#endif
63	+
64		static void enter_mon(void)
65		{
66		// Start up mon in real-mode
#	Line 56 | Line 71 | static void enter_mon(void)
71		}
72
73		// Enable multicore (main/interrupts) cpu emulation?
74	<	#define MULTICORE_CPU 0
74	>	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
75
76		// Enable Execute68k() safety checks?
77		#define SAFE_EXEC_68K 1
#	Line 70 | Line 85 | static void enter_mon(void)
85		// Interrupts in native mode?
86		#define INTERRUPTS_IN_NATIVE_MODE 1
87
73	–	// 68k Emulator Data
74	–	struct EmulatorData {
75	–	uint32  v[0x400];
76	–	};
77	–
78	–	// Kernel Data
79	–	struct KernelData {
80	–	uint32  v[0x400];
81	–	EmulatorData ed;
82	–	};
83	–
88		// Pointer to Kernel Data
89	<	static KernelData * const kernel_data = (KernelData *)0x68ffe000;
89	>	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
90
91
92		/**
93		*              PowerPC emulator glue with special 'sheep' opcodes
94		**/
95
92	–	struct sheepshaver_exec_return { };
93	–
96		class sheepshaver_cpu
97		: public powerpc_cpu
98		{
#	Line 99 | Line 101 | class sheepshaver_cpu
101
102		public:
103
104	<	sheepshaver_cpu()
105	<	: powerpc_cpu()
104	<	{ init_decoder(); }
104	>	// Constructor
105	>	sheepshaver_cpu();
106
107		// Condition Register accessors
108		uint32 get_cr() const           { return cr().get(); }
109		void set_cr(uint32 v)           { cr().set(v); }
110
111		// Execution loop
112	<	void execute(uint32 pc);
112	>	void execute(uint32 entry, bool enable_cache = false);
113
114		// Execute 68k routine
115		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 123 | Line 124 | public:
124		void get_resource(uint32 old_get_resource);
125
126		// Handle MacOS interrupt
127	<	void interrupt(uint32 entry, sheepshaver_cpu *cpu);
128	<
128	<	// spcflags for interrupts handling
129	<	static uint32 spcflags;
127	>	void interrupt(uint32 entry);
128	>	void handle_interrupt();
129
130		// Lazy memory allocator (one item at a time)
131		void *operator new(size_t size)
#	Line 138 | Line 137 | public:
137		void operator delete[](void *p);
138		};
139
141	–	uint32 sheepshaver_cpu::spcflags = 0;
140		lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
141
142	+	sheepshaver_cpu::sheepshaver_cpu()
143	+	: powerpc_cpu()
144	+	{
145	+	init_decoder();
146	+	}
147	+
148		void sheepshaver_cpu::init_decoder()
149		{
150		#ifndef PPC_NO_STATIC_II_INDEX_TABLE
#	Line 152 | Line 156 | void sheepshaver_cpu::init_decoder()
156
157		static const instr_info_t sheep_ii_table[] = {
158		{ "sheep",
159	<	(execute_fn)&sheepshaver_cpu::execute_sheep,
159	>	(execute_pmf)&sheepshaver_cpu::execute_sheep,
160		NULL,
161	<	D_form, 6, 0, CFLOW_TRAP
161	>	D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
162		}
163		};
164
#	Line 191 | Line 195 | void sheepshaver_cpu::execute_sheep(uint
195		case 0:         // EMUL_RETURN
196		QuitEmulator();
197		break;
198	<
198	>
199		case 1:         // EXEC_RETURN
200	<	throw sheepshaver_exec_return();
200	>	spcflags().set(SPCFLAG_CPU_EXEC_RETURN);
201		break;
202
203		case 2:         // EXEC_NATIVE
#	Line 226 | Line 230 | void sheepshaver_cpu::execute_sheep(uint
230		}
231		}
232
229	–	// Checks for pending interrupts
230	–	struct execute_nothing {
231	–	static inline void execute(powerpc_cpu *) { }
232	–	};
233	–
234	–	static void HandleInterrupt(void);
235	–
236	–	struct execute_spcflags_check {
237	–	static inline void execute(powerpc_cpu *cpu) {
238	–	if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) {
239	–	if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) {
240	–	SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON );
241	–	enter_mon();
242	–	}
243	–	if (SPCFLAGS_TEST( SPCFLAG_DOINT )) {
244	–	SPCFLAGS_CLEAR( SPCFLAG_DOINT );
245	–	HandleInterrupt();
246	–	}
247	–	if (SPCFLAGS_TEST( SPCFLAG_INT )) {
248	–	SPCFLAGS_CLEAR( SPCFLAG_INT );
249	–	SPCFLAGS_SET( SPCFLAG_DOINT );
250	–	}
251	–	}
252	–	}
253	–	};
254	–
233		// Execution loop
234	<	void sheepshaver_cpu::execute(uint32 entry)
234	>	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
235		{
236	<	try {
259	<	pc() = entry;
260	<	powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>();
261	<	}
262	<	catch (sheepshaver_exec_return const &) {
263	<	// Nothing, simply return
264	<	}
265	<	catch (...) {
266	<	printf("ERROR: execute() received an unknown exception!\n");
267	<	QuitEmulator();
268	<	}
236	>	powerpc_cpu::execute(entry, enable_cache);
237		}
238
239		// Handle MacOS interrupt
240	<	void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu)
240	>	void sheepshaver_cpu::interrupt(uint32 entry)
241		{
242	<	#if MULTICORE_CPU
243	<	// Initialize stack pointer from previous CPU running
244	<	gpr(1) = cpu->gpr(1);
245	<	#else
242	>	#if EMUL_TIME_STATS
243	>	interrupt_count++;
244	>	const clock_t interrupt_start = clock();
245	>	#endif
246	>
247	>	#if !MULTICORE_CPU
248		// Save program counters and branch registers
249		uint32 saved_pc = pc();
250		uint32 saved_lr = lr();
251		uint32 saved_ctr= ctr();
252	+	uint32 saved_sp = gpr(1);
253		#endif
254
255	<	// Create stack frame
256	<	gpr(1) -= 64;
255	>	// Initialize stack pointer to SheepShaver alternate stack base
256	>	gpr(1) = SheepStack1Base - 64;
257
258		// Build trampoline to return from interrupt
259	<	uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
259	>	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
260
261		// Prepare registers for nanokernel interrupt routine
262	<	kernel_data->v[0x004 >> 2] = gpr(1);
263	<	kernel_data->v[0x018 >> 2] = gpr(6);
262	>	kernel_data->v[0x004 >> 2] = htonl(gpr(1));
263	>	kernel_data->v[0x018 >> 2] = htonl(gpr(6));
264
265	<	gpr(6) = kernel_data->v[0x65c >> 2];
265	>	gpr(6) = ntohl(kernel_data->v[0x65c >> 2]);
266		assert(gpr(6) != 0);
267		WriteMacInt32(gpr(6) + 0x13c, gpr(7));
268		WriteMacInt32(gpr(6) + 0x144, gpr(8));
#	Line 302 | Line 273 | void sheepshaver_cpu::interrupt(uint32 e
273		WriteMacInt32(gpr(6) + 0x16c, gpr(13));
274
275		gpr(1)  = KernelDataAddr;
276	<	gpr(7)  = kernel_data->v[0x660 >> 2];
276	>	gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
277		gpr(8)  = 0;
278		gpr(10) = (uint32)trampoline;
279		gpr(12) = (uint32)trampoline;
280	<	gpr(13) = cr().get();
280	>	gpr(13) = get_cr();
281
282		// rlwimi. r7,r7,8,0,0
283		uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7));
#	Line 314 | Line 285 | void sheepshaver_cpu::interrupt(uint32 e
285		gpr(7) = result;
286
287		gpr(11) = 0xf072; // MSR (SRR1)
288	<	cr().set((gpr(11) & 0x0fff0000) | (cr().get() & ~0x0fff0000));
288	>	cr().set((gpr(11) & 0x0fff0000) | (get_cr() & ~0x0fff0000));
289
290		// Enter nanokernel
291		execute(entry);
292
322	–	// Cleanup stack
323	–	gpr(1) += 64;
324	–
293		#if !MULTICORE_CPU
294		// Restore program counters and branch registers
295		pc() = saved_pc;
296		lr() = saved_lr;
297		ctr()= saved_ctr;
298	+	gpr(1) = saved_sp;
299	+	#endif
300	+
301	+	#if EMUL_TIME_STATS
302	+	interrupt_time += (clock() - interrupt_start);
303		#endif
304		}
305
306		// Execute 68k routine
307		void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r)
308		{
309	+	#if EMUL_TIME_STATS
310	+	exec68k_count++;
311	+	const clock_t exec68k_start = clock();
312	+	#endif
313	+
314		#if SAFE_EXEC_68K
315		if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP)
316		printf("FATAL: Execute68k() not called from EMUL_OP mode\n");
#	Line 342 | Line 320 | void sheepshaver_cpu::execute_68k(uint32
320		uint32 saved_pc = pc();
321		uint32 saved_lr = lr();
322		uint32 saved_ctr= ctr();
323	+	uint32 saved_cr = get_cr();
324
325		// Create MacOS stack frame
326	+	// FIXME: make sure MacOS doesn't expect PPC registers to live on top
327		uint32 sp = gpr(1);
328	<	gpr(1) -= 56 + 19*4 + 18*8;
328	>	gpr(1) -= 56;
329		WriteMacInt32(gpr(1), sp);
330
331		// Save PowerPC registers
332	<	memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13));
332	>	uint32 saved_GPRs[19];
333	>	memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13));
334		#if SAVE_FP_EXEC_68K
335	<	memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14));
335	>	double saved_FPRs[18];
336	>	memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14));
337		#endif
338
339		// Setup registers for 68k emulator
#	Line 365 | Line 347 | void sheepshaver_cpu::execute_68k(uint32
347		gpr(25) = ReadMacInt32(XLM_68K_R25);            // MSB of SR
348		gpr(26) = 0;
349		gpr(28) = 0;                                                            // VBR
350	<	gpr(29) = kernel_data->ed.v[0x74 >> 2];         // Pointer to opcode table
351	<	gpr(30) = kernel_data->ed.v[0x78 >> 2];         // Address of emulator
350	>	gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]);          // Pointer to opcode table
351	>	gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]);          // Address of emulator
352		gpr(31) = KernelDataAddr + 0x1000;
353
354		// Push return address (points to EXEC_RETURN opcode) on stack
#	Line 398 | Line 380 | void sheepshaver_cpu::execute_68k(uint32
380		r->a[i] = gpr(16 + i);
381
382		// Restore PowerPC registers
383	<	memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13));
383	>	memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13));
384		#if SAVE_FP_EXEC_68K
385	<	memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14));
385	>	memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14));
386		#endif
387
388		// Cleanup stack
389	<	gpr(1) += 56 + 19*4 + 18*8;
389	>	gpr(1) += 56;
390
391		// Restore program counters and branch registers
392		pc() = saved_pc;
393		lr() = saved_lr;
394		ctr()= saved_ctr;
395	+	set_cr(saved_cr);
396	+
397	+	#if EMUL_TIME_STATS
398	+	exec68k_time += (clock() - exec68k_start);
399	+	#endif
400		}
401
402		// Call MacOS PPC code
403		uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args)
404		{
405	+	#if EMUL_TIME_STATS
406	+	macos_exec_count++;
407	+	const clock_t macos_exec_start = clock();
408	+	#endif
409	+
410		// Save program counters and branch registers
411		uint32 saved_pc = pc();
412		uint32 saved_lr = lr();
413		uint32 saved_ctr= ctr();
414
415		// Build trampoline with EXEC_RETURN
416	<	uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
416	>	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
417		lr() = (uint32)trampoline;
418
419		gpr(1) -= 64;                                                           // Create stack frame
#	Line 453 | Line 445 | uint32 sheepshaver_cpu::execute_macos_co
445		lr() = saved_lr;
446		ctr()= saved_ctr;
447
448	+	#if EMUL_TIME_STATS
449	+	macos_exec_time += (clock() - macos_exec_start);
450	+	#endif
451	+
452		return retval;
453		}
454
#	Line 461 | Line 457 | inline void sheepshaver_cpu::execute_ppc
457		{
458		// Save branch registers
459		uint32 saved_lr = lr();
464	–	uint32 saved_ctr= ctr();
465	–
466	–	const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
460
461	+	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
462		lr() = (uint32)trampoline;
463	<	ctr()= entry;
463	>
464		execute(entry);
465
466		// Restore branch registers
467		lr() = saved_lr;
474	–	ctr()= saved_ctr;
468		}
469
470		// Resource Manager thunk
471	<	extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h);
471	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
472
473		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
474		{
#	Line 487 | Line 480 | inline void sheepshaver_cpu::get_resourc
480
481		// Call old routine
482		execute_ppc(old_get_resource);
490	–	uint16 **handle = (uint16 **)gpr(3);
483
484		// Call CheckLoad()
485	+	uint32 handle = gpr(3);
486		check_load_invoc(type, id, handle);
487	<	gpr(3) = (uint32)handle;
487	>	gpr(3) = handle;
488
489		// Cleanup stack
490		gpr(1) += 56;
#	Line 506 | Line 499 | static sheepshaver_cpu *main_cpu = NULL;
499		static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
500		static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
501
502	+	void FlushCodeCache(uintptr start, uintptr end)
503	+	{
504	+	D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
505	+	main_cpu->invalidate_cache_range(start, end);
506	+	#if MULTICORE_CPU
507	+	interrupt_cpu->invalidate_cache_range(start, end);
508	+	#endif
509	+	}
510	+
511		static inline void cpu_push(sheepshaver_cpu *new_cpu)
512		{
513		#if MULTICORE_CPU
#	Line 536 | Line 538 | static void dump_log(void)
538		*  Initialize CPU emulation
539		*/
540
541	<	static struct sigaction sigsegv_action;
540	<
541	<	#if defined(__powerpc__)
542	<	#include <sys/ucontext.h>
543	<	#endif
544	<
545	<	static void sigsegv_handler(int sig, siginfo_t *sip, void *scp)
541	>	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
542		{
547	–	const uintptr addr = (uintptr)sip->si_addr;
543		#if ENABLE_VOSF
544	<	// Handle screen fault.
545	<	extern bool Screen_fault_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction);
546	<	if (Screen_fault_handler((sigsegv_address_t)addr, SIGSEGV_INVALID_PC))
547	<	return;
553	<	#endif
554	<	#if defined(__powerpc__)
555	<	if (addr >= ROM_BASE && addr < ROM_BASE + ROM_SIZE) {
556	<	printf("IGNORE write access to ROM at %08x\n", addr);
557	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
558	<	return;
559	<	}
560	<	if (addr >= 0xf3012000 && addr < 0xf3014000 && 0) {
561	<	printf("IGNORE write access to ROM at %08x\n", addr);
562	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
563	<	return;
564	<	}
544	>	// Handle screen fault
545	>	extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
546	>	if (Screen_fault_handler(fault_address, fault_instruction))
547	>	return SIGSEGV_RETURN_SUCCESS;
548		#endif
549	<	printf("Caught SIGSEGV at address %p\n", sip->si_addr);
550	<	printf("Native PC: %08x\n", (((ucontext_t *)scp)->uc_mcontext.regs)->nip);
551	<	printf("Current CPU: %s\n", current_cpu == main_cpu ? "main" : "interrupts");
552	<	#if 1
553	<	dump_registers();
549	>
550	>	const uintptr addr = (uintptr)fault_address;
551	>	#if HAVE_SIGSEGV_SKIP_INSTRUCTION
552	>	// Ignore writes to ROM
553	>	if ((addr - ROM_BASE) < ROM_SIZE)
554	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
555	>
556	>	// Ignore all other faults, if requested
557	>	if (PrefsFindBool("ignoresegv"))
558	>	return SIGSEGV_RETURN_FAILURE;
559		#else
560	<	printf("Main CPU context\n");
573	<	main_cpu->dump_registers();
574	<	printf("Interrupts CPU context\n");
575	<	interrupt_cpu->dump_registers();
560	>	#error "FIXME: You don't have the capability to skip instruction within signal handlers"
561		#endif
562	+
563	+	printf("SIGSEGV\n");
564	+	printf("  pc %p\n", fault_instruction);
565	+	printf("  ea %p\n", fault_address);
566	+	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
567	+	dump_registers();
568		current_cpu->dump_log();
569		enter_mon();
570		QuitEmulator();
571	+
572	+	return SIGSEGV_RETURN_FAILURE;
573		}
574
575		void init_emul_ppc(void)
#	Line 591 | Line 584 | void init_emul_ppc(void)
584		interrupt_cpu = new sheepshaver_cpu();
585		#endif
586
587	<	// Install SIGSEGV handler
588	<	sigemptyset(&sigsegv_action.sa_mask);
596	<	sigsegv_action.sa_sigaction = sigsegv_handler;
597	<	sigsegv_action.sa_flags = SA_SIGINFO;
598	<	sigsegv_action.sa_restorer = NULL;
599	<	sigaction(SIGSEGV, &sigsegv_action, NULL);
587	>	// Install the handler for SIGSEGV
588	>	sigsegv_install_handler(sigsegv_handler);
589
590		#if ENABLE_MON
591		// Install "regs" command in cxmon
592		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
593		mon_add_command("log", dump_log, "log                      Dump PowerPC emulation log\n");
594		#endif
595	+
596	+	#if EMUL_TIME_STATS
597	+	emul_start_time = clock();
598	+	#endif
599	+	}
600	+
601	+	/*
602	+	*  Deinitialize emulation
603	+	*/
604	+
605	+	void exit_emul_ppc(void)
606	+	{
607	+	#if EMUL_TIME_STATS
608	+	clock_t emul_end_time = clock();
609	+
610	+	printf("### Statistics for SheepShaver emulation parts\n");
611	+	const clock_t emul_time = emul_end_time - emul_start_time;
612	+	printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
613	+	printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
614	+	(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
615	+
616	+	#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
617	+	printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
618	+	printf("Total " LABEL " time  : %.1f sec (%.1f%%)\n",                   \
619	+	double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC),          \
620	+	100.0 * double(VAR_PREFIX##_time) / double(emul_time));      \
621	+	} while (0)
622	+
623	+	PRINT_STATS("Execute68k[Trap] execution", exec68k);
624	+	PRINT_STATS("NativeOp execution", native_exec);
625	+	PRINT_STATS("MacOS routine execution", macos_exec);
626	+
627	+	#undef PRINT_STATS
628	+	printf("\n");
629	+	#endif
630	+
631	+	delete main_cpu;
632	+	#if MULTICORE_CPU
633	+	delete interrupt_cpu;
634	+	#endif
635		}
636
637		/*
#	Line 612 | Line 641 | void init_emul_ppc(void)
641		void emul_ppc(uint32 entry)
642		{
643		current_cpu = main_cpu;
644	+	#if DEBUG
645		current_cpu->start_log();
646	<	current_cpu->execute(entry);
646	>	#endif
647	>	// start emulation loop and enable code translation or caching
648	>	current_cpu->execute(entry, true);
649		}
650
651		/*
652		*  Handle PowerPC interrupt
653		*/
654
655	<	// Atomic operations
656	<	extern int atomic_add(int *var, int v);
657	<	extern int atomic_and(int *var, int v);
658	<	extern int atomic_or(int *var, int v);
659	<
655	>	#if ASYNC_IRQ
656	>	void HandleInterrupt(void)
657	>	{
658	>	main_cpu->handle_interrupt();
659	>	}
660	>	#else
661		void TriggerInterrupt(void)
662		{
663		#if 0
664		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
665		#else
666	<	SPCFLAGS_SET( SPCFLAG_INT );
666	>	// Trigger interrupt to main cpu only
667	>	if (main_cpu)
668	>	main_cpu->trigger_interrupt();
669		#endif
670		}
671	+	#endif
672
673	<	static void HandleInterrupt(void)
673	>	void sheepshaver_cpu::handle_interrupt(void)
674		{
675		// Do nothing if interrupts are disabled
676		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
#	Line 653 | Line 689 | static void HandleInterrupt(void)
689		// 68k emulator active, trigger 68k interrupt level 1
690		assert(current_cpu == main_cpu);
691		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
692	<	main_cpu->set_cr(main_cpu->get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
692	>	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
693		break;
694
695		#if INTERRUPTS_IN_NATIVE_MODE
696		case MODE_NATIVE:
697		// 68k emulator inactive, in nanokernel?
698		assert(current_cpu == main_cpu);
699	<	if (main_cpu->gpr(1) != KernelDataAddr) {
699	>	if (gpr(1) != KernelDataAddr) {
700		// Prepare for 68k interrupt level 1
701		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
702		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 671 | Line 707 | static void HandleInterrupt(void)
707		DisableInterrupt();
708		cpu_push(interrupt_cpu);
709		if (ROMType == ROMTYPE_NEWWORLD)
710	<	current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu);
710	>	current_cpu->interrupt(ROM_BASE + 0x312b1c);
711		else
712	<	current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu);
712	>	current_cpu->interrupt(ROM_BASE + 0x312a3c);
713		cpu_pop();
714		}
715		break;
#	Line 748 | Line 784 | const uint32 NativeOpTable[NATIVE_OP_MAX
784		POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
785		POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
786		POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
787	+	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
788		};
789
790		static void get_resource(void);
#	Line 760 | Line 797 | static void r_get_resource(void);
797
798		static void NativeOp(int selector)
799		{
800	+	#if EMUL_TIME_STATS
801	+	native_exec_count++;
802	+	const clock_t native_exec_start = clock();
803	+	#endif
804	+
805		switch (selector) {
806		case NATIVE_PATCH_NAME_REGISTRY:
807		DoPatchNameRegistry();
#	Line 815 | Line 857 | static void NativeOp(int selector)
857		case NATIVE_ENABLE_INTERRUPT:
858		EnableInterrupt();
859		break;
860	+	case NATIVE_MAKE_EXECUTABLE:
861	+	MakeExecutable(0, (void *)GPR(4), GPR(5));
862	+	break;
863		default:
864		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
865		QuitEmulator();
866		break;
867		}
868	+
869	+	#if EMUL_TIME_STATS
870	+	native_exec_time += (clock() - native_exec_start);
871	+	#endif
872		}
873
874		/*
#	Line 854 | Line 903 | void Execute68k(uint32 pc, M68kRegisters
903
904		void Execute68kTrap(uint16 trap, M68kRegisters *r)
905		{
906	<	uint16 proc[2] = {trap, M68K_RTS};
906	>	uint16 proc[2];
907	>	proc[0] = htons(trap);
908	>	proc[1] = htons(M68K_RTS);
909		Execute68k((uint32)proc, r);
910		}
911
#	Line 910 | Line 961 | uint32 call_macos7(uint32 tvect, uint32
961		}
962
963		/*
913	–	*  Atomic operations
914	–	*/
915	–
916	–	int atomic_add(int *var, int v)
917	–	{
918	–	int ret = *var;
919	–	*var += v;
920	–	return ret;
921	–	}
922	–
923	–	int atomic_and(int *var, int v)
924	–	{
925	–	int ret = *var;
926	–	*var &= v;
927	–	return ret;
928	–	}
929	–
930	–	int atomic_or(int *var, int v)
931	–	{
932	–	int ret = *var;
933	–	*var |= v;
934	–	return ret;
935	–	}
936	–
937	–	/*
964		*  Resource Manager thunks
965		*/
966

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