[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs.
Revision 1.59 by gbeauche, 2005-03-05T18:33:30Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 31 \| Line 31
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33		#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 49 \| Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 72 \| Line 84 \| static void enter_mon(void)
84		#endif
85		}
86
87	<	// Enable multicore (main/interrupts) cpu emulation?
88	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87	>	// From main_*.cpp
88	>	extern uintptr SignalStackBase();
89	>
90	>	// From rsrc_patches.cpp
91	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	>
93	>	// PowerPC EmulOp to exit from emulation looop
94	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
95
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
#	Line 88 \| Line 106 \| static void enter_mon(void)
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
108		// Pointer to Kernel Data
109	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109	>	static KernelData * kernel_data;
110
111		// SIGSEGV handler
112	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>
114	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115	>	// Special trampolines for EmulOp and NativeOp
116	>	static uint8 *emul_op_trampoline;
117	>	static uint8 *native_op_trampoline;
118	>	#endif
119	>
120	>	// JIT Compiler enabled?
121	>	static inline bool enable_jit_p()
122	>	{
123	>	return PrefsFindBool("jit");
124	>	}
125
126
127		/**
#	Line 114 \| Line 144 \| public:
144		// Constructor
145		sheepshaver_cpu();
146
147	<	// Condition Register accessors
147	>	// CR & XER accessors
148		uint32 get_cr() const { return cr().get(); }
149		void set_cr(uint32 v) { cr().set(v); }
150	+	uint32 get_xer() const { return xer().get(); }
151	+	void set_xer(uint32 v) { xer().set(v); }
152	+
153	+	// Execute NATIVE_OP routine
154	+	void execute_native_op(uint32 native_op);
155
156	<	// Execution loop
157	<	void execute(uint32 entry, bool enable_cache = false);
156	>	// Execute EMUL_OP routine
157	>	void execute_emul_op(uint32 emul_op);
158
159		// Execute 68k routine
160		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 130 \| Line 165 \| public:
165		// Execute MacOS/PPC code
166		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167
168	+	#if PPC_ENABLE_JIT
169	+	// Compile one instruction
170	+	virtual int compile1(codegen_context_t & cg_context);
171	+	#endif
172		// Resource manager thunk
173		void get_resource(uint32 old_get_resource);
174
175		// Handle MacOS interrupt
176		void interrupt(uint32 entry);
138	–	void handle_interrupt();
139	–
140	–	// Lazy memory allocator (one item at a time)
141	–	void *operator new(size_t size)
142	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
143	–	void operator delete(void *p)
144	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
145	–	// FIXME: really make surre array allocation fail at link time?
146	–	void *operator new[](size_t);
147	–	void operator delete[](void *p);
177
178		// Make sure the SIGSEGV handler can access CPU registers
179		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180	+
181	+	// Memory allocator returning areas aligned on 16-byte boundaries
182	+	void *operator new(size_t size);
183	+	void operator delete(void *p);
184		};
185
186	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
186	>	// Memory allocator returning areas aligned on 16-byte boundaries
187	>	void *sheepshaver_cpu::operator new(size_t size)
188	>	{
189	>	void *p;
190	>
191	>	#if defined(HAVE_POSIX_MEMALIGN)
192	>	if (posix_memalign(&p, 16, size) != 0)
193	>	throw std::bad_alloc();
194	>	#elif defined(HAVE_MEMALIGN)
195	>	p = memalign(16, size);
196	>	#elif defined(HAVE_VALLOC)
197	>	p = valloc(size); // page-aligned!
198	>	#else
199	>	/* XXX: handle padding ourselves */
200	>	p = malloc(size);
201	>	#endif
202	>
203	>	return p;
204	>	}
205	>
206	>	void sheepshaver_cpu::operator delete(void *p)
207	>	{
208	>	#if defined(HAVE_MEMALIGN) \|\| defined(HAVE_VALLOC)
209	>	#if defined(__GLIBC__)
210	>	// this is known to work only with GNU libc
211	>	free(p);
212	>	#endif
213	>	#else
214	>	free(p);
215	>	#endif
216	>	}
217
218		sheepshaver_cpu::sheepshaver_cpu()
219	<	: powerpc_cpu()
219	>	: powerpc_cpu(enable_jit_p())
220		{
221		init_decoder();
222		}
223
224		void sheepshaver_cpu::init_decoder()
225		{
163	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
164	–	static bool initialized = false;
165	–	if (initialized)
166	–	return;
167	–	initialized = true;
168	–	#endif
169	–
226		static const instr_info_t sheep_ii_table[] = {
227		{ "sheep",
228		(execute_pmf)&sheepshaver_cpu::execute_sheep,
#	Line 185 \| Line 241 \| void sheepshaver_cpu::init_decoder()
241		}
242		}
243
188	–	// Forward declaration for native opcode handler
189	–	static void NativeOp(int selector);
190	–
244		/* NativeOp instruction format:
245	<	+------------+--------------------------+--+----------+------------+
246	<	\| 6 \| \|FN\| OP \| 2 \|
247	<	+------------+--------------------------+--+----------+------------+
248	<	0 5 \|6 19 20 21 25 26 31
245	>	+------------+-------------------------+--+-----------+------------+
246	>	\| 6 \| \|FN\| OP \| 2 \|
247	>	+------------+-------------------------+--+-----------+------------+
248	>	0 5 \|6 18 19 20 25 26 31
249		*/
250
251	<	typedef bit_field< 20, 20 > FN_field;
252	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
251	>	typedef bit_field< 19, 19 > FN_field;
252	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
253		typedef bit_field< 26, 31 > EMUL_OP_field;
254
255	+	// Execute EMUL_OP routine
256	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
257	+	{
258	+	M68kRegisters r68;
259	+	WriteMacInt32(XLM_68K_R25, gpr(25));
260	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
261	+	for (int i = 0; i < 8; i++)
262	+	r68.d[i] = gpr(8 + i);
263	+	for (int i = 0; i < 7; i++)
264	+	r68.a[i] = gpr(16 + i);
265	+	r68.a[7] = gpr(1);
266	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
267	+	uint32 saved_xer = get_xer();
268	+	EmulOp(&r68, gpr(24), emul_op);
269	+	set_cr(saved_cr);
270	+	set_xer(saved_xer);
271	+	for (int i = 0; i < 8; i++)
272	+	gpr(8 + i) = r68.d[i];
273	+	for (int i = 0; i < 7; i++)
274	+	gpr(16 + i) = r68.a[i];
275	+	gpr(1) = r68.a[7];
276	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
277	+	}
278	+
279		// Execute SheepShaver instruction
280		void sheepshaver_cpu::execute_sheep(uint32 opcode)
281		{
#	Line 215 \| Line 292 \| void sheepshaver_cpu::execute_sheep(uint
292		break;
293
294		case 2: // EXEC_NATIVE
295	<	NativeOp(NATIVE_OP_field::extract(opcode));
295	>	execute_native_op(NATIVE_OP_field::extract(opcode));
296		if (FN_field::test(opcode))
297		pc() = lr();
298		else
299		pc() += 4;
300		break;
301
302	<	default: { // EMUL_OP
303	<	M68kRegisters r68;
227	<	WriteMacInt32(XLM_68K_R25, gpr(25));
228	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
229	<	for (int i = 0; i < 8; i++)
230	<	r68.d[i] = gpr(8 + i);
231	<	for (int i = 0; i < 7; i++)
232	<	r68.a[i] = gpr(16 + i);
233	<	r68.a[7] = gpr(1);
234	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
235	<	for (int i = 0; i < 8; i++)
236	<	gpr(8 + i) = r68.d[i];
237	<	for (int i = 0; i < 7; i++)
238	<	gpr(16 + i) = r68.a[i];
239	<	gpr(1) = r68.a[7];
240	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
302	>	default: // EMUL_OP
303	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
304		pc() += 4;
305		break;
306		}
244	–	}
307		}
308
309	<	// Execution loop
310	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
311	<	{
312	<	powerpc_cpu::execute(entry, enable_cache);
309	>	// Compile one instruction
310	>	#if PPC_ENABLE_JIT
311	>	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
312	>	{
313	>	const instr_info_t *ii = cg_context.instr_info;
314	>	if (ii->mnemo != PPC_I(SHEEP))
315	>	return COMPILE_FAILURE;
316	>
317	>	int status = COMPILE_FAILURE;
318	>	powerpc_dyngen & dg = cg_context.codegen;
319	>	uint32 opcode = cg_context.opcode;
320	>
321	>	switch (opcode & 0x3f) {
322	>	case 0: // EMUL_RETURN
323	>	dg.gen_invoke(QuitEmulator);
324	>	status = COMPILE_CODE_OK;
325	>	break;
326	>
327	>	case 1: // EXEC_RETURN
328	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
329	>	// Don't check for pending interrupts, we do know we have to
330	>	// get out of this block ASAP
331	>	dg.gen_exec_return();
332	>	status = COMPILE_EPILOGUE_OK;
333	>	break;
334	>
335	>	case 2: { // EXEC_NATIVE
336	>	uint32 selector = NATIVE_OP_field::extract(opcode);
337	>	switch (selector) {
338	>	#if !PPC_REENTRANT_JIT
339	>	// Filter out functions that may invoke Execute68k() or
340	>	// CallMacOS(), this would break reentrancy as they could
341	>	// invalidate the translation cache and even overwrite
342	>	// continuation code when we are done with them.
343	>	case NATIVE_PATCH_NAME_REGISTRY:
344	>	dg.gen_invoke(DoPatchNameRegistry);
345	>	status = COMPILE_CODE_OK;
346	>	break;
347	>	case NATIVE_VIDEO_INSTALL_ACCEL:
348	>	dg.gen_invoke(VideoInstallAccel);
349	>	status = COMPILE_CODE_OK;
350	>	break;
351	>	case NATIVE_VIDEO_VBL:
352	>	dg.gen_invoke(VideoVBL);
353	>	status = COMPILE_CODE_OK;
354	>	break;
355	>	case NATIVE_GET_RESOURCE:
356	>	case NATIVE_GET_1_RESOURCE:
357	>	case NATIVE_GET_IND_RESOURCE:
358	>	case NATIVE_GET_1_IND_RESOURCE:
359	>	case NATIVE_R_GET_RESOURCE: {
360	>	static const uint32 get_resource_ptr[] = {
361	>	XLM_GET_RESOURCE,
362	>	XLM_GET_1_RESOURCE,
363	>	XLM_GET_IND_RESOURCE,
364	>	XLM_GET_1_IND_RESOURCE,
365	>	XLM_R_GET_RESOURCE
366	>	};
367	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
368	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
369	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
370	>	dg.gen_invoke_CPU_im(func, old_get_resource);
371	>	status = COMPILE_CODE_OK;
372	>	break;
373	>	}
374	>	case NATIVE_CHECK_LOAD_INVOC:
375	>	dg.gen_load_T0_GPR(3);
376	>	dg.gen_load_T1_GPR(4);
377	>	dg.gen_se_16_32_T1();
378	>	dg.gen_load_T2_GPR(5);
379	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
380	>	status = COMPILE_CODE_OK;
381	>	break;
382	>	#endif
383	>	case NATIVE_BITBLT:
384	>	dg.gen_load_T0_GPR(3);
385	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
386	>	status = COMPILE_CODE_OK;
387	>	break;
388	>	case NATIVE_INVRECT:
389	>	dg.gen_load_T0_GPR(3);
390	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
391	>	status = COMPILE_CODE_OK;
392	>	break;
393	>	case NATIVE_FILLRECT:
394	>	dg.gen_load_T0_GPR(3);
395	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
396	>	status = COMPILE_CODE_OK;
397	>	break;
398	>	}
399	>	// Could we fully translate this NativeOp?
400	>	if (status == COMPILE_CODE_OK) {
401	>	if (!FN_field::test(opcode))
402	>	cg_context.done_compile = false;
403	>	else {
404	>	dg.gen_load_A0_LR();
405	>	dg.gen_set_PC_A0();
406	>	cg_context.done_compile = true;
407	>	}
408	>	break;
409	>	}
410	>	#if PPC_REENTRANT_JIT
411	>	// Try to execute NativeOp trampoline
412	>	if (!FN_field::test(opcode))
413	>	dg.gen_set_PC_im(cg_context.pc + 4);
414	>	else {
415	>	dg.gen_load_A0_LR();
416	>	dg.gen_set_PC_A0();
417	>	}
418	>	dg.gen_mov_32_T0_im(selector);
419	>	dg.gen_jmp(native_op_trampoline);
420	>	cg_context.done_compile = true;
421	>	status = COMPILE_EPILOGUE_OK;
422	>	break;
423	>	#endif
424	>	// Invoke NativeOp handler
425	>	if (!FN_field::test(opcode)) {
426	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
427	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
428	>	dg.gen_invoke_CPU_im(func, selector);
429	>	cg_context.done_compile = false;
430	>	status = COMPILE_CODE_OK;
431	>	}
432	>	// Otherwise, let it generate a call to execute_sheep() which
433	>	// will cause necessary updates to the program counter
434	>	break;
435	>	}
436	>
437	>	default: { // EMUL_OP
438	>	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
439	>	#if PPC_REENTRANT_JIT
440	>	// Try to execute EmulOp trampoline
441	>	dg.gen_set_PC_im(cg_context.pc + 4);
442	>	dg.gen_mov_32_T0_im(emul_op);
443	>	dg.gen_jmp(emul_op_trampoline);
444	>	cg_context.done_compile = true;
445	>	status = COMPILE_EPILOGUE_OK;
446	>	break;
447	>	#endif
448	>	// Invoke EmulOp handler
449	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
450	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
451	>	dg.gen_invoke_CPU_im(func, emul_op);
452	>	cg_context.done_compile = false;
453	>	status = COMPILE_CODE_OK;
454	>	break;
455	>	}
456	>	}
457	>	return status;
458		}
459	+	#endif
460
461		// Handle MacOS interrupt
462		void sheepshaver_cpu::interrupt(uint32 entry)
463		{
464		#if EMUL_TIME_STATS
465	<	interrupt_count++;
465	>	ppc_interrupt_count++;
466		const clock_t interrupt_start = clock();
467		#endif
468
261	–	#if !MULTICORE_CPU
469		// Save program counters and branch registers
470		uint32 saved_pc = pc();
471		uint32 saved_lr = lr();
472		uint32 saved_ctr= ctr();
473		uint32 saved_sp = gpr(1);
267	–	#endif
474
475		// Initialize stack pointer to SheepShaver alternate stack base
476	<	gpr(1) = SheepStack1Base - 64;
476	>	gpr(1) = SignalStackBase() - 64;
477
478		// Build trampoline to return from interrupt
479	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
479	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
480
481		// Prepare registers for nanokernel interrupt routine
482		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 289 \| Line 495 \| void sheepshaver_cpu::interrupt(uint32 e
495		gpr(1) = KernelDataAddr;
496		gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
497		gpr(8) = 0;
498	<	gpr(10) = (uint32)trampoline;
499	<	gpr(12) = (uint32)trampoline;
498	>	gpr(10) = trampoline.addr();
499	>	gpr(12) = trampoline.addr();
500		gpr(13) = get_cr();
501
502		// rlwimi. r7,r7,8,0,0
#	Line 304 \| Line 510 \| void sheepshaver_cpu::interrupt(uint32 e
510		// Enter nanokernel
511		execute(entry);
512
307	–	#if !MULTICORE_CPU
513		// Restore program counters and branch registers
514		pc() = saved_pc;
515		lr() = saved_lr;
516		ctr()= saved_ctr;
517		gpr(1) = saved_sp;
313	–	#endif
518
519		#if EMUL_TIME_STATS
520		interrupt_time += (clock() - interrupt_start);
#	Line 427 \| Line 631 \| uint32 sheepshaver_cpu::execute_macos_co
631		uint32 saved_ctr= ctr();
632
633		// Build trampoline with EXEC_RETURN
634	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
635	<	lr() = (uint32)trampoline;
634	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
635	>	lr() = trampoline.addr();
636
637		gpr(1) -= 64; // Create stack frame
638		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 472 \| Line 676 \| inline void sheepshaver_cpu::execute_ppc
676		// Save branch registers
677		uint32 saved_lr = lr();
678
679	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
680	<	lr() = (uint32)trampoline;
679	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
680	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
681	>	lr() = trampoline.addr();
682
683		execute(entry);
684
#	Line 482 \| Line 687 \| inline void sheepshaver_cpu::execute_ppc
687		}
688
689		// Resource Manager thunk
485	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
486	–
690		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
691		{
692		uint32 type = gpr(3);
#	Line 509 \| Line 712 \| inline void sheepshaver_cpu::get_resourc
712		* SheepShaver CPU engine interface
713		**/
714
715	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
716	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
514	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
715	>	// PowerPC CPU emulator
716	>	static sheepshaver_cpu *ppc_cpu = NULL;
717
718		void FlushCodeCache(uintptr start, uintptr end)
719		{
720		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
721	<	main_cpu->invalidate_cache_range(start, end);
520	<	#if MULTICORE_CPU
521	<	interrupt_cpu->invalidate_cache_range(start, end);
522	<	#endif
523	<	}
524	<
525	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
526	<	{
527	<	#if MULTICORE_CPU
528	<	current_cpu = new_cpu;
529	<	#endif
530	<	}
531	<
532	<	static inline void cpu_pop()
533	<	{
534	<	#if MULTICORE_CPU
535	<	current_cpu = main_cpu;
536	<	#endif
721	>	ppc_cpu->invalidate_cache_range(start, end);
722		}
723
724		// Dump PPC registers
725		static void dump_registers(void)
726		{
727	<	current_cpu->dump_registers();
727	>	ppc_cpu->dump_registers();
728		}
729
730		// Dump log
731		static void dump_log(void)
732		{
733	<	current_cpu->dump_log();
733	>	ppc_cpu->dump_log();
734		}
735
736		/*
737		* Initialize CPU emulation
738		*/
739
740	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
740	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
741		{
742		#if ENABLE_VOSF
743		// Handle screen fault
#	Line 564 \| Line 749 \| static sigsegv_return_t sigsegv_handler(
749		const uintptr addr = (uintptr)fault_address;
750		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
751		// Ignore writes to ROM
752	<	if ((addr - ROM_BASE) < ROM_SIZE)
752	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
753		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
754
755		// Get program counter of target CPU
756	<	sheepshaver_cpu * const cpu = current_cpu;
756	>	sheepshaver_cpu * const cpu = ppc_cpu;
757		const uint32 pc = cpu->pc();
758
759		// Fault in Mac ROM or RAM?
760	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
760	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
761		if (mac_fault) {
762
763		// "VM settings" during MacOS 8 installation
#	Line 592 \| Line 777 \| static sigsegv_return_t sigsegv_handler(
777		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
778		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
779		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
780	+
781	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
782	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
783	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
784	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
785	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
786	+
787	+	// Ignore writes to the zero page
788	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
789	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
790
791		// Ignore all other faults, if requested
792		if (PrefsFindBool("ignoresegv"))
#	Line 604 \| Line 799 \| static sigsegv_return_t sigsegv_handler(
799		printf("SIGSEGV\n");
800		printf(" pc %p\n", fault_instruction);
801		printf(" ea %p\n", fault_address);
607	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
802		dump_registers();
803	<	current_cpu->dump_log();
803	>	ppc_cpu->dump_log();
804		enter_mon();
805		QuitEmulator();
806
#	Line 615 \| Line 809 \| static sigsegv_return_t sigsegv_handler(
809
810		void init_emul_ppc(void)
811		{
812	+	// Get pointer to KernelData in host address space
813	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
814	+
815		// Initialize main CPU emulator
816	<	main_cpu = new sheepshaver_cpu();
817	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
816	>	ppc_cpu = new sheepshaver_cpu();
817	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
818	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
819		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
820
623	–	#if MULTICORE_CPU
624	–	// Initialize alternate CPU emulator to handle interrupts
625	–	interrupt_cpu = new sheepshaver_cpu();
626	–	#endif
627	–
628	–	// Install the handler for SIGSEGV
629	–	sigsegv_install_handler(sigsegv_handler);
630	–
821		#if ENABLE_MON
822		// Install "regs" command in cxmon
823		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 653 \| Line 843 \| void exit_emul_ppc(void)
843		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
844		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
845		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
846	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
847	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
848
849		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
850		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 669 \| Line 861 \| void exit_emul_ppc(void)
861		printf("\n");
862		#endif
863
864	<	delete main_cpu;
865	<	#if MULTICORE_CPU
866	<	delete interrupt_cpu;
867	<	#endif
864	>	delete ppc_cpu;
865	>	}
866	>
867	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
868	>	// Initialize EmulOp trampolines
869	>	void init_emul_op_trampolines(basic_dyngen & dg)
870	>	{
871	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
872	>	func_t func;
873	>
874	>	// EmulOp
875	>	emul_op_trampoline = dg.gen_start();
876	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
877	>	dg.gen_invoke_CPU_T0(func);
878	>	dg.gen_exec_return();
879	>	dg.gen_end();
880	>
881	>	// NativeOp
882	>	native_op_trampoline = dg.gen_start();
883	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
884	>	dg.gen_invoke_CPU_T0(func);
885	>	dg.gen_exec_return();
886	>	dg.gen_end();
887	>
888	>	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
889	>	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
890		}
891	+	#endif
892
893		/*
894		* Emulation loop
#	Line 681 \| Line 896 \| void exit_emul_ppc(void)
896
897		void emul_ppc(uint32 entry)
898		{
899	<	current_cpu = main_cpu;
900	<	#if DEBUG
686	<	current_cpu->start_log();
899	>	#if 0
900	>	ppc_cpu->start_log();
901		#endif
902		// start emulation loop and enable code translation or caching
903	<	current_cpu->execute(entry, true);
903	>	ppc_cpu->execute(entry);
904		}
905
906		/*
907		* Handle PowerPC interrupt
908		*/
909
696	–	#if ASYNC_IRQ
697	–	void HandleInterrupt(void)
698	–	{
699	–	main_cpu->handle_interrupt();
700	–	}
701	–	#else
910		void TriggerInterrupt(void)
911		{
912		#if 0
913		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
914		#else
915		// Trigger interrupt to main cpu only
916	<	if (main_cpu)
917	<	main_cpu->trigger_interrupt();
916	>	if (ppc_cpu)
917	>	ppc_cpu->trigger_interrupt();
918		#endif
919		}
712	–	#endif
920
921	<	void sheepshaver_cpu::handle_interrupt(void)
921	>	void HandleInterrupt(powerpc_registers *r)
922		{
923	+	#ifdef USE_SDL_VIDEO
924	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
925	+	SDL_PumpEvents();
926	+	#endif
927	+
928		// Do nothing if interrupts are disabled
929	<	if ((int32 )XLM_IRQ_NEST > 0)
929	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
930		return;
931
932	<	// Do nothing if there is no interrupt pending
932	>	// Do nothing if there is no pending interrupt
933		if (InterruptFlags == 0)
934		return;
935
936	<	// Disable MacOS stack sniffer
937	<	WriteMacInt32(0x110, 0);
936	>	// Current interrupt nest level
937	>	static int interrupt_depth = 0;
938	>	++interrupt_depth;
939	>	#if EMUL_TIME_STATS
940	>	interrupt_count++;
941	>	#endif
942
943		// Interrupt action depends on current run mode
944		switch (ReadMacInt32(XLM_RUN_MODE)) {
945		case MODE_68K:
946		// 68k emulator active, trigger 68k interrupt level 1
731	–	assert(current_cpu == main_cpu);
947		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
948	<	set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
948	>	r->cr.set(r->cr.get() \| tswap32(kernel_data->v[0x674 >> 2]));
949		break;
950
951		#if INTERRUPTS_IN_NATIVE_MODE
952		case MODE_NATIVE:
953		// 68k emulator inactive, in nanokernel?
954	<	assert(current_cpu == main_cpu);
955	<	if (gpr(1) != KernelDataAddr) {
954	>	if (r->gpr[1] != KernelDataAddr && interrupt_depth == 1) {
955	>
956		// Prepare for 68k interrupt level 1
957		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
958		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 746 \| Line 961 \| void sheepshaver_cpu::handle_interrupt(v
961
962		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
963		DisableInterrupt();
749	–	cpu_push(interrupt_cpu);
964		if (ROMType == ROMTYPE_NEWWORLD)
965	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
965	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
966		else
967	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
754	<	cpu_pop();
967	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
968		}
969		break;
970		#endif
#	Line 760 \| Line 973 \| void sheepshaver_cpu::handle_interrupt(v
973		case MODE_EMUL_OP:
974		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
975		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
976	+	#if EMUL_TIME_STATS
977	+	const clock_t interrupt_start = clock();
978	+	#endif
979		#if 1
980		// Execute full 68k interrupt routine
981		M68kRegisters r;
982		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
983		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
984	<	static const uint8 proc[] = {
984	>	static const uint8 proc_template[] = {
985		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
986		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
987		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 773 \| Line 989 \| void sheepshaver_cpu::handle_interrupt(v
989		0x4e, 0xd0, // jmp (a0)
990		M68K_RTS >> 8, M68K_RTS & 0xff // @1
991		};
992	<	Execute68k((uint32)proc, &r);
992	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
993	>	Execute68k(proc, &r);
994		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
995		#else
996		// Only update cursor
#	Line 781 \| Line 998 \| void sheepshaver_cpu::handle_interrupt(v
998		if (InterruptFlags & INTFLAG_VIA) {
999		ClearInterruptFlag(INTFLAG_VIA);
1000		ADBInterrupt();
1001	<	ExecutePPC(VideoVBL);
1001	>	ExecuteNative(NATIVE_VIDEO_VBL);
1002		}
1003		}
1004		#endif
1005	+	#if EMUL_TIME_STATS
1006	+	interrupt_time += (clock() - interrupt_start);
1007	+	#endif
1008		}
1009		break;
1010		#endif
1011		}
792	–	}
1012
1013	<	/*
1014	<	* Execute NATIVE_OP opcode (called by PowerPC emulator)
1015	<	*/
797	<
798	<	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
799	<	tswap32(POWERPC_EMUL_OP \| ((LR) << 11) \| (((uint32)OP) << 6) \| 2)
800	<
801	<	// FIXME: Make sure 32-bit relocations are used
802	<	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
803	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
804	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
805	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
806	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
807	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
808	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
809	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
810	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
811	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
812	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
813	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
814	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
815	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
816	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
817	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
818	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
819	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
820	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
821	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
822	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
823	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
824	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
825	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
826	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
827	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
828	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
829	<	};
1013	>	// We are done with this interrupt
1014	>	--interrupt_depth;
1015	>	}
1016
1017		static void get_resource(void);
1018		static void get_1_resource(void);
#	Line 834 \| Line 1020 \| static void get_ind_resource(void);
1020		static void get_1_ind_resource(void);
1021		static void r_get_resource(void);
1022
1023	<	#define GPR(REG) current_cpu->gpr(REG)
1024	<
839	<	static void NativeOp(int selector)
1023	>	// Execute NATIVE_OP routine
1024	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1025		{
1026		#if EMUL_TIME_STATS
1027		native_exec_count++;
#	Line 854 \| Line 1039 \| static void NativeOp(int selector)
1039		VideoVBL();
1040		break;
1041		case NATIVE_VIDEO_DO_DRIVER_IO:
1042	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
858	<	(void *)GPR(5), GPR(6), GPR(7));
1042	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1043		break;
860	–	#ifdef WORDS_BIGENDIAN
1044		case NATIVE_ETHER_IRQ:
1045		EtherIRQ();
1046		break;
1047		case NATIVE_ETHER_INIT:
1048	<	GPR(3) = InitStreamModule((void *)GPR(3));
1048	>	gpr(3) = InitStreamModule((void *)gpr(3));
1049		break;
1050		case NATIVE_ETHER_TERM:
1051		TerminateStreamModule();
1052		break;
1053		case NATIVE_ETHER_OPEN:
1054	<	GPR(3) = ether_open((queue_t )GPR(3), (void )GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1054	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1055		break;
1056		case NATIVE_ETHER_CLOSE:
1057	<	GPR(3) = ether_close((queue_t )GPR(3), GPR(4), (void )GPR(5));
1057	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1058		break;
1059		case NATIVE_ETHER_WPUT:
1060	<	GPR(3) = ether_wput((queue_t )GPR(3), (mblk_t )GPR(4));
1060	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1061		break;
1062		case NATIVE_ETHER_RSRV:
1063	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1063	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1064		break;
1065	<	#else
1066	<	case NATIVE_ETHER_INIT:
1067	<	// FIXME: needs more complicated thunks
1068	<	GPR(3) = false;
1065	>	case NATIVE_SYNC_HOOK:
1066	>	gpr(3) = NQD_sync_hook(gpr(3));
1067	>	break;
1068	>	case NATIVE_BITBLT_HOOK:
1069	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1070	>	break;
1071	>	case NATIVE_BITBLT:
1072	>	NQD_bitblt(gpr(3));
1073	>	break;
1074	>	case NATIVE_FILLRECT_HOOK:
1075	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1076	>	break;
1077	>	case NATIVE_INVRECT:
1078	>	NQD_invrect(gpr(3));
1079	>	break;
1080	>	case NATIVE_FILLRECT:
1081	>	NQD_fillrect(gpr(3));
1082		break;
887	–	#endif
1083		case NATIVE_SERIAL_NOTHING:
1084		case NATIVE_SERIAL_OPEN:
1085		case NATIVE_SERIAL_PRIME_IN:
#	Line 902 \| Line 1097 \| static void NativeOp(int selector)
1097		SerialStatus,
1098		SerialClose
1099		};
1100	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1100	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1101		break;
1102		}
1103		case NATIVE_GET_RESOURCE:
#	Line 912 \| Line 1107 \| static void NativeOp(int selector)
1107		case NATIVE_R_GET_RESOURCE: {
1108		typedef void (*GetResourceCallback)(void);
1109		static const GetResourceCallback get_resource_callbacks[] = {
1110	<	get_resource,
1111	<	get_1_resource,
1112	<	get_ind_resource,
1113	<	get_1_ind_resource,
1114	<	r_get_resource
1110	>	::get_resource,
1111	>	::get_1_resource,
1112	>	::get_ind_resource,
1113	>	::get_1_ind_resource,
1114	>	::r_get_resource
1115		};
1116		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1117		break;
1118		}
924	–	case NATIVE_DISABLE_INTERRUPT:
925	–	DisableInterrupt();
926	–	break;
927	–	case NATIVE_ENABLE_INTERRUPT:
928	–	EnableInterrupt();
929	–	break;
1119		case NATIVE_MAKE_EXECUTABLE:
1120	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1120	>	MakeExecutable(0, gpr(4), gpr(5));
1121	>	break;
1122	>	case NATIVE_CHECK_LOAD_INVOC:
1123	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1124		break;
1125		default:
1126		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 942 \| Line 1134 \| static void NativeOp(int selector)
1134		}
1135
1136		/*
945	–	* Execute native subroutine (LR must contain return address)
946	–	*/
947	–
948	–	void ExecuteNative(int selector)
949	–	{
950	–	uint32 tvect[2];
951	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
952	–	tvect[1] = 0; // Fake TVECT
953	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
954	–	M68kRegisters r;
955	–	Execute68k((uint32)&desc, &r);
956	–	}
957	–
958	–	/*
1137		* Execute 68k subroutine (must be ended with EXEC_RETURN)
1138		* This must only be called by the emul_thread when in EMUL_OP mode
1139		* r->a[7] is unused, the routine runs on the caller's stack
#	Line 963 \| Line 1141 \| void ExecuteNative(int selector)
1141
1142		void Execute68k(uint32 pc, M68kRegisters *r)
1143		{
1144	<	current_cpu->execute_68k(pc, r);
1144	>	ppc_cpu->execute_68k(pc, r);
1145		}
1146
1147		/*
#	Line 973 \| Line 1151 \| void Execute68k(uint32 pc, M68kRegisters
1151
1152		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1153		{
1154	<	uint16 proc[2];
1155	<	proc[0] = htons(trap);
1156	<	proc[1] = htons(M68K_RTS);
1157	<	Execute68k((uint32)proc, r);
1154	>	SheepVar proc_var(4);
1155	>	uint32 proc = proc_var.addr();
1156	>	WriteMacInt16(proc, trap);
1157	>	WriteMacInt16(proc + 2, M68K_RTS);
1158	>	Execute68k(proc, r);
1159		}
1160
1161		/*
#	Line 985 \| Line 1164 \| void Execute68kTrap(uint16 trap, M68kReg
1164
1165		uint32 call_macos(uint32 tvect)
1166		{
1167	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1167	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1168		}
1169
1170		uint32 call_macos1(uint32 tvect, uint32 arg1)
1171		{
1172		const uint32 args[] = { arg1 };
1173	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1173	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1174		}
1175
1176		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1177		{
1178		const uint32 args[] = { arg1, arg2 };
1179	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1179	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1180		}
1181
1182		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1183		{
1184		const uint32 args[] = { arg1, arg2, arg3 };
1185	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1185	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1186		}
1187
1188		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1189		{
1190		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1191	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1191	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1192		}
1193
1194		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1195		{
1196		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1197	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1197	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1198		}
1199
1200		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1201		{
1202		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1203	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1203	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1204		}
1205
1206		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1207		{
1208		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1209	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1209	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1210		}
1211
1212		/*
#	Line 1036 \| Line 1215 \| uint32 call_macos7(uint32 tvect, uint32
1215
1216		void get_resource(void)
1217		{
1218	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1218	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1219		}
1220
1221		void get_1_resource(void)
1222		{
1223	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1223	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1224		}
1225
1226		void get_ind_resource(void)
1227		{
1228	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1228	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1229		}
1230
1231		void get_1_ind_resource(void)
1232		{
1233	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1233	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1234		}
1235
1236		void r_get_resource(void)
1237		{
1238	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1238	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1239		}

Diff Legend

-–
+Removed lines
-+
+Added lines
-<
+Changed lines
->
+Changed lines

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs. Revision 1.59 by gbeauche, 2005-03-05T18:33:30Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs.
Revision 1.59 by gbeauche, 2005-03-05T18:33:30Z