[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs.
Revision 1.53 by gbeauche, 2004-11-22T22:04:38Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 31 \| Line 31
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33		#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 49 \| Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 72 \| Line 84 \| static void enter_mon(void)
84		#endif
85		}
86
87	<	// Enable multicore (main/interrupts) cpu emulation?
88	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87	>	// From main_*.cpp
88	>	extern uintptr SignalStackBase();
89	>
90	>	// From rsrc_patches.cpp
91	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	>
93	>	// PowerPC EmulOp to exit from emulation looop
94	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
95	>
96	>	// Enable interrupt routine safety checks?
97	>	#define SAFE_INTERRUPT_PPC 1
98
99		// Enable Execute68k() safety checks?
100		#define SAFE_EXEC_68K 1
#	Line 88 \| Line 109 \| static void enter_mon(void)
109		#define INTERRUPTS_IN_NATIVE_MODE 1
110
111		// Pointer to Kernel Data
112	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
112	>	static KernelData * kernel_data;
113
114		// SIGSEGV handler
115	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
115	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
116	>
117	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
118	>	// Special trampolines for EmulOp and NativeOp
119	>	static uint8 *emul_op_trampoline;
120	>	static uint8 *native_op_trampoline;
121	>	#endif
122	>
123	>	// JIT Compiler enabled?
124	>	static inline bool enable_jit_p()
125	>	{
126	>	return PrefsFindBool("jit");
127	>	}
128
129
130		/**
#	Line 109 \| Line 142 \| class sheepshaver_cpu
142		void init_decoder();
143		void execute_sheep(uint32 opcode);
144
145	+	// CPU context to preserve on interrupt
146	+	class interrupt_context {
147	+	uint32 gpr[32];
148	+	uint32 pc;
149	+	uint32 lr;
150	+	uint32 ctr;
151	+	uint32 cr;
152	+	uint32 xer;
153	+	sheepshaver_cpu *cpu;
154	+	const char *where;
155	+	public:
156	+	interrupt_context(sheepshaver_cpu _cpu, const char _where);
157	+	~interrupt_context();
158	+	};
159	+
160		public:
161
162		// Constructor
163		sheepshaver_cpu();
164
165	<	// Condition Register accessors
165	>	// CR & XER accessors
166		uint32 get_cr() const { return cr().get(); }
167		void set_cr(uint32 v) { cr().set(v); }
168	+	uint32 get_xer() const { return xer().get(); }
169	+	void set_xer(uint32 v) { xer().set(v); }
170	+
171	+	// Execute NATIVE_OP routine
172	+	void execute_native_op(uint32 native_op);
173
174	<	// Execution loop
175	<	void execute(uint32 entry, bool enable_cache = false);
174	>	// Execute EMUL_OP routine
175	>	void execute_emul_op(uint32 emul_op);
176
177		// Execute 68k routine
178		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 130 \| Line 183 \| public:
183		// Execute MacOS/PPC code
184		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
185
186	+	#if PPC_ENABLE_JIT
187	+	// Compile one instruction
188	+	virtual int compile1(codegen_context_t & cg_context);
189	+	#endif
190		// Resource manager thunk
191		void get_resource(uint32 old_get_resource);
192
#	Line 137 \| Line 194 \| public:
194		void interrupt(uint32 entry);
195		void handle_interrupt();
196
140	–	// Lazy memory allocator (one item at a time)
141	–	void *operator new(size_t size)
142	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
143	–	void operator delete(void *p)
144	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
145	–	// FIXME: really make surre array allocation fail at link time?
146	–	void *operator new[](size_t);
147	–	void operator delete[](void *p);
148	–
197		// Make sure the SIGSEGV handler can access CPU registers
198		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
199		};
200
201	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
201	>	// Memory allocator returning areas aligned on 16-byte boundaries
202	>	void *operator new(size_t size)
203	>	{
204	>	void *p;
205	>
206	>	#if defined(HAVE_POSIX_MEMALIGN)
207	>	if (posix_memalign(&p, 16, size) != 0)
208	>	throw std::bad_alloc();
209	>	#elif defined(HAVE_MEMALIGN)
210	>	p = memalign(16, size);
211	>	#elif defined(HAVE_VALLOC)
212	>	p = valloc(size); // page-aligned!
213	>	#else
214	>	/* XXX: handle padding ourselves */
215	>	p = malloc(size);
216	>	#endif
217	>
218	>	return p;
219	>	}
220	>
221	>	void operator delete(void *p)
222	>	{
223	>	#if defined(HAVE_MEMALIGN) \|\| defined(HAVE_VALLOC)
224	>	#if defined(__GLIBC__)
225	>	// this is known to work only with GNU libc
226	>	free(p);
227	>	#endif
228	>	#else
229	>	free(p);
230	>	#endif
231	>	}
232
233		sheepshaver_cpu::sheepshaver_cpu()
234	<	: powerpc_cpu()
234	>	: powerpc_cpu(enable_jit_p())
235		{
236		init_decoder();
237		}
238
239		void sheepshaver_cpu::init_decoder()
240		{
163	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
164	–	static bool initialized = false;
165	–	if (initialized)
166	–	return;
167	–	initialized = true;
168	–	#endif
169	–
241		static const instr_info_t sheep_ii_table[] = {
242		{ "sheep",
243		(execute_pmf)&sheepshaver_cpu::execute_sheep,
#	Line 185 \| Line 256 \| void sheepshaver_cpu::init_decoder()
256		}
257		}
258
188	–	// Forward declaration for native opcode handler
189	–	static void NativeOp(int selector);
190	–
259		/* NativeOp instruction format:
260	<	+------------+--------------------------+--+----------+------------+
261	<	\| 6 \| \|FN\| OP \| 2 \|
262	<	+------------+--------------------------+--+----------+------------+
263	<	0 5 \|6 19 20 21 25 26 31
260	>	+------------+-------------------------+--+-----------+------------+
261	>	\| 6 \| \|FN\| OP \| 2 \|
262	>	+------------+-------------------------+--+-----------+------------+
263	>	0 5 \|6 18 19 20 25 26 31
264		*/
265
266	<	typedef bit_field< 20, 20 > FN_field;
267	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
266	>	typedef bit_field< 19, 19 > FN_field;
267	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
268		typedef bit_field< 26, 31 > EMUL_OP_field;
269
270	+	// Execute EMUL_OP routine
271	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
272	+	{
273	+	M68kRegisters r68;
274	+	WriteMacInt32(XLM_68K_R25, gpr(25));
275	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
276	+	for (int i = 0; i < 8; i++)
277	+	r68.d[i] = gpr(8 + i);
278	+	for (int i = 0; i < 7; i++)
279	+	r68.a[i] = gpr(16 + i);
280	+	r68.a[7] = gpr(1);
281	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
282	+	uint32 saved_xer = get_xer();
283	+	EmulOp(&r68, gpr(24), emul_op);
284	+	set_cr(saved_cr);
285	+	set_xer(saved_xer);
286	+	for (int i = 0; i < 8; i++)
287	+	gpr(8 + i) = r68.d[i];
288	+	for (int i = 0; i < 7; i++)
289	+	gpr(16 + i) = r68.a[i];
290	+	gpr(1) = r68.a[7];
291	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
292	+	}
293	+
294		// Execute SheepShaver instruction
295		void sheepshaver_cpu::execute_sheep(uint32 opcode)
296		{
#	Line 215 \| Line 307 \| void sheepshaver_cpu::execute_sheep(uint
307		break;
308
309		case 2: // EXEC_NATIVE
310	<	NativeOp(NATIVE_OP_field::extract(opcode));
310	>	execute_native_op(NATIVE_OP_field::extract(opcode));
311		if (FN_field::test(opcode))
312		pc() = lr();
313		else
314		pc() += 4;
315		break;
316
317	<	default: { // EMUL_OP
318	<	M68kRegisters r68;
227	<	WriteMacInt32(XLM_68K_R25, gpr(25));
228	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
229	<	for (int i = 0; i < 8; i++)
230	<	r68.d[i] = gpr(8 + i);
231	<	for (int i = 0; i < 7; i++)
232	<	r68.a[i] = gpr(16 + i);
233	<	r68.a[7] = gpr(1);
234	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
235	<	for (int i = 0; i < 8; i++)
236	<	gpr(8 + i) = r68.d[i];
237	<	for (int i = 0; i < 7; i++)
238	<	gpr(16 + i) = r68.a[i];
239	<	gpr(1) = r68.a[7];
240	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
317	>	default: // EMUL_OP
318	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
319		pc() += 4;
320		break;
321		}
322	+	}
323	+
324	+	// Compile one instruction
325	+	#if PPC_ENABLE_JIT
326	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
327	+	{
328	+	const instr_info_t *ii = cg_context.instr_info;
329	+	if (ii->mnemo != PPC_I(SHEEP))
330	+	return COMPILE_FAILURE;
331	+
332	+	int status = COMPILE_FAILURE;
333	+	powerpc_dyngen & dg = cg_context.codegen;
334	+	uint32 opcode = cg_context.opcode;
335	+
336	+	switch (opcode & 0x3f) {
337	+	case 0: // EMUL_RETURN
338	+	dg.gen_invoke(QuitEmulator);
339	+	status = COMPILE_CODE_OK;
340	+	break;
341	+
342	+	case 1: // EXEC_RETURN
343	+	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
344	+	// Don't check for pending interrupts, we do know we have to
345	+	// get out of this block ASAP
346	+	dg.gen_exec_return();
347	+	status = COMPILE_EPILOGUE_OK;
348	+	break;
349	+
350	+	case 2: { // EXEC_NATIVE
351	+	uint32 selector = NATIVE_OP_field::extract(opcode);
352	+	switch (selector) {
353	+	#if !PPC_REENTRANT_JIT
354	+	// Filter out functions that may invoke Execute68k() or
355	+	// CallMacOS(), this would break reentrancy as they could
356	+	// invalidate the translation cache and even overwrite
357	+	// continuation code when we are done with them.
358	+	case NATIVE_PATCH_NAME_REGISTRY:
359	+	dg.gen_invoke(DoPatchNameRegistry);
360	+	status = COMPILE_CODE_OK;
361	+	break;
362	+	case NATIVE_VIDEO_INSTALL_ACCEL:
363	+	dg.gen_invoke(VideoInstallAccel);
364	+	status = COMPILE_CODE_OK;
365	+	break;
366	+	case NATIVE_VIDEO_VBL:
367	+	dg.gen_invoke(VideoVBL);
368	+	status = COMPILE_CODE_OK;
369	+	break;
370	+	case NATIVE_GET_RESOURCE:
371	+	case NATIVE_GET_1_RESOURCE:
372	+	case NATIVE_GET_IND_RESOURCE:
373	+	case NATIVE_GET_1_IND_RESOURCE:
374	+	case NATIVE_R_GET_RESOURCE: {
375	+	static const uint32 get_resource_ptr[] = {
376	+	XLM_GET_RESOURCE,
377	+	XLM_GET_1_RESOURCE,
378	+	XLM_GET_IND_RESOURCE,
379	+	XLM_GET_1_IND_RESOURCE,
380	+	XLM_R_GET_RESOURCE
381	+	};
382	+	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
383	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
384	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
385	+	dg.gen_invoke_CPU_im(func, old_get_resource);
386	+	status = COMPILE_CODE_OK;
387	+	break;
388	+	}
389	+	case NATIVE_CHECK_LOAD_INVOC:
390	+	dg.gen_load_T0_GPR(3);
391	+	dg.gen_load_T1_GPR(4);
392	+	dg.gen_se_16_32_T1();
393	+	dg.gen_load_T2_GPR(5);
394	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
395	+	status = COMPILE_CODE_OK;
396	+	break;
397	+	#endif
398	+	case NATIVE_BITBLT:
399	+	dg.gen_load_T0_GPR(3);
400	+	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
401	+	status = COMPILE_CODE_OK;
402	+	break;
403	+	case NATIVE_INVRECT:
404	+	dg.gen_load_T0_GPR(3);
405	+	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
406	+	status = COMPILE_CODE_OK;
407	+	break;
408	+	case NATIVE_FILLRECT:
409	+	dg.gen_load_T0_GPR(3);
410	+	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
411	+	status = COMPILE_CODE_OK;
412	+	break;
413	+	}
414	+	// Could we fully translate this NativeOp?
415	+	if (status == COMPILE_CODE_OK) {
416	+	if (!FN_field::test(opcode))
417	+	cg_context.done_compile = false;
418	+	else {
419	+	dg.gen_load_A0_LR();
420	+	dg.gen_set_PC_A0();
421	+	cg_context.done_compile = true;
422	+	}
423	+	break;
424	+	}
425	+	#if PPC_REENTRANT_JIT
426	+	// Try to execute NativeOp trampoline
427	+	if (!FN_field::test(opcode))
428	+	dg.gen_set_PC_im(cg_context.pc + 4);
429	+	else {
430	+	dg.gen_load_A0_LR();
431	+	dg.gen_set_PC_A0();
432	+	}
433	+	dg.gen_mov_32_T0_im(selector);
434	+	dg.gen_jmp(native_op_trampoline);
435	+	cg_context.done_compile = true;
436	+	status = COMPILE_EPILOGUE_OK;
437	+	break;
438	+	#endif
439	+	// Invoke NativeOp handler
440	+	if (!FN_field::test(opcode)) {
441	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
442	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
443	+	dg.gen_invoke_CPU_im(func, selector);
444	+	cg_context.done_compile = false;
445	+	status = COMPILE_CODE_OK;
446	+	}
447	+	// Otherwise, let it generate a call to execute_sheep() which
448	+	// will cause necessary updates to the program counter
449	+	break;
450	+	}
451	+
452	+	default: { // EMUL_OP
453	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
454	+	#if PPC_REENTRANT_JIT
455	+	// Try to execute EmulOp trampoline
456	+	dg.gen_set_PC_im(cg_context.pc + 4);
457	+	dg.gen_mov_32_T0_im(emul_op);
458	+	dg.gen_jmp(emul_op_trampoline);
459	+	cg_context.done_compile = true;
460	+	status = COMPILE_EPILOGUE_OK;
461	+	break;
462	+	#endif
463	+	// Invoke EmulOp handler
464	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
465	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
466	+	dg.gen_invoke_CPU_im(func, emul_op);
467	+	cg_context.done_compile = false;
468	+	status = COMPILE_CODE_OK;
469	+	break;
470	+	}
471		}
472	+	return status;
473		}
474	+	#endif
475
476	<	// Execution loop
477	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
476	>	// CPU context to preserve on interrupt
477	>	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu _cpu, const char _where)
478		{
479	<	powerpc_cpu::execute(entry, enable_cache);
479	>	#if SAFE_INTERRUPT_PPC >= 2
480	>	cpu = _cpu;
481	>	where = _where;
482	>
483	>	// Save interrupt context
484	>	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
485	>	pc = cpu->pc();
486	>	lr = cpu->lr();
487	>	ctr = cpu->ctr();
488	>	cr = cpu->get_cr();
489	>	xer = cpu->get_xer();
490	>	#endif
491	>	}
492	>
493	>	sheepshaver_cpu::interrupt_context::~interrupt_context()
494	>	{
495	>	#if SAFE_INTERRUPT_PPC >= 2
496	>	// Check whether CPU context was preserved by interrupt
497	>	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
498	>	printf("FATAL: %s: interrupt clobbers registers\n", where);
499	>	for (int i = 0; i < 32; i++)
500	>	if (gpr[i] != cpu->gpr(i))
501	>	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
502	>	}
503	>	if (pc != cpu->pc())
504	>	printf("FATAL: %s: interrupt clobbers PC\n", where);
505	>	if (lr != cpu->lr())
506	>	printf("FATAL: %s: interrupt clobbers LR\n", where);
507	>	if (ctr != cpu->ctr())
508	>	printf("FATAL: %s: interrupt clobbers CTR\n", where);
509	>	if (cr != cpu->get_cr())
510	>	printf("FATAL: %s: interrupt clobbers CR\n", where);
511	>	if (xer != cpu->get_xer())
512	>	printf("FATAL: %s: interrupt clobbers XER\n", where);
513	>	#endif
514		}
515
516		// Handle MacOS interrupt
517		void sheepshaver_cpu::interrupt(uint32 entry)
518		{
519		#if EMUL_TIME_STATS
520	<	interrupt_count++;
520	>	ppc_interrupt_count++;
521		const clock_t interrupt_start = clock();
522		#endif
523
524	<	#if !MULTICORE_CPU
524	>	#if SAFE_INTERRUPT_PPC
525	>	static int depth = 0;
526	>	if (depth != 0)
527	>	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
528	>	depth++;
529	>	#endif
530	>
531		// Save program counters and branch registers
532		uint32 saved_pc = pc();
533		uint32 saved_lr = lr();
534		uint32 saved_ctr= ctr();
535		uint32 saved_sp = gpr(1);
267	–	#endif
536
537		// Initialize stack pointer to SheepShaver alternate stack base
538	<	gpr(1) = SheepStack1Base - 64;
538	>	gpr(1) = SignalStackBase() - 64;
539
540		// Build trampoline to return from interrupt
541	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
541	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
542
543		// Prepare registers for nanokernel interrupt routine
544		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 289 \| Line 557 \| void sheepshaver_cpu::interrupt(uint32 e
557		gpr(1) = KernelDataAddr;
558		gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
559		gpr(8) = 0;
560	<	gpr(10) = (uint32)trampoline;
561	<	gpr(12) = (uint32)trampoline;
560	>	gpr(10) = trampoline.addr();
561	>	gpr(12) = trampoline.addr();
562		gpr(13) = get_cr();
563
564		// rlwimi. r7,r7,8,0,0
#	Line 304 \| Line 572 \| void sheepshaver_cpu::interrupt(uint32 e
572		// Enter nanokernel
573		execute(entry);
574
307	–	#if !MULTICORE_CPU
575		// Restore program counters and branch registers
576		pc() = saved_pc;
577		lr() = saved_lr;
578		ctr()= saved_ctr;
579		gpr(1) = saved_sp;
313	–	#endif
580
581		#if EMUL_TIME_STATS
582		interrupt_time += (clock() - interrupt_start);
583		#endif
584	+
585	+	#if SAFE_INTERRUPT_PPC
586	+	depth--;
587	+	#endif
588		}
589
590		// Execute 68k routine
#	Line 427 \| Line 697 \| uint32 sheepshaver_cpu::execute_macos_co
697		uint32 saved_ctr= ctr();
698
699		// Build trampoline with EXEC_RETURN
700	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
701	<	lr() = (uint32)trampoline;
700	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
701	>	lr() = trampoline.addr();
702
703		gpr(1) -= 64; // Create stack frame
704		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 472 \| Line 742 \| inline void sheepshaver_cpu::execute_ppc
742		// Save branch registers
743		uint32 saved_lr = lr();
744
745	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
746	<	lr() = (uint32)trampoline;
745	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
746	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
747	>	lr() = trampoline.addr();
748
749		execute(entry);
750
#	Line 482 \| Line 753 \| inline void sheepshaver_cpu::execute_ppc
753		}
754
755		// Resource Manager thunk
485	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
486	–
756		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
757		{
758		uint32 type = gpr(3);
#	Line 509 \| Line 778 \| inline void sheepshaver_cpu::get_resourc
778		* SheepShaver CPU engine interface
779		**/
780
781	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
782	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
514	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
781	>	// PowerPC CPU emulator
782	>	static sheepshaver_cpu *ppc_cpu = NULL;
783
784		void FlushCodeCache(uintptr start, uintptr end)
785		{
786		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
787	<	main_cpu->invalidate_cache_range(start, end);
520	<	#if MULTICORE_CPU
521	<	interrupt_cpu->invalidate_cache_range(start, end);
522	<	#endif
523	<	}
524	<
525	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
526	<	{
527	<	#if MULTICORE_CPU
528	<	current_cpu = new_cpu;
529	<	#endif
530	<	}
531	<
532	<	static inline void cpu_pop()
533	<	{
534	<	#if MULTICORE_CPU
535	<	current_cpu = main_cpu;
536	<	#endif
787	>	ppc_cpu->invalidate_cache_range(start, end);
788		}
789
790		// Dump PPC registers
791		static void dump_registers(void)
792		{
793	<	current_cpu->dump_registers();
793	>	ppc_cpu->dump_registers();
794		}
795
796		// Dump log
797		static void dump_log(void)
798		{
799	<	current_cpu->dump_log();
799	>	ppc_cpu->dump_log();
800		}
801
802		/*
803		* Initialize CPU emulation
804		*/
805
806	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
806	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
807		{
808		#if ENABLE_VOSF
809		// Handle screen fault
#	Line 564 \| Line 815 \| static sigsegv_return_t sigsegv_handler(
815		const uintptr addr = (uintptr)fault_address;
816		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
817		// Ignore writes to ROM
818	<	if ((addr - ROM_BASE) < ROM_SIZE)
818	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
819		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
820
821		// Get program counter of target CPU
822	<	sheepshaver_cpu * const cpu = current_cpu;
822	>	sheepshaver_cpu * const cpu = ppc_cpu;
823		const uint32 pc = cpu->pc();
824
825		// Fault in Mac ROM or RAM?
826	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
826	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
827		if (mac_fault) {
828
829		// "VM settings" during MacOS 8 installation
#	Line 592 \| Line 843 \| static sigsegv_return_t sigsegv_handler(
843		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
844		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
845		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
846	+
847	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
848	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
849	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
850	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
851	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
852	+
853	+	// Ignore writes to the zero page
854	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
855	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
856
857		// Ignore all other faults, if requested
858		if (PrefsFindBool("ignoresegv"))
#	Line 604 \| Line 865 \| static sigsegv_return_t sigsegv_handler(
865		printf("SIGSEGV\n");
866		printf(" pc %p\n", fault_instruction);
867		printf(" ea %p\n", fault_address);
607	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
868		dump_registers();
869	<	current_cpu->dump_log();
869	>	ppc_cpu->dump_log();
870		enter_mon();
871		QuitEmulator();
872
#	Line 615 \| Line 875 \| static sigsegv_return_t sigsegv_handler(
875
876		void init_emul_ppc(void)
877		{
878	+	// Get pointer to KernelData in host address space
879	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
880	+
881		// Initialize main CPU emulator
882	<	main_cpu = new sheepshaver_cpu();
883	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
882	>	ppc_cpu = new sheepshaver_cpu();
883	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
884	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
885		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
886
623	–	#if MULTICORE_CPU
624	–	// Initialize alternate CPU emulator to handle interrupts
625	–	interrupt_cpu = new sheepshaver_cpu();
626	–	#endif
627	–
628	–	// Install the handler for SIGSEGV
629	–	sigsegv_install_handler(sigsegv_handler);
630	–
887		#if ENABLE_MON
888		// Install "regs" command in cxmon
889		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 653 \| Line 909 \| void exit_emul_ppc(void)
909		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
910		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
911		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
912	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
913	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
914
915		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
916		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 669 \| Line 927 \| void exit_emul_ppc(void)
927		printf("\n");
928		#endif
929
930	<	delete main_cpu;
673	<	#if MULTICORE_CPU
674	<	delete interrupt_cpu;
675	<	#endif
930	>	delete ppc_cpu;
931		}
932
933	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
934	+	// Initialize EmulOp trampolines
935	+	void init_emul_op_trampolines(basic_dyngen & dg)
936	+	{
937	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
938	+	func_t func;
939	+
940	+	// EmulOp
941	+	emul_op_trampoline = dg.gen_start();
942	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
943	+	dg.gen_invoke_CPU_T0(func);
944	+	dg.gen_exec_return();
945	+	dg.gen_end();
946	+
947	+	// NativeOp
948	+	native_op_trampoline = dg.gen_start();
949	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
950	+	dg.gen_invoke_CPU_T0(func);
951	+	dg.gen_exec_return();
952	+	dg.gen_end();
953	+
954	+	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
955	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
956	+	}
957	+	#endif
958	+
959		/*
960		* Emulation loop
961		*/
962
963		void emul_ppc(uint32 entry)
964		{
965	<	current_cpu = main_cpu;
966	<	#if DEBUG
686	<	current_cpu->start_log();
965	>	#if 0
966	>	ppc_cpu->start_log();
967		#endif
968		// start emulation loop and enable code translation or caching
969	<	current_cpu->execute(entry, true);
969	>	ppc_cpu->execute(entry);
970		}
971
972		/*
973		* Handle PowerPC interrupt
974		*/
975
696	–	#if ASYNC_IRQ
697	–	void HandleInterrupt(void)
698	–	{
699	–	main_cpu->handle_interrupt();
700	–	}
701	–	#else
976		void TriggerInterrupt(void)
977		{
978		#if 0
979		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
980		#else
981		// Trigger interrupt to main cpu only
982	<	if (main_cpu)
983	<	main_cpu->trigger_interrupt();
982	>	if (ppc_cpu)
983	>	ppc_cpu->trigger_interrupt();
984		#endif
985		}
712	–	#endif
986
987		void sheepshaver_cpu::handle_interrupt(void)
988		{
989	+	#ifdef USE_SDL_VIDEO
990	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
991	+	SDL_PumpEvents();
992	+	#endif
993	+
994		// Do nothing if interrupts are disabled
995	<	if ((int32 )XLM_IRQ_NEST > 0)
995	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
996		return;
997
998	<	// Do nothing if there is no interrupt pending
999	<	if (InterruptFlags == 0)
1000	<	return;
998	>	// Current interrupt nest level
999	>	static int interrupt_depth = 0;
1000	>	++interrupt_depth;
1001	>	#if EMUL_TIME_STATS
1002	>	interrupt_count++;
1003	>	#endif
1004
1005		// Disable MacOS stack sniffer
1006		WriteMacInt32(0x110, 0);
#	Line 728 \| Line 1009 \| void sheepshaver_cpu::handle_interrupt(v
1009		switch (ReadMacInt32(XLM_RUN_MODE)) {
1010		case MODE_68K:
1011		// 68k emulator active, trigger 68k interrupt level 1
731	–	assert(current_cpu == main_cpu);
1012		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1013		set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
1014		break;
#	Line 736 \| Line 1016 \| void sheepshaver_cpu::handle_interrupt(v
1016		#if INTERRUPTS_IN_NATIVE_MODE
1017		case MODE_NATIVE:
1018		// 68k emulator inactive, in nanokernel?
1019	<	assert(current_cpu == main_cpu);
1020	<	if (gpr(1) != KernelDataAddr) {
1019	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1020	>	interrupt_context ctx(this, "PowerPC mode");
1021	>
1022		// Prepare for 68k interrupt level 1
1023		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1024		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 746 \| Line 1027 \| void sheepshaver_cpu::handle_interrupt(v
1027
1028		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1029		DisableInterrupt();
749	–	cpu_push(interrupt_cpu);
1030		if (ROMType == ROMTYPE_NEWWORLD)
1031	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
1031	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1032		else
1033	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
754	<	cpu_pop();
1033	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1034		}
1035		break;
1036		#endif
#	Line 760 \| Line 1039 \| void sheepshaver_cpu::handle_interrupt(v
1039		case MODE_EMUL_OP:
1040		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1041		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1042	+	interrupt_context ctx(this, "68k mode");
1043	+	#if EMUL_TIME_STATS
1044	+	const clock_t interrupt_start = clock();
1045	+	#endif
1046		#if 1
1047		// Execute full 68k interrupt routine
1048		M68kRegisters r;
1049		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
1050		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
1051	<	static const uint8 proc[] = {
1051	>	static const uint8 proc_template[] = {
1052		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
1053		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
1054		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 773 \| Line 1056 \| void sheepshaver_cpu::handle_interrupt(v
1056		0x4e, 0xd0, // jmp (a0)
1057		M68K_RTS >> 8, M68K_RTS & 0xff // @1
1058		};
1059	<	Execute68k((uint32)proc, &r);
1059	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
1060	>	Execute68k(proc, &r);
1061		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
1062		#else
1063		// Only update cursor
#	Line 781 \| Line 1065 \| void sheepshaver_cpu::handle_interrupt(v
1065		if (InterruptFlags & INTFLAG_VIA) {
1066		ClearInterruptFlag(INTFLAG_VIA);
1067		ADBInterrupt();
1068	<	ExecutePPC(VideoVBL);
1068	>	ExecuteNative(NATIVE_VIDEO_VBL);
1069		}
1070		}
1071		#endif
1072	+	#if EMUL_TIME_STATS
1073	+	interrupt_time += (clock() - interrupt_start);
1074	+	#endif
1075		}
1076		break;
1077		#endif
1078		}
792	–	}
793	–
794	–	/*
795	–	* Execute NATIVE_OP opcode (called by PowerPC emulator)
796	–	*/
797	–
798	–	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
799	–	tswap32(POWERPC_EMUL_OP \| ((LR) << 11) \| (((uint32)OP) << 6) \| 2)
1079
1080	<	// FIXME: Make sure 32-bit relocations are used
1081	<	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
1082	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
804	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
805	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
806	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
807	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
808	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
809	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
810	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
811	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
812	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
813	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
814	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
815	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
816	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
817	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
818	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
819	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
820	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
821	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
822	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
823	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
824	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
825	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
826	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
827	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
828	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
829	<	};
1080	>	// We are done with this interrupt
1081	>	--interrupt_depth;
1082	>	}
1083
1084		static void get_resource(void);
1085		static void get_1_resource(void);
#	Line 834 \| Line 1087 \| static void get_ind_resource(void);
1087		static void get_1_ind_resource(void);
1088		static void r_get_resource(void);
1089
1090	<	#define GPR(REG) current_cpu->gpr(REG)
1091	<
839	<	static void NativeOp(int selector)
1090	>	// Execute NATIVE_OP routine
1091	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1092		{
1093		#if EMUL_TIME_STATS
1094		native_exec_count++;
#	Line 854 \| Line 1106 \| static void NativeOp(int selector)
1106		VideoVBL();
1107		break;
1108		case NATIVE_VIDEO_DO_DRIVER_IO:
1109	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
858	<	(void *)GPR(5), GPR(6), GPR(7));
1109	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1110		break;
1111		#ifdef WORDS_BIGENDIAN
1112		case NATIVE_ETHER_IRQ:
1113		EtherIRQ();
1114		break;
1115		case NATIVE_ETHER_INIT:
1116	<	GPR(3) = InitStreamModule((void *)GPR(3));
1116	>	gpr(3) = InitStreamModule((void *)gpr(3));
1117		break;
1118		case NATIVE_ETHER_TERM:
1119		TerminateStreamModule();
1120		break;
1121		case NATIVE_ETHER_OPEN:
1122	<	GPR(3) = ether_open((queue_t )GPR(3), (void )GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1122	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1123		break;
1124		case NATIVE_ETHER_CLOSE:
1125	<	GPR(3) = ether_close((queue_t )GPR(3), GPR(4), (void )GPR(5));
1125	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1126		break;
1127		case NATIVE_ETHER_WPUT:
1128	<	GPR(3) = ether_wput((queue_t )GPR(3), (mblk_t )GPR(4));
1128	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1129		break;
1130		case NATIVE_ETHER_RSRV:
1131	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1131	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1132		break;
1133		#else
1134		case NATIVE_ETHER_INIT:
1135		// FIXME: needs more complicated thunks
1136	<	GPR(3) = false;
1136	>	gpr(3) = false;
1137		break;
1138		#endif
1139	+	case NATIVE_SYNC_HOOK:
1140	+	gpr(3) = NQD_sync_hook(gpr(3));
1141	+	break;
1142	+	case NATIVE_BITBLT_HOOK:
1143	+	gpr(3) = NQD_bitblt_hook(gpr(3));
1144	+	break;
1145	+	case NATIVE_BITBLT:
1146	+	NQD_bitblt(gpr(3));
1147	+	break;
1148	+	case NATIVE_FILLRECT_HOOK:
1149	+	gpr(3) = NQD_fillrect_hook(gpr(3));
1150	+	break;
1151	+	case NATIVE_INVRECT:
1152	+	NQD_invrect(gpr(3));
1153	+	break;
1154	+	case NATIVE_FILLRECT:
1155	+	NQD_fillrect(gpr(3));
1156	+	break;
1157		case NATIVE_SERIAL_NOTHING:
1158		case NATIVE_SERIAL_OPEN:
1159		case NATIVE_SERIAL_PRIME_IN:
#	Line 902 \| Line 1171 \| static void NativeOp(int selector)
1171		SerialStatus,
1172		SerialClose
1173		};
1174	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1174	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1175		break;
1176		}
1177		case NATIVE_GET_RESOURCE:
#	Line 912 \| Line 1181 \| static void NativeOp(int selector)
1181		case NATIVE_R_GET_RESOURCE: {
1182		typedef void (*GetResourceCallback)(void);
1183		static const GetResourceCallback get_resource_callbacks[] = {
1184	<	get_resource,
1185	<	get_1_resource,
1186	<	get_ind_resource,
1187	<	get_1_ind_resource,
1188	<	r_get_resource
1184	>	::get_resource,
1185	>	::get_1_resource,
1186	>	::get_ind_resource,
1187	>	::get_1_ind_resource,
1188	>	::r_get_resource
1189		};
1190		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1191		break;
1192		}
924	–	case NATIVE_DISABLE_INTERRUPT:
925	–	DisableInterrupt();
926	–	break;
927	–	case NATIVE_ENABLE_INTERRUPT:
928	–	EnableInterrupt();
929	–	break;
1193		case NATIVE_MAKE_EXECUTABLE:
1194	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1194	>	MakeExecutable(0, gpr(4), gpr(5));
1195	>	break;
1196	>	case NATIVE_CHECK_LOAD_INVOC:
1197	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1198		break;
1199		default:
1200		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 942 \| Line 1208 \| static void NativeOp(int selector)
1208		}
1209
1210		/*
945	–	* Execute native subroutine (LR must contain return address)
946	–	*/
947	–
948	–	void ExecuteNative(int selector)
949	–	{
950	–	uint32 tvect[2];
951	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
952	–	tvect[1] = 0; // Fake TVECT
953	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
954	–	M68kRegisters r;
955	–	Execute68k((uint32)&desc, &r);
956	–	}
957	–
958	–	/*
1211		* Execute 68k subroutine (must be ended with EXEC_RETURN)
1212		* This must only be called by the emul_thread when in EMUL_OP mode
1213		* r->a[7] is unused, the routine runs on the caller's stack
#	Line 963 \| Line 1215 \| void ExecuteNative(int selector)
1215
1216		void Execute68k(uint32 pc, M68kRegisters *r)
1217		{
1218	<	current_cpu->execute_68k(pc, r);
1218	>	ppc_cpu->execute_68k(pc, r);
1219		}
1220
1221		/*
#	Line 973 \| Line 1225 \| void Execute68k(uint32 pc, M68kRegisters
1225
1226		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1227		{
1228	<	uint16 proc[2];
1229	<	proc[0] = htons(trap);
1230	<	proc[1] = htons(M68K_RTS);
1231	<	Execute68k((uint32)proc, r);
1228	>	SheepVar proc_var(4);
1229	>	uint32 proc = proc_var.addr();
1230	>	WriteMacInt16(proc, trap);
1231	>	WriteMacInt16(proc + 2, M68K_RTS);
1232	>	Execute68k(proc, r);
1233		}
1234
1235		/*
#	Line 985 \| Line 1238 \| void Execute68kTrap(uint16 trap, M68kReg
1238
1239		uint32 call_macos(uint32 tvect)
1240		{
1241	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1241	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1242		}
1243
1244		uint32 call_macos1(uint32 tvect, uint32 arg1)
1245		{
1246		const uint32 args[] = { arg1 };
1247	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1247	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1248		}
1249
1250		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1251		{
1252		const uint32 args[] = { arg1, arg2 };
1253	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1253	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1254		}
1255
1256		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1257		{
1258		const uint32 args[] = { arg1, arg2, arg3 };
1259	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1259	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1260		}
1261
1262		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1263		{
1264		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1265	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1265	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1266		}
1267
1268		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1269		{
1270		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1271	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1271	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1272		}
1273
1274		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1275		{
1276		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1277	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1277	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1278		}
1279
1280		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1281		{
1282		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1283	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1283	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1284		}
1285
1286		/*
#	Line 1036 \| Line 1289 \| uint32 call_macos7(uint32 tvect, uint32
1289
1290		void get_resource(void)
1291		{
1292	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1292	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1293		}
1294
1295		void get_1_resource(void)
1296		{
1297	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1297	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1298		}
1299
1300		void get_ind_resource(void)
1301		{
1302	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1302	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1303		}
1304
1305		void get_1_ind_resource(void)
1306		{
1307	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1307	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1308		}
1309
1310		void r_get_resource(void)
1311		{
1312	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1312	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1313		}

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs. Revision 1.53 by gbeauche, 2004-11-22T22:04:38Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs.
Revision 1.53 by gbeauche, 2004-11-22T22:04:38Z