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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs.
Revision 1.43 by gbeauche, 2004-05-31T10:08:31Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 31 | Line 31
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33		#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45
46		#if ENABLE_MON
47		#include "mon.h"
#	Line 72 | Line 75 | static void enter_mon(void)
75		#endif
76		}
77
78	<	// Enable multicore (main/interrupts) cpu emulation?
79	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
78	>	// From main_*.cpp
79	>	extern uintptr SignalStackBase();
80	>
81	>	// From rsrc_patches.cpp
82	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
83	>
84	>	// PowerPC EmulOp to exit from emulation looop
85	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
86	>
87	>	// Enable interrupt routine safety checks?
88	>	#define SAFE_INTERRUPT_PPC 1
89
90		// Enable Execute68k() safety checks?
91		#define SAFE_EXEC_68K 1
#	Line 87 | Line 99 | static void enter_mon(void)
99		// Interrupts in native mode?
100		#define INTERRUPTS_IN_NATIVE_MODE 1
101
102	+	// Enable native EMUL_OPs to be run without a mode switch
103	+	#define ENABLE_NATIVE_EMUL_OP 1
104	+
105		// Pointer to Kernel Data
106		static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
107
108		// SIGSEGV handler
109		static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
110
111	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
112	+	// Special trampolines for EmulOp and NativeOp
113	+	static uint8 *emul_op_trampoline;
114	+	static uint8 *native_op_trampoline;
115	+	#endif
116	+
117	+	// JIT Compiler enabled?
118	+	static inline bool enable_jit_p()
119	+	{
120	+	return PrefsFindBool("jit");
121	+	}
122	+
123
124		/**
125		*              PowerPC emulator glue with special 'sheep' opcodes
#	Line 109 | Line 136 | class sheepshaver_cpu
136		void init_decoder();
137		void execute_sheep(uint32 opcode);
138
139	+	// Filter out EMUL_OP routines that only call native code
140	+	bool filter_execute_emul_op(uint32 emul_op);
141	+
142	+	// "Native" EMUL_OP routines
143	+	void execute_emul_op_microseconds();
144	+	void execute_emul_op_idle_time_1();
145	+	void execute_emul_op_idle_time_2();
146	+
147	+	// CPU context to preserve on interrupt
148	+	class interrupt_context {
149	+	uint32 gpr[32];
150	+	uint32 pc;
151	+	uint32 lr;
152	+	uint32 ctr;
153	+	uint32 cr;
154	+	uint32 xer;
155	+	sheepshaver_cpu *cpu;
156	+	const char *where;
157	+	public:
158	+	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
159	+	~interrupt_context();
160	+	};
161	+
162		public:
163
164		// Constructor
165		sheepshaver_cpu();
166
167	<	// Condition Register accessors
167	>	// CR & XER accessors
168		uint32 get_cr() const           { return cr().get(); }
169		void set_cr(uint32 v)           { cr().set(v); }
170	+	uint32 get_xer() const          { return xer().get(); }
171	+	void set_xer(uint32 v)          { xer().set(v); }
172
173	<	// Execution loop
174	<	void execute(uint32 entry, bool enable_cache = false);
173	>	// Execute NATIVE_OP routine
174	>	void execute_native_op(uint32 native_op);
175	>
176	>	// Execute EMUL_OP routine
177	>	void execute_emul_op(uint32 emul_op);
178
179		// Execute 68k routine
180		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 130 | Line 185 | public:
185		// Execute MacOS/PPC code
186		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
187
188	+	// Compile one instruction
189	+	virtual int compile1(codegen_context_t & cg_context);
190	+
191		// Resource manager thunk
192		void get_resource(uint32 old_get_resource);
193
#	Line 137 | Line 195 | public:
195		void interrupt(uint32 entry);
196		void handle_interrupt();
197
140	–	// Lazy memory allocator (one item at a time)
141	–	void *operator new(size_t size)
142	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
143	–	void operator delete(void *p)
144	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
145	–	// FIXME: really make surre array allocation fail at link time?
146	–	void *operator new[](size_t);
147	–	void operator delete[](void *p);
148	–
198		// Make sure the SIGSEGV handler can access CPU registers
199		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
200		};
201
202	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
202	>	// Memory allocator returning areas aligned on 16-byte boundaries
203	>	void *operator new(size_t size)
204	>	{
205	>	void *p;
206	>
207	>	#if defined(HAVE_POSIX_MEMALIGN)
208	>	if (posix_memalign(&p, 16, size) != 0)
209	>	throw std::bad_alloc();
210	>	#elif defined(HAVE_MEMALIGN)
211	>	p = memalign(16, size);
212	>	#elif defined(HAVE_VALLOC)
213	>	p = valloc(size); // page-aligned!
214	>	#else
215	>	/* XXX: handle padding ourselves */
216	>	p = malloc(size);
217	>	#endif
218	>
219	>	return p;
220	>	}
221	>
222	>	void operator delete(void *p)
223	>	{
224	>	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
225	>	#if defined(__GLIBC__)
226	>	// this is known to work only with GNU libc
227	>	free(p);
228	>	#endif
229	>	#else
230	>	free(p);
231	>	#endif
232	>	}
233
234		sheepshaver_cpu::sheepshaver_cpu()
235	<	: powerpc_cpu()
235	>	: powerpc_cpu(enable_jit_p())
236		{
237		init_decoder();
238		}
239
240		void sheepshaver_cpu::init_decoder()
241		{
163	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
164	–	static bool initialized = false;
165	–	if (initialized)
166	–	return;
167	–	initialized = true;
168	–	#endif
169	–
242		static const instr_info_t sheep_ii_table[] = {
243		{ "sheep",
244		(execute_pmf)&sheepshaver_cpu::execute_sheep,
#	Line 185 | Line 257 | void sheepshaver_cpu::init_decoder()
257		}
258		}
259
188	–	// Forward declaration for native opcode handler
189	–	static void NativeOp(int selector);
190	–
260		/*              NativeOp instruction format:
261	<	+------------+--------------------------+--+----------+------------+
262	<	|      6     |                          |FN|    OP    |      2     |
263	<	+------------+--------------------------+--+----------+------------+
264	<	0         5 |6                       19 20 21      25 26        31
261	>	+------------+-------------------------+--+-----------+------------+
262	>	|      6     |                         |FN|    OP     |      2     |
263	>	+------------+-------------------------+--+-----------+------------+
264	>	0         5 |6                      18 19 20      25 26        31
265		*/
266
267	<	typedef bit_field< 20, 20 > FN_field;
268	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
267	>	typedef bit_field< 19, 19 > FN_field;
268	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
269		typedef bit_field< 26, 31 > EMUL_OP_field;
270
271	+	// "Native" EMUL_OP routines
272	+	#define GPR_A(REG) gpr(16 + (REG))
273	+	#define GPR_D(REG) gpr( 8 + (REG))
274	+
275	+	void sheepshaver_cpu::execute_emul_op_microseconds()
276	+	{
277	+	Microseconds(GPR_A(0), GPR_D(0));
278	+	}
279	+
280	+	void sheepshaver_cpu::execute_emul_op_idle_time_1()
281	+	{
282	+	// Sleep if no events pending
283	+	if (ReadMacInt32(0x14c) == 0)
284	+	Delay_usec(16667);
285	+	GPR_A(0) = ReadMacInt32(0x2b6);
286	+	}
287	+
288	+	void sheepshaver_cpu::execute_emul_op_idle_time_2()
289	+	{
290	+	// Sleep if no events pending
291	+	if (ReadMacInt32(0x14c) == 0)
292	+	Delay_usec(16667);
293	+	GPR_D(0) = (uint32)-2;
294	+	}
295	+
296	+	// Filter out EMUL_OP routines that only call native code
297	+	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
298	+	{
299	+	switch (emul_op) {
300	+	case OP_MICROSECONDS:
301	+	execute_emul_op_microseconds();
302	+	return true;
303	+	case OP_IDLE_TIME:
304	+	execute_emul_op_idle_time_1();
305	+	return true;
306	+	case OP_IDLE_TIME_2:
307	+	execute_emul_op_idle_time_2();
308	+	return true;
309	+	}
310	+	return false;
311	+	}
312	+
313	+	// Execute EMUL_OP routine
314	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
315	+	{
316	+	#if ENABLE_NATIVE_EMUL_OP
317	+	// First, filter out EMUL_OPs that can be executed without a mode switch
318	+	if (filter_execute_emul_op(emul_op))
319	+	return;
320	+	#endif
321	+
322	+	M68kRegisters r68;
323	+	WriteMacInt32(XLM_68K_R25, gpr(25));
324	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
325	+	for (int i = 0; i < 8; i++)
326	+	r68.d[i] = gpr(8 + i);
327	+	for (int i = 0; i < 7; i++)
328	+	r68.a[i] = gpr(16 + i);
329	+	r68.a[7] = gpr(1);
330	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
331	+	uint32 saved_xer = get_xer();
332	+	EmulOp(&r68, gpr(24), emul_op);
333	+	set_cr(saved_cr);
334	+	set_xer(saved_xer);
335	+	for (int i = 0; i < 8; i++)
336	+	gpr(8 + i) = r68.d[i];
337	+	for (int i = 0; i < 7; i++)
338	+	gpr(16 + i) = r68.a[i];
339	+	gpr(1) = r68.a[7];
340	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
341	+	}
342	+
343		// Execute SheepShaver instruction
344		void sheepshaver_cpu::execute_sheep(uint32 opcode)
345		{
#	Line 215 | Line 356 | void sheepshaver_cpu::execute_sheep(uint
356		break;
357
358		case 2:         // EXEC_NATIVE
359	<	NativeOp(NATIVE_OP_field::extract(opcode));
359	>	execute_native_op(NATIVE_OP_field::extract(opcode));
360		if (FN_field::test(opcode))
361		pc() = lr();
362		else
363		pc() += 4;
364		break;
365
366	<	default: {      // EMUL_OP
367	<	M68kRegisters r68;
227	<	WriteMacInt32(XLM_68K_R25, gpr(25));
228	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
229	<	for (int i = 0; i < 8; i++)
230	<	r68.d[i] = gpr(8 + i);
231	<	for (int i = 0; i < 7; i++)
232	<	r68.a[i] = gpr(16 + i);
233	<	r68.a[7] = gpr(1);
234	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
235	<	for (int i = 0; i < 8; i++)
236	<	gpr(8 + i) = r68.d[i];
237	<	for (int i = 0; i < 7; i++)
238	<	gpr(16 + i) = r68.a[i];
239	<	gpr(1) = r68.a[7];
240	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
366	>	default:        // EMUL_OP
367	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
368		pc() += 4;
369		break;
370		}
371	+	}
372	+
373	+	// Compile one instruction
374	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
375	+	{
376	+	#if PPC_ENABLE_JIT
377	+	const instr_info_t *ii = cg_context.instr_info;
378	+	if (ii->mnemo != PPC_I(SHEEP))
379	+	return COMPILE_FAILURE;
380	+
381	+	int status = COMPILE_FAILURE;
382	+	powerpc_dyngen & dg = cg_context.codegen;
383	+	uint32 opcode = cg_context.opcode;
384	+
385	+	switch (opcode & 0x3f) {
386	+	case 0:         // EMUL_RETURN
387	+	dg.gen_invoke(QuitEmulator);
388	+	status = COMPILE_CODE_OK;
389	+	break;
390	+
391	+	case 1:         // EXEC_RETURN
392	+	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
393	+	// Don't check for pending interrupts, we do know we have to
394	+	// get out of this block ASAP
395	+	dg.gen_exec_return();
396	+	status = COMPILE_EPILOGUE_OK;
397	+	break;
398	+
399	+	case 2: {       // EXEC_NATIVE
400	+	uint32 selector = NATIVE_OP_field::extract(opcode);
401	+	switch (selector) {
402	+	#if !PPC_REENTRANT_JIT
403	+	// Filter out functions that may invoke Execute68k() or
404	+	// CallMacOS(), this would break reentrancy as they could
405	+	// invalidate the translation cache and even overwrite
406	+	// continuation code when we are done with them.
407	+	case NATIVE_PATCH_NAME_REGISTRY:
408	+	dg.gen_invoke(DoPatchNameRegistry);
409	+	status = COMPILE_CODE_OK;
410	+	break;
411	+	case NATIVE_VIDEO_INSTALL_ACCEL:
412	+	dg.gen_invoke(VideoInstallAccel);
413	+	status = COMPILE_CODE_OK;
414	+	break;
415	+	case NATIVE_VIDEO_VBL:
416	+	dg.gen_invoke(VideoVBL);
417	+	status = COMPILE_CODE_OK;
418	+	break;
419	+	case NATIVE_GET_RESOURCE:
420	+	case NATIVE_GET_1_RESOURCE:
421	+	case NATIVE_GET_IND_RESOURCE:
422	+	case NATIVE_GET_1_IND_RESOURCE:
423	+	case NATIVE_R_GET_RESOURCE: {
424	+	static const uint32 get_resource_ptr[] = {
425	+	XLM_GET_RESOURCE,
426	+	XLM_GET_1_RESOURCE,
427	+	XLM_GET_IND_RESOURCE,
428	+	XLM_GET_1_IND_RESOURCE,
429	+	XLM_R_GET_RESOURCE
430	+	};
431	+	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
432	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
433	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
434	+	dg.gen_invoke_CPU_im(func, old_get_resource);
435	+	status = COMPILE_CODE_OK;
436	+	break;
437	+	}
438	+	case NATIVE_CHECK_LOAD_INVOC:
439	+	dg.gen_load_T0_GPR(3);
440	+	dg.gen_load_T1_GPR(4);
441	+	dg.gen_se_16_32_T1();
442	+	dg.gen_load_T2_GPR(5);
443	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
444	+	status = COMPILE_CODE_OK;
445	+	break;
446	+	#endif
447	+	case NATIVE_DISABLE_INTERRUPT:
448	+	dg.gen_invoke(DisableInterrupt);
449	+	status = COMPILE_CODE_OK;
450	+	break;
451	+	case NATIVE_ENABLE_INTERRUPT:
452	+	dg.gen_invoke(EnableInterrupt);
453	+	status = COMPILE_CODE_OK;
454	+	break;
455	+	case NATIVE_BITBLT:
456	+	dg.gen_load_T0_GPR(3);
457	+	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
458	+	status = COMPILE_CODE_OK;
459	+	break;
460	+	case NATIVE_INVRECT:
461	+	dg.gen_load_T0_GPR(3);
462	+	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
463	+	status = COMPILE_CODE_OK;
464	+	break;
465	+	case NATIVE_FILLRECT:
466	+	dg.gen_load_T0_GPR(3);
467	+	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
468	+	status = COMPILE_CODE_OK;
469	+	break;
470	+	}
471	+	// Could we fully translate this NativeOp?
472	+	if (status == COMPILE_CODE_OK) {
473	+	if (!FN_field::test(opcode))
474	+	cg_context.done_compile = false;
475	+	else {
476	+	dg.gen_load_A0_LR();
477	+	dg.gen_set_PC_A0();
478	+	cg_context.done_compile = true;
479	+	}
480	+	break;
481	+	}
482	+	#if PPC_REENTRANT_JIT
483	+	// Try to execute NativeOp trampoline
484	+	if (!FN_field::test(opcode))
485	+	dg.gen_set_PC_im(cg_context.pc + 4);
486	+	else {
487	+	dg.gen_load_A0_LR();
488	+	dg.gen_set_PC_A0();
489	+	}
490	+	dg.gen_mov_32_T0_im(selector);
491	+	dg.gen_jmp(native_op_trampoline);
492	+	cg_context.done_compile = true;
493	+	status = COMPILE_EPILOGUE_OK;
494	+	break;
495	+	#endif
496	+	// Invoke NativeOp handler
497	+	if (!FN_field::test(opcode)) {
498	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
499	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
500	+	dg.gen_invoke_CPU_im(func, selector);
501	+	cg_context.done_compile = false;
502	+	status = COMPILE_CODE_OK;
503	+	}
504	+	// Otherwise, let it generate a call to execute_sheep() which
505	+	// will cause necessary updates to the program counter
506	+	break;
507		}
508	+
509	+	default: {      // EMUL_OP
510	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
511	+	#if ENABLE_NATIVE_EMUL_OP
512	+	typedef void (*emul_op_func_t)(dyngen_cpu_base);
513	+	emul_op_func_t emul_op_func = 0;
514	+	switch (emul_op) {
515	+	case OP_MICROSECONDS:
516	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
517	+	break;
518	+	case OP_IDLE_TIME:
519	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
520	+	break;
521	+	case OP_IDLE_TIME_2:
522	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
523	+	break;
524	+	}
525	+	if (emul_op_func) {
526	+	dg.gen_invoke_CPU(emul_op_func);
527	+	cg_context.done_compile = false;
528	+	status = COMPILE_CODE_OK;
529	+	break;
530	+	}
531	+	#endif
532	+	#if PPC_REENTRANT_JIT
533	+	// Try to execute EmulOp trampoline
534	+	dg.gen_set_PC_im(cg_context.pc + 4);
535	+	dg.gen_mov_32_T0_im(emul_op);
536	+	dg.gen_jmp(emul_op_trampoline);
537	+	cg_context.done_compile = true;
538	+	status = COMPILE_EPILOGUE_OK;
539	+	break;
540	+	#endif
541	+	// Invoke EmulOp handler
542	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
543	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
544	+	dg.gen_invoke_CPU_im(func, emul_op);
545	+	cg_context.done_compile = false;
546	+	status = COMPILE_CODE_OK;
547	+	break;
548	+	}
549	+	}
550	+	return status;
551	+	#endif
552	+	return COMPILE_FAILURE;
553		}
554
555	<	// Execution loop
556	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
555	>	// CPU context to preserve on interrupt
556	>	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
557		{
558	<	powerpc_cpu::execute(entry, enable_cache);
558	>	#if SAFE_INTERRUPT_PPC >= 2
559	>	cpu = _cpu;
560	>	where = _where;
561	>
562	>	// Save interrupt context
563	>	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
564	>	pc = cpu->pc();
565	>	lr = cpu->lr();
566	>	ctr = cpu->ctr();
567	>	cr = cpu->get_cr();
568	>	xer = cpu->get_xer();
569	>	#endif
570	>	}
571	>
572	>	sheepshaver_cpu::interrupt_context::~interrupt_context()
573	>	{
574	>	#if SAFE_INTERRUPT_PPC >= 2
575	>	// Check whether CPU context was preserved by interrupt
576	>	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
577	>	printf("FATAL: %s: interrupt clobbers registers\n", where);
578	>	for (int i = 0; i < 32; i++)
579	>	if (gpr[i] != cpu->gpr(i))
580	>	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
581	>	}
582	>	if (pc != cpu->pc())
583	>	printf("FATAL: %s: interrupt clobbers PC\n", where);
584	>	if (lr != cpu->lr())
585	>	printf("FATAL: %s: interrupt clobbers LR\n", where);
586	>	if (ctr != cpu->ctr())
587	>	printf("FATAL: %s: interrupt clobbers CTR\n", where);
588	>	if (cr != cpu->get_cr())
589	>	printf("FATAL: %s: interrupt clobbers CR\n", where);
590	>	if (xer != cpu->get_xer())
591	>	printf("FATAL: %s: interrupt clobbers XER\n", where);
592	>	#endif
593		}
594
595		// Handle MacOS interrupt
#	Line 258 | Line 600 | void sheepshaver_cpu::interrupt(uint32 e
600		const clock_t interrupt_start = clock();
601		#endif
602
603	<	#if !MULTICORE_CPU
603	>	#if SAFE_INTERRUPT_PPC
604	>	static int depth = 0;
605	>	if (depth != 0)
606	>	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
607	>	depth++;
608	>	#endif
609	>
610		// Save program counters and branch registers
611		uint32 saved_pc = pc();
612		uint32 saved_lr = lr();
613		uint32 saved_ctr= ctr();
614		uint32 saved_sp = gpr(1);
267	–	#endif
615
616		// Initialize stack pointer to SheepShaver alternate stack base
617	<	gpr(1) = SheepStack1Base - 64;
617	>	gpr(1) = SignalStackBase() - 64;
618
619		// Build trampoline to return from interrupt
620	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
620	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
621
622		// Prepare registers for nanokernel interrupt routine
623		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 289 | Line 636 | void sheepshaver_cpu::interrupt(uint32 e
636		gpr(1)  = KernelDataAddr;
637		gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
638		gpr(8)  = 0;
639	<	gpr(10) = (uint32)trampoline;
640	<	gpr(12) = (uint32)trampoline;
639	>	gpr(10) = trampoline.addr();
640	>	gpr(12) = trampoline.addr();
641		gpr(13) = get_cr();
642
643		// rlwimi. r7,r7,8,0,0
#	Line 304 | Line 651 | void sheepshaver_cpu::interrupt(uint32 e
651		// Enter nanokernel
652		execute(entry);
653
307	–	#if !MULTICORE_CPU
654		// Restore program counters and branch registers
655		pc() = saved_pc;
656		lr() = saved_lr;
657		ctr()= saved_ctr;
658		gpr(1) = saved_sp;
313	–	#endif
659
660		#if EMUL_TIME_STATS
661		interrupt_time += (clock() - interrupt_start);
662		#endif
663	+
664	+	#if SAFE_INTERRUPT_PPC
665	+	depth--;
666	+	#endif
667		}
668
669		// Execute 68k routine
#	Line 427 | Line 776 | uint32 sheepshaver_cpu::execute_macos_co
776		uint32 saved_ctr= ctr();
777
778		// Build trampoline with EXEC_RETURN
779	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
780	<	lr() = (uint32)trampoline;
779	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
780	>	lr() = trampoline.addr();
781
782		gpr(1) -= 64;                                                           // Create stack frame
783		uint32 proc = ReadMacInt32(tvect);                      // Get routine address
#	Line 472 | Line 821 | inline void sheepshaver_cpu::execute_ppc
821		// Save branch registers
822		uint32 saved_lr = lr();
823
824	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
825	<	lr() = (uint32)trampoline;
824	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
825	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
826	>	lr() = trampoline.addr();
827
828		execute(entry);
829
#	Line 482 | Line 832 | inline void sheepshaver_cpu::execute_ppc
832		}
833
834		// Resource Manager thunk
485	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
486	–
835		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
836		{
837		uint32 type = gpr(3);
#	Line 509 | Line 857 | inline void sheepshaver_cpu::get_resourc
857		*              SheepShaver CPU engine interface
858		**/
859
860	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
861	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
514	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
860	>	// PowerPC CPU emulator
861	>	static sheepshaver_cpu *ppc_cpu = NULL;
862
863		void FlushCodeCache(uintptr start, uintptr end)
864		{
865		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
866	<	main_cpu->invalidate_cache_range(start, end);
520	<	#if MULTICORE_CPU
521	<	interrupt_cpu->invalidate_cache_range(start, end);
522	<	#endif
523	<	}
524	<
525	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
526	<	{
527	<	#if MULTICORE_CPU
528	<	current_cpu = new_cpu;
529	<	#endif
530	<	}
531	<
532	<	static inline void cpu_pop()
533	<	{
534	<	#if MULTICORE_CPU
535	<	current_cpu = main_cpu;
536	<	#endif
866	>	ppc_cpu->invalidate_cache_range(start, end);
867		}
868
869		// Dump PPC registers
870		static void dump_registers(void)
871		{
872	<	current_cpu->dump_registers();
872	>	ppc_cpu->dump_registers();
873		}
874
875		// Dump log
876		static void dump_log(void)
877		{
878	<	current_cpu->dump_log();
878	>	ppc_cpu->dump_log();
879		}
880
881		/*
#	Line 568 | Line 898 | static sigsegv_return_t sigsegv_handler(
898		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
899
900		// Get program counter of target CPU
901	<	sheepshaver_cpu * const cpu = current_cpu;
901	>	sheepshaver_cpu * const cpu = ppc_cpu;
902		const uint32 pc = cpu->pc();
903
904		// Fault in Mac ROM or RAM?
905	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
905	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
906		if (mac_fault) {
907
908		// "VM settings" during MacOS 8 installation
#	Line 592 | Line 922 | static sigsegv_return_t sigsegv_handler(
922		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
923		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
924		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
925	+
926	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
927	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
928	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
929	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
930	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
931	+
932	+	// Ignore writes to the zero page
933	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
934	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
935
936		// Ignore all other faults, if requested
937		if (PrefsFindBool("ignoresegv"))
#	Line 604 | Line 944 | static sigsegv_return_t sigsegv_handler(
944		printf("SIGSEGV\n");
945		printf("  pc %p\n", fault_instruction);
946		printf("  ea %p\n", fault_address);
607	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
947		dump_registers();
948	<	current_cpu->dump_log();
948	>	ppc_cpu->dump_log();
949		enter_mon();
950		QuitEmulator();
951
#	Line 616 | Line 955 | static sigsegv_return_t sigsegv_handler(
955		void init_emul_ppc(void)
956		{
957		// Initialize main CPU emulator
958	<	main_cpu = new sheepshaver_cpu();
959	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
958	>	ppc_cpu = new sheepshaver_cpu();
959	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
960	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
961		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
962
623	–	#if MULTICORE_CPU
624	–	// Initialize alternate CPU emulator to handle interrupts
625	–	interrupt_cpu = new sheepshaver_cpu();
626	–	#endif
627	–
963		// Install the handler for SIGSEGV
964		sigsegv_install_handler(sigsegv_handler);
965
#	Line 669 | Line 1004 | void exit_emul_ppc(void)
1004		printf("\n");
1005		#endif
1006
1007	<	delete main_cpu;
673	<	#if MULTICORE_CPU
674	<	delete interrupt_cpu;
675	<	#endif
1007	>	delete ppc_cpu;
1008		}
1009
1010	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
1011	+	// Initialize EmulOp trampolines
1012	+	void init_emul_op_trampolines(basic_dyngen & dg)
1013	+	{
1014	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
1015	+	func_t func;
1016	+
1017	+	// EmulOp
1018	+	emul_op_trampoline = dg.gen_start();
1019	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
1020	+	dg.gen_invoke_CPU_T0(func);
1021	+	dg.gen_exec_return();
1022	+	dg.gen_end();
1023	+
1024	+	// NativeOp
1025	+	native_op_trampoline = dg.gen_start();
1026	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
1027	+	dg.gen_invoke_CPU_T0(func);
1028	+	dg.gen_exec_return();
1029	+	dg.gen_end();
1030	+
1031	+	D(bug("EmulOp trampoline:   %p\n", emul_op_trampoline));
1032	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
1033	+	}
1034	+	#endif
1035	+
1036		/*
1037		*  Emulation loop
1038		*/
1039
1040		void emul_ppc(uint32 entry)
1041		{
1042	<	current_cpu = main_cpu;
1043	<	#if DEBUG
686	<	current_cpu->start_log();
1042	>	#if 0
1043	>	ppc_cpu->start_log();
1044		#endif
1045		// start emulation loop and enable code translation or caching
1046	<	current_cpu->execute(entry, true);
1046	>	ppc_cpu->execute(entry);
1047		}
1048
1049		/*
1050		*  Handle PowerPC interrupt
1051		*/
1052
696	–	#if ASYNC_IRQ
697	–	void HandleInterrupt(void)
698	–	{
699	–	main_cpu->handle_interrupt();
700	–	}
701	–	#else
1053		void TriggerInterrupt(void)
1054		{
1055		#if 0
1056		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
1057		#else
1058		// Trigger interrupt to main cpu only
1059	<	if (main_cpu)
1060	<	main_cpu->trigger_interrupt();
1059	>	if (ppc_cpu)
1060	>	ppc_cpu->trigger_interrupt();
1061		#endif
1062		}
712	–	#endif
1063
1064		void sheepshaver_cpu::handle_interrupt(void)
1065		{
#	Line 721 | Line 1071 | void sheepshaver_cpu::handle_interrupt(v
1071		if (InterruptFlags == 0)
1072		return;
1073
1074	+	// Current interrupt nest level
1075	+	static int interrupt_depth = 0;
1076	+	++interrupt_depth;
1077	+
1078		// Disable MacOS stack sniffer
1079		WriteMacInt32(0x110, 0);
1080
#	Line 728 | Line 1082 | void sheepshaver_cpu::handle_interrupt(v
1082		switch (ReadMacInt32(XLM_RUN_MODE)) {
1083		case MODE_68K:
1084		// 68k emulator active, trigger 68k interrupt level 1
731	–	assert(current_cpu == main_cpu);
1085		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1086		set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
1087		break;
#	Line 736 | Line 1089 | void sheepshaver_cpu::handle_interrupt(v
1089		#if INTERRUPTS_IN_NATIVE_MODE
1090		case MODE_NATIVE:
1091		// 68k emulator inactive, in nanokernel?
1092	<	assert(current_cpu == main_cpu);
1093	<	if (gpr(1) != KernelDataAddr) {
1092	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1093	>	interrupt_context ctx(this, "PowerPC mode");
1094	>
1095		// Prepare for 68k interrupt level 1
1096		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1097		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 746 | Line 1100 | void sheepshaver_cpu::handle_interrupt(v
1100
1101		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1102		DisableInterrupt();
749	–	cpu_push(interrupt_cpu);
1103		if (ROMType == ROMTYPE_NEWWORLD)
1104	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
1104	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1105		else
1106	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
754	<	cpu_pop();
1106	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1107		}
1108		break;
1109		#endif
#	Line 760 | Line 1112 | void sheepshaver_cpu::handle_interrupt(v
1112		case MODE_EMUL_OP:
1113		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1114		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1115	+	interrupt_context ctx(this, "68k mode");
1116		#if 1
1117		// Execute full 68k interrupt routine
1118		M68kRegisters r;
#	Line 781 | Line 1134 | void sheepshaver_cpu::handle_interrupt(v
1134		if (InterruptFlags & INTFLAG_VIA) {
1135		ClearInterruptFlag(INTFLAG_VIA);
1136		ADBInterrupt();
1137	<	ExecutePPC(VideoVBL);
1137	>	ExecuteNative(NATIVE_VIDEO_VBL);
1138		}
1139		}
1140		#endif
#	Line 789 | Line 1142 | void sheepshaver_cpu::handle_interrupt(v
1142		break;
1143		#endif
1144		}
792	–	}
1145
1146	<	/*
1147	<	*  Execute NATIVE_OP opcode (called by PowerPC emulator)
1148	<	*/
797	<
798	<	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
799	<	tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
800	<
801	<	// FIXME: Make sure 32-bit relocations are used
802	<	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
803	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
804	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
805	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
806	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
807	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
808	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
809	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
810	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
811	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
812	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
813	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
814	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
815	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
816	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
817	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
818	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
819	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
820	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
821	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
822	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
823	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
824	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
825	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
826	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
827	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
828	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
829	<	};
1146	>	// We are done with this interrupt
1147	>	--interrupt_depth;
1148	>	}
1149
1150		static void get_resource(void);
1151		static void get_1_resource(void);
#	Line 834 | Line 1153 | static void get_ind_resource(void);
1153		static void get_1_ind_resource(void);
1154		static void r_get_resource(void);
1155
1156	<	#define GPR(REG) current_cpu->gpr(REG)
1157	<
839	<	static void NativeOp(int selector)
1156	>	// Execute NATIVE_OP routine
1157	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1158		{
1159		#if EMUL_TIME_STATS
1160		native_exec_count++;
#	Line 854 | Line 1172 | static void NativeOp(int selector)
1172		VideoVBL();
1173		break;
1174		case NATIVE_VIDEO_DO_DRIVER_IO:
1175	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
1176	<	(void *)GPR(5), GPR(6), GPR(7));
1175	>	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1176	>	(void *)gpr(5), gpr(6), gpr(7));
1177		break;
1178		#ifdef WORDS_BIGENDIAN
1179		case NATIVE_ETHER_IRQ:
1180		EtherIRQ();
1181		break;
1182		case NATIVE_ETHER_INIT:
1183	<	GPR(3) = InitStreamModule((void *)GPR(3));
1183	>	gpr(3) = InitStreamModule((void *)gpr(3));
1184		break;
1185		case NATIVE_ETHER_TERM:
1186		TerminateStreamModule();
1187		break;
1188		case NATIVE_ETHER_OPEN:
1189	<	GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1189	>	gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1190		break;
1191		case NATIVE_ETHER_CLOSE:
1192	<	GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5));
1192	>	gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5));
1193		break;
1194		case NATIVE_ETHER_WPUT:
1195	<	GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4));
1195	>	gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4));
1196		break;
1197		case NATIVE_ETHER_RSRV:
1198	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1198	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1199		break;
1200		#else
1201		case NATIVE_ETHER_INIT:
1202		// FIXME: needs more complicated thunks
1203	<	GPR(3) = false;
1203	>	gpr(3) = false;
1204		break;
1205		#endif
1206	+	case NATIVE_SYNC_HOOK:
1207	+	gpr(3) = NQD_sync_hook(gpr(3));
1208	+	break;
1209	+	case NATIVE_BITBLT_HOOK:
1210	+	gpr(3) = NQD_bitblt_hook(gpr(3));
1211	+	break;
1212	+	case NATIVE_BITBLT:
1213	+	NQD_bitblt(gpr(3));
1214	+	break;
1215	+	case NATIVE_FILLRECT_HOOK:
1216	+	gpr(3) = NQD_fillrect_hook(gpr(3));
1217	+	break;
1218	+	case NATIVE_INVRECT:
1219	+	NQD_invrect(gpr(3));
1220	+	break;
1221	+	case NATIVE_FILLRECT:
1222	+	NQD_fillrect(gpr(3));
1223	+	break;
1224		case NATIVE_SERIAL_NOTHING:
1225		case NATIVE_SERIAL_OPEN:
1226		case NATIVE_SERIAL_PRIME_IN:
#	Line 902 | Line 1238 | static void NativeOp(int selector)
1238		SerialStatus,
1239		SerialClose
1240		};
1241	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1241	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1242		break;
1243		}
1244		case NATIVE_GET_RESOURCE:
#	Line 912 | Line 1248 | static void NativeOp(int selector)
1248		case NATIVE_R_GET_RESOURCE: {
1249		typedef void (*GetResourceCallback)(void);
1250		static const GetResourceCallback get_resource_callbacks[] = {
1251	<	get_resource,
1252	<	get_1_resource,
1253	<	get_ind_resource,
1254	<	get_1_ind_resource,
1255	<	r_get_resource
1251	>	::get_resource,
1252	>	::get_1_resource,
1253	>	::get_ind_resource,
1254	>	::get_1_ind_resource,
1255	>	::r_get_resource
1256		};
1257		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1258		break;
#	Line 928 | Line 1264 | static void NativeOp(int selector)
1264		EnableInterrupt();
1265		break;
1266		case NATIVE_MAKE_EXECUTABLE:
1267	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1267	>	MakeExecutable(0, (void *)gpr(4), gpr(5));
1268	>	break;
1269	>	case NATIVE_CHECK_LOAD_INVOC:
1270	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1271		break;
1272		default:
1273		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 942 | Line 1281 | static void NativeOp(int selector)
1281		}
1282
1283		/*
945	–	*  Execute native subroutine (LR must contain return address)
946	–	*/
947	–
948	–	void ExecuteNative(int selector)
949	–	{
950	–	uint32 tvect[2];
951	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
952	–	tvect[1] = 0; // Fake TVECT
953	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
954	–	M68kRegisters r;
955	–	Execute68k((uint32)&desc, &r);
956	–	}
957	–
958	–	/*
1284		*  Execute 68k subroutine (must be ended with EXEC_RETURN)
1285		*  This must only be called by the emul_thread when in EMUL_OP mode
1286		*  r->a[7] is unused, the routine runs on the caller's stack
#	Line 963 | Line 1288 | void ExecuteNative(int selector)
1288
1289		void Execute68k(uint32 pc, M68kRegisters *r)
1290		{
1291	<	current_cpu->execute_68k(pc, r);
1291	>	ppc_cpu->execute_68k(pc, r);
1292		}
1293
1294		/*
#	Line 973 | Line 1298 | void Execute68k(uint32 pc, M68kRegisters
1298
1299		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1300		{
1301	<	uint16 proc[2];
1302	<	proc[0] = htons(trap);
1303	<	proc[1] = htons(M68K_RTS);
1304	<	Execute68k((uint32)proc, r);
1301	>	SheepVar proc_var(4);
1302	>	uint32 proc = proc_var.addr();
1303	>	WriteMacInt16(proc, trap);
1304	>	WriteMacInt16(proc + 2, M68K_RTS);
1305	>	Execute68k(proc, r);
1306		}
1307
1308		/*
#	Line 985 | Line 1311 | void Execute68kTrap(uint16 trap, M68kReg
1311
1312		uint32 call_macos(uint32 tvect)
1313		{
1314	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1314	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1315		}
1316
1317		uint32 call_macos1(uint32 tvect, uint32 arg1)
1318		{
1319		const uint32 args[] = { arg1 };
1320	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1320	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1321		}
1322
1323		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1324		{
1325		const uint32 args[] = { arg1, arg2 };
1326	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1326	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1327		}
1328
1329		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1330		{
1331		const uint32 args[] = { arg1, arg2, arg3 };
1332	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1332	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1333		}
1334
1335		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1336		{
1337		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1338	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1338	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1339		}
1340
1341		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1342		{
1343		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1344	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1344	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1345		}
1346
1347		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1348		{
1349		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1350	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1350	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1351		}
1352
1353		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1354		{
1355		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1356	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1356	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1357		}
1358
1359		/*
#	Line 1036 | Line 1362 | uint32 call_macos7(uint32 tvect, uint32
1362
1363		void get_resource(void)
1364		{
1365	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1365	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1366		}
1367
1368		void get_1_resource(void)
1369		{
1370	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1370	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1371		}
1372
1373		void get_ind_resource(void)
1374		{
1375	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1375	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1376		}
1377
1378		void get_1_ind_resource(void)
1379		{
1380	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1380	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1381		}
1382
1383		void r_get_resource(void)
1384		{
1385	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1385	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1386		}

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