ViewVC Help

View File | Revision Log | Show Annotations | Revision Graph | Root Listing

root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs.
Revision 1.37 by gbeauche, 2004-05-15T17:26:28Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 31 | Line 31
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33		#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45
46		#if ENABLE_MON
47		#include "mon.h"
#	Line 72 | Line 75 | static void enter_mon(void)
75		#endif
76		}
77
78	+	// From main_*.cpp
79	+	extern uintptr SignalStackBase();
80	+
81	+	// From rsrc_patches.cpp
82	+	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
83	+
84	+	// PowerPC EmulOp to exit from emulation looop
85	+	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
86	+
87		// Enable multicore (main/interrupts) cpu emulation?
88		#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
89
90	+	// Enable interrupt routine safety checks?
91	+	#define SAFE_INTERRUPT_PPC 1
92	+
93		// Enable Execute68k() safety checks?
94		#define SAFE_EXEC_68K 1
95
#	Line 87 | Line 102 | static void enter_mon(void)
102		// Interrupts in native mode?
103		#define INTERRUPTS_IN_NATIVE_MODE 1
104
105	+	// Enable native EMUL_OPs to be run without a mode switch
106	+	#define ENABLE_NATIVE_EMUL_OP 1
107	+
108		// Pointer to Kernel Data
109		static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110
111		// SIGSEGV handler
112		static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113
114	+	// JIT Compiler enabled?
115	+	static inline bool enable_jit_p()
116	+	{
117	+	return PrefsFindBool("jit");
118	+	}
119	+
120
121		/**
122		*              PowerPC emulator glue with special 'sheep' opcodes
#	Line 109 | Line 133 | class sheepshaver_cpu
133		void init_decoder();
134		void execute_sheep(uint32 opcode);
135
136	+	// Filter out EMUL_OP routines that only call native code
137	+	bool filter_execute_emul_op(uint32 emul_op);
138	+
139	+	// "Native" EMUL_OP routines
140	+	void execute_emul_op_microseconds();
141	+	void execute_emul_op_idle_time_1();
142	+	void execute_emul_op_idle_time_2();
143	+
144		public:
145
146		// Constructor
147		sheepshaver_cpu();
148
149	<	// Condition Register accessors
149	>	// CR & XER accessors
150		uint32 get_cr() const           { return cr().get(); }
151		void set_cr(uint32 v)           { cr().set(v); }
152	+	uint32 get_xer() const          { return xer().get(); }
153	+	void set_xer(uint32 v)          { xer().set(v); }
154
155	<	// Execution loop
156	<	void execute(uint32 entry, bool enable_cache = false);
155	>	// Execute EMUL_OP routine
156	>	void execute_emul_op(uint32 emul_op);
157
158		// Execute 68k routine
159		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 130 | Line 164 | public:
164		// Execute MacOS/PPC code
165		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
166
167	+	// Compile one instruction
168	+	virtual bool compile1(codegen_context_t & cg_context);
169	+
170		// Resource manager thunk
171		void get_resource(uint32 old_get_resource);
172
#	Line 137 | Line 174 | public:
174		void interrupt(uint32 entry);
175		void handle_interrupt();
176
140	–	// Lazy memory allocator (one item at a time)
141	–	void *operator new(size_t size)
142	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
143	–	void operator delete(void *p)
144	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
145	–	// FIXME: really make surre array allocation fail at link time?
146	–	void *operator new[](size_t);
147	–	void operator delete[](void *p);
148	–
177		// Make sure the SIGSEGV handler can access CPU registers
178		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
179		};
180
181	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
181	>	// Memory allocator returning areas aligned on 16-byte boundaries
182	>	void *operator new(size_t size)
183	>	{
184	>	void *p;
185	>
186	>	#if defined(HAVE_POSIX_MEMALIGN)
187	>	if (posix_memalign(&p, 16, size) != 0)
188	>	throw std::bad_alloc();
189	>	#elif defined(HAVE_MEMALIGN)
190	>	p = memalign(16, size);
191	>	#elif defined(HAVE_VALLOC)
192	>	p = valloc(size); // page-aligned!
193	>	#else
194	>	/* XXX: handle padding ourselves */
195	>	p = malloc(size);
196	>	#endif
197	>
198	>	return p;
199	>	}
200	>
201	>	void operator delete(void *p)
202	>	{
203	>	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
204	>	#if defined(__GLIBC__)
205	>	// this is known to work only with GNU libc
206	>	free(p);
207	>	#endif
208	>	#else
209	>	free(p);
210	>	#endif
211	>	}
212
213		sheepshaver_cpu::sheepshaver_cpu()
214	<	: powerpc_cpu()
214	>	: powerpc_cpu(enable_jit_p())
215		{
216		init_decoder();
217		}
218
219		void sheepshaver_cpu::init_decoder()
220		{
163	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
164	–	static bool initialized = false;
165	–	if (initialized)
166	–	return;
167	–	initialized = true;
168	–	#endif
169	–
221		static const instr_info_t sheep_ii_table[] = {
222		{ "sheep",
223		(execute_pmf)&sheepshaver_cpu::execute_sheep,
#	Line 189 | Line 240 | void sheepshaver_cpu::init_decoder()
240		static void NativeOp(int selector);
241
242		/*              NativeOp instruction format:
243	<	+------------+--------------------------+--+----------+------------+
244	<	|      6     |                          |FN|    OP    |      2     |
245	<	+------------+--------------------------+--+----------+------------+
246	<	0         5 |6                       19 20 21      25 26        31
243	>	+------------+-------------------------+--+-----------+------------+
244	>	|      6     |                         |FN|    OP     |      2     |
245	>	+------------+-------------------------+--+-----------+------------+
246	>	0         5 |6                      18 19 20      25 26        31
247		*/
248
249	<	typedef bit_field< 20, 20 > FN_field;
250	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
249	>	typedef bit_field< 19, 19 > FN_field;
250	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
251		typedef bit_field< 26, 31 > EMUL_OP_field;
252
253	+	// "Native" EMUL_OP routines
254	+	#define GPR_A(REG) gpr(16 + (REG))
255	+	#define GPR_D(REG) gpr( 8 + (REG))
256	+
257	+	void sheepshaver_cpu::execute_emul_op_microseconds()
258	+	{
259	+	Microseconds(GPR_A(0), GPR_D(0));
260	+	}
261	+
262	+	void sheepshaver_cpu::execute_emul_op_idle_time_1()
263	+	{
264	+	// Sleep if no events pending
265	+	if (ReadMacInt32(0x14c) == 0)
266	+	Delay_usec(16667);
267	+	GPR_A(0) = ReadMacInt32(0x2b6);
268	+	}
269	+
270	+	void sheepshaver_cpu::execute_emul_op_idle_time_2()
271	+	{
272	+	// Sleep if no events pending
273	+	if (ReadMacInt32(0x14c) == 0)
274	+	Delay_usec(16667);
275	+	GPR_D(0) = (uint32)-2;
276	+	}
277	+
278	+	// Filter out EMUL_OP routines that only call native code
279	+	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
280	+	{
281	+	switch (emul_op) {
282	+	case OP_MICROSECONDS:
283	+	execute_emul_op_microseconds();
284	+	return true;
285	+	case OP_IDLE_TIME:
286	+	execute_emul_op_idle_time_1();
287	+	return true;
288	+	case OP_IDLE_TIME_2:
289	+	execute_emul_op_idle_time_2();
290	+	return true;
291	+	}
292	+	return false;
293	+	}
294	+
295	+	// Execute EMUL_OP routine
296	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
297	+	{
298	+	#if ENABLE_NATIVE_EMUL_OP
299	+	// First, filter out EMUL_OPs that can be executed without a mode switch
300	+	if (filter_execute_emul_op(emul_op))
301	+	return;
302	+	#endif
303	+
304	+	M68kRegisters r68;
305	+	WriteMacInt32(XLM_68K_R25, gpr(25));
306	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
307	+	for (int i = 0; i < 8; i++)
308	+	r68.d[i] = gpr(8 + i);
309	+	for (int i = 0; i < 7; i++)
310	+	r68.a[i] = gpr(16 + i);
311	+	r68.a[7] = gpr(1);
312	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
313	+	uint32 saved_xer = get_xer();
314	+	EmulOp(&r68, gpr(24), emul_op);
315	+	set_cr(saved_cr);
316	+	set_xer(saved_xer);
317	+	for (int i = 0; i < 8; i++)
318	+	gpr(8 + i) = r68.d[i];
319	+	for (int i = 0; i < 7; i++)
320	+	gpr(16 + i) = r68.a[i];
321	+	gpr(1) = r68.a[7];
322	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
323	+	}
324	+
325		// Execute SheepShaver instruction
326		void sheepshaver_cpu::execute_sheep(uint32 opcode)
327		{
#	Line 222 | Line 345 | void sheepshaver_cpu::execute_sheep(uint
345		pc() += 4;
346		break;
347
348	<	default: {      // EMUL_OP
349	<	M68kRegisters r68;
227	<	WriteMacInt32(XLM_68K_R25, gpr(25));
228	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
229	<	for (int i = 0; i < 8; i++)
230	<	r68.d[i] = gpr(8 + i);
231	<	for (int i = 0; i < 7; i++)
232	<	r68.a[i] = gpr(16 + i);
233	<	r68.a[7] = gpr(1);
234	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
235	<	for (int i = 0; i < 8; i++)
236	<	gpr(8 + i) = r68.d[i];
237	<	for (int i = 0; i < 7; i++)
238	<	gpr(16 + i) = r68.a[i];
239	<	gpr(1) = r68.a[7];
240	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
348	>	default:        // EMUL_OP
349	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
350		pc() += 4;
351		break;
352		}
244	–	}
353		}
354
355	<	// Execution loop
356	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
355	>	// Compile one instruction
356	>	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
357		{
358	<	powerpc_cpu::execute(entry, enable_cache);
358	>	#if PPC_ENABLE_JIT
359	>	const instr_info_t *ii = cg_context.instr_info;
360	>	if (ii->mnemo != PPC_I(SHEEP))
361	>	return false;
362	>
363	>	bool compiled = false;
364	>	powerpc_dyngen & dg = cg_context.codegen;
365	>	uint32 opcode = cg_context.opcode;
366	>
367	>	switch (opcode & 0x3f) {
368	>	case 0:         // EMUL_RETURN
369	>	dg.gen_invoke(QuitEmulator);
370	>	compiled = true;
371	>	break;
372	>
373	>	case 1:         // EXEC_RETURN
374	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
375	>	compiled = true;
376	>	break;
377	>
378	>	case 2: {       // EXEC_NATIVE
379	>	uint32 selector = NATIVE_OP_field::extract(opcode);
380	>	switch (selector) {
381	>	case NATIVE_PATCH_NAME_REGISTRY:
382	>	dg.gen_invoke(DoPatchNameRegistry);
383	>	compiled = true;
384	>	break;
385	>	case NATIVE_VIDEO_INSTALL_ACCEL:
386	>	dg.gen_invoke(VideoInstallAccel);
387	>	compiled = true;
388	>	break;
389	>	case NATIVE_VIDEO_VBL:
390	>	dg.gen_invoke(VideoVBL);
391	>	compiled = true;
392	>	break;
393	>	case NATIVE_GET_RESOURCE:
394	>	case NATIVE_GET_1_RESOURCE:
395	>	case NATIVE_GET_IND_RESOURCE:
396	>	case NATIVE_GET_1_IND_RESOURCE:
397	>	case NATIVE_R_GET_RESOURCE: {
398	>	static const uint32 get_resource_ptr[] = {
399	>	XLM_GET_RESOURCE,
400	>	XLM_GET_1_RESOURCE,
401	>	XLM_GET_IND_RESOURCE,
402	>	XLM_GET_1_IND_RESOURCE,
403	>	XLM_R_GET_RESOURCE
404	>	};
405	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
406	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
407	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
408	>	dg.gen_invoke_CPU_im(func, old_get_resource);
409	>	compiled = true;
410	>	break;
411	>	}
412	>	case NATIVE_DISABLE_INTERRUPT:
413	>	dg.gen_invoke(DisableInterrupt);
414	>	compiled = true;
415	>	break;
416	>	case NATIVE_ENABLE_INTERRUPT:
417	>	dg.gen_invoke(EnableInterrupt);
418	>	compiled = true;
419	>	break;
420	>	case NATIVE_CHECK_LOAD_INVOC:
421	>	dg.gen_load_T0_GPR(3);
422	>	dg.gen_load_T1_GPR(4);
423	>	dg.gen_se_16_32_T1();
424	>	dg.gen_load_T2_GPR(5);
425	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
426	>	compiled = true;
427	>	break;
428	>	case NATIVE_BITBLT:
429	>	dg.gen_load_T0_GPR(3);
430	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
431	>	compiled = true;
432	>	break;
433	>	case NATIVE_INVRECT:
434	>	dg.gen_load_T0_GPR(3);
435	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
436	>	compiled = true;
437	>	break;
438	>	case NATIVE_FILLRECT:
439	>	dg.gen_load_T0_GPR(3);
440	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
441	>	compiled = true;
442	>	break;
443	>	}
444	>	if (FN_field::test(opcode)) {
445	>	if (compiled) {
446	>	dg.gen_load_A0_LR();
447	>	dg.gen_set_PC_A0();
448	>	}
449	>	cg_context.done_compile = true;
450	>	}
451	>	else
452	>	cg_context.done_compile = false;
453	>	break;
454	>	}
455	>
456	>	default: {      // EMUL_OP
457	>	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
458	>	#if ENABLE_NATIVE_EMUL_OP
459	>	typedef void (*emul_op_func_t)(dyngen_cpu_base);
460	>	emul_op_func_t emul_op_func = 0;
461	>	switch (emul_op) {
462	>	case OP_MICROSECONDS:
463	>	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
464	>	break;
465	>	case OP_IDLE_TIME:
466	>	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
467	>	break;
468	>	case OP_IDLE_TIME_2:
469	>	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
470	>	break;
471	>	}
472	>	if (emul_op_func) {
473	>	dg.gen_invoke_CPU(emul_op_func);
474	>	cg_context.done_compile = false;
475	>	compiled = true;
476	>	break;
477	>	}
478	>	#endif
479	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
480	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
481	>	dg.gen_invoke_CPU_im(func, emul_op);
482	>	cg_context.done_compile = false;
483	>	compiled = true;
484	>	break;
485	>	}
486	>	}
487	>	return compiled;
488	>	#endif
489	>	return false;
490		}
491
492		// Handle MacOS interrupt
#	Line 258 | Line 497 | void sheepshaver_cpu::interrupt(uint32 e
497		const clock_t interrupt_start = clock();
498		#endif
499
500	+	#if SAFE_INTERRUPT_PPC
501	+	static int depth = 0;
502	+	if (depth != 0)
503	+	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
504	+	depth++;
505	+	#endif
506	+	#if SAFE_INTERRUPT_PPC >= 2
507	+	uint32 saved_regs[32];
508	+	memcpy(&saved_regs[0], &gpr(0), sizeof(saved_regs));
509	+	#endif
510	+
511		#if !MULTICORE_CPU
512		// Save program counters and branch registers
513		uint32 saved_pc = pc();
#	Line 267 | Line 517 | void sheepshaver_cpu::interrupt(uint32 e
517		#endif
518
519		// Initialize stack pointer to SheepShaver alternate stack base
520	<	gpr(1) = SheepStack1Base - 64;
520	>	gpr(1) = SignalStackBase() - 64;
521
522		// Build trampoline to return from interrupt
523	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
523	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
524
525		// Prepare registers for nanokernel interrupt routine
526		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 289 | Line 539 | void sheepshaver_cpu::interrupt(uint32 e
539		gpr(1)  = KernelDataAddr;
540		gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
541		gpr(8)  = 0;
542	<	gpr(10) = (uint32)trampoline;
543	<	gpr(12) = (uint32)trampoline;
542	>	gpr(10) = trampoline.addr();
543	>	gpr(12) = trampoline.addr();
544		gpr(13) = get_cr();
545
546		// rlwimi. r7,r7,8,0,0
#	Line 315 | Line 565 | void sheepshaver_cpu::interrupt(uint32 e
565		#if EMUL_TIME_STATS
566		interrupt_time += (clock() - interrupt_start);
567		#endif
568	+
569	+	#if SAFE_INTERRUPT_PPC >= 2
570	+	if (memcmp(&saved_regs[0], &gpr(0), sizeof(saved_regs)) != 0)
571	+	printf("FATAL: dirty PowerPC registers\n");
572	+	#endif
573	+	#if SAFE_INTERRUPT_PPC
574	+	depth--;
575	+	#endif
576		}
577
578		// Execute 68k routine
#	Line 427 | Line 685 | uint32 sheepshaver_cpu::execute_macos_co
685		uint32 saved_ctr= ctr();
686
687		// Build trampoline with EXEC_RETURN
688	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
689	<	lr() = (uint32)trampoline;
688	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
689	>	lr() = trampoline.addr();
690
691		gpr(1) -= 64;                                                           // Create stack frame
692		uint32 proc = ReadMacInt32(tvect);                      // Get routine address
#	Line 472 | Line 730 | inline void sheepshaver_cpu::execute_ppc
730		// Save branch registers
731		uint32 saved_lr = lr();
732
733	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
734	<	lr() = (uint32)trampoline;
733	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
734	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
735	>	lr() = trampoline.addr();
736
737		execute(entry);
738
#	Line 482 | Line 741 | inline void sheepshaver_cpu::execute_ppc
741		}
742
743		// Resource Manager thunk
485	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
486	–
744		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
745		{
746		uint32 type = gpr(3);
#	Line 593 | Line 850 | static sigsegv_return_t sigsegv_handler(
850		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
851		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
852
853	+	// Ignore writes to the zero page
854	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
855	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
856	+
857		// Ignore all other faults, if requested
858		if (PrefsFindBool("ignoresegv"))
859		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
#	Line 618 | Line 879 | void init_emul_ppc(void)
879		// Initialize main CPU emulator
880		main_cpu = new sheepshaver_cpu();
881		main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
882	+	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
883		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
884
885		#if MULTICORE_CPU
#	Line 682 | Line 944 | void exit_emul_ppc(void)
944		void emul_ppc(uint32 entry)
945		{
946		current_cpu = main_cpu;
947	<	#if DEBUG
947	>	#if 0
948		current_cpu->start_log();
949		#endif
950		// start emulation loop and enable code translation or caching
951	<	current_cpu->execute(entry, true);
951	>	current_cpu->execute(entry);
952		}
953
954		/*
#	Line 781 | Line 1043 | void sheepshaver_cpu::handle_interrupt(v
1043		if (InterruptFlags & INTFLAG_VIA) {
1044		ClearInterruptFlag(INTFLAG_VIA);
1045		ADBInterrupt();
1046	<	ExecutePPC(VideoVBL);
1046	>	ExecuteNative(NATIVE_VIDEO_VBL);
1047		}
1048		}
1049		#endif
#	Line 791 | Line 1053 | void sheepshaver_cpu::handle_interrupt(v
1053		}
1054		}
1055
794	–	/*
795	–	*  Execute NATIVE_OP opcode (called by PowerPC emulator)
796	–	*/
797	–
798	–	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
799	–	tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
800	–
801	–	// FIXME: Make sure 32-bit relocations are used
802	–	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
803	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
804	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
805	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
806	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
807	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
808	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
809	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
810	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
811	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
812	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
813	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
814	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
815	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
816	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
817	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
818	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
819	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
820	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
821	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
822	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
823	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
824	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
825	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
826	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
827	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
828	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
829	–	};
830	–
1056		static void get_resource(void);
1057		static void get_1_resource(void);
1058		static void get_ind_resource(void);
#	Line 885 | Line 1110 | static void NativeOp(int selector)
1110		GPR(3) = false;
1111		break;
1112		#endif
1113	+	case NATIVE_SYNC_HOOK:
1114	+	GPR(3) = NQD_sync_hook(GPR(3));
1115	+	break;
1116	+	case NATIVE_BITBLT_HOOK:
1117	+	GPR(3) = NQD_bitblt_hook(GPR(3));
1118	+	break;
1119	+	case NATIVE_BITBLT:
1120	+	NQD_bitblt(GPR(3));
1121	+	break;
1122	+	case NATIVE_FILLRECT_HOOK:
1123	+	GPR(3) = NQD_fillrect_hook(GPR(3));
1124	+	break;
1125	+	case NATIVE_INVRECT:
1126	+	NQD_invrect(GPR(3));
1127	+	break;
1128	+	case NATIVE_FILLRECT:
1129	+	NQD_fillrect(GPR(3));
1130	+	break;
1131		case NATIVE_SERIAL_NOTHING:
1132		case NATIVE_SERIAL_OPEN:
1133		case NATIVE_SERIAL_PRIME_IN:
#	Line 930 | Line 1173 | static void NativeOp(int selector)
1173		case NATIVE_MAKE_EXECUTABLE:
1174		MakeExecutable(0, (void *)GPR(4), GPR(5));
1175		break;
1176	+	case NATIVE_CHECK_LOAD_INVOC:
1177	+	check_load_invoc(GPR(3), GPR(4), GPR(5));
1178	+	break;
1179		default:
1180		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1181		QuitEmulator();
#	Line 942 | Line 1188 | static void NativeOp(int selector)
1188		}
1189
1190		/*
945	–	*  Execute native subroutine (LR must contain return address)
946	–	*/
947	–
948	–	void ExecuteNative(int selector)
949	–	{
950	–	uint32 tvect[2];
951	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
952	–	tvect[1] = 0; // Fake TVECT
953	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
954	–	M68kRegisters r;
955	–	Execute68k((uint32)&desc, &r);
956	–	}
957	–
958	–	/*
1191		*  Execute 68k subroutine (must be ended with EXEC_RETURN)
1192		*  This must only be called by the emul_thread when in EMUL_OP mode
1193		*  r->a[7] is unused, the routine runs on the caller's stack
#	Line 973 | Line 1205 | void Execute68k(uint32 pc, M68kRegisters
1205
1206		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1207		{
1208	<	uint16 proc[2];
1209	<	proc[0] = htons(trap);
1210	<	proc[1] = htons(M68K_RTS);
1211	<	Execute68k((uint32)proc, r);
1208	>	SheepVar proc_var(4);
1209	>	uint32 proc = proc_var.addr();
1210	>	WriteMacInt16(proc, trap);
1211	>	WriteMacInt16(proc + 2, M68K_RTS);
1212	>	Execute68k(proc, r);
1213		}
1214
1215		/*

Diff Legend

–	Removed lines
+	Added lines
<	Changed lines
>	Changed lines