[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs.
Revision 1.36 by gbeauche, 2004-05-12T15:54:23Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 31 \| Line 31
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33		#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
#	Line 39 \| Line 40
40		#include "ether.h"
41
42		#include <stdio.h>
43	+	#include <stdlib.h>
44
45		#if ENABLE_MON
46		#include "mon.h"
#	Line 72 \| Line 74 \| static void enter_mon(void)
74		#endif
75		}
76
77	+	// From main_*.cpp
78	+	extern uintptr SignalStackBase();
79	+
80	+	// From rsrc_patches.cpp
81	+	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
82	+
83	+	// PowerPC EmulOp to exit from emulation looop
84	+	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
85	+
86		// Enable multicore (main/interrupts) cpu emulation?
87		#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
88
89	+	// Enable interrupt routine safety checks?
90	+	#define SAFE_INTERRUPT_PPC 1
91	+
92		// Enable Execute68k() safety checks?
93		#define SAFE_EXEC_68K 1
94
#	Line 93 \| Line 107 \| *static KernelData const kernel_data =**
107		// SIGSEGV handler
108		static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
109
110	+	// JIT Compiler enabled?
111	+	static inline bool enable_jit_p()
112	+	{
113	+	return PrefsFindBool("jit");
114	+	}
115	+
116
117		/**
118		* PowerPC emulator glue with special 'sheep' opcodes
#	Line 114 \| Line 134 \| public:
134		// Constructor
135		sheepshaver_cpu();
136
137	<	// Condition Register accessors
137	>	// CR & XER accessors
138		uint32 get_cr() const { return cr().get(); }
139		void set_cr(uint32 v) { cr().set(v); }
140	+	uint32 get_xer() const { return xer().get(); }
141	+	void set_xer(uint32 v) { xer().set(v); }
142
143	<	// Execution loop
144	<	void execute(uint32 entry, bool enable_cache = false);
143	>	// Execute EMUL_OP routine
144	>	void execute_emul_op(uint32 emul_op);
145
146		// Execute 68k routine
147		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 130 \| Line 152 \| public:
152		// Execute MacOS/PPC code
153		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
154
155	+	// Compile one instruction
156	+	virtual bool compile1(codegen_context_t & cg_context);
157	+
158		// Resource manager thunk
159		void get_resource(uint32 old_get_resource);
160
#	Line 137 \| Line 162 \| public:
162		void interrupt(uint32 entry);
163		void handle_interrupt();
164
140	–	// Lazy memory allocator (one item at a time)
141	–	void *operator new(size_t size)
142	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
143	–	void operator delete(void *p)
144	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
145	–	// FIXME: really make surre array allocation fail at link time?
146	–	void *operator new[](size_t);
147	–	void operator delete[](void *p);
148	–
165		// Make sure the SIGSEGV handler can access CPU registers
166		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
167		};
168
169	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
169	>	// Memory allocator returning areas aligned on 16-byte boundaries
170	>	void *operator new(size_t size)
171	>	{
172	>	void *p;
173	>
174	>	#if defined(HAVE_POSIX_MEMALIGN)
175	>	if (posix_memalign(&p, 16, size) != 0)
176	>	throw std::bad_alloc();
177	>	#elif defined(HAVE_MEMALIGN)
178	>	p = memalign(16, size);
179	>	#elif defined(HAVE_VALLOC)
180	>	p = valloc(size); // page-aligned!
181	>	#else
182	>	/* XXX: handle padding ourselves */
183	>	p = malloc(size);
184	>	#endif
185	>
186	>	return p;
187	>	}
188	>
189	>	void operator delete(void *p)
190	>	{
191	>	#if defined(HAVE_MEMALIGN) \|\| defined(HAVE_VALLOC)
192	>	#if defined(__GLIBC__)
193	>	// this is known to work only with GNU libc
194	>	free(p);
195	>	#endif
196	>	#else
197	>	free(p);
198	>	#endif
199	>	}
200
201		sheepshaver_cpu::sheepshaver_cpu()
202	<	: powerpc_cpu()
202	>	: powerpc_cpu(enable_jit_p())
203		{
204		init_decoder();
205		}
206
207		void sheepshaver_cpu::init_decoder()
208		{
163	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
164	–	static bool initialized = false;
165	–	if (initialized)
166	–	return;
167	–	initialized = true;
168	–	#endif
169	–
209		static const instr_info_t sheep_ii_table[] = {
210		{ "sheep",
211		(execute_pmf)&sheepshaver_cpu::execute_sheep,
#	Line 189 \| Line 228 \| void sheepshaver_cpu::init_decoder()
228		static void NativeOp(int selector);
229
230		/* NativeOp instruction format:
231	<	+------------+--------------------------+--+----------+------------+
232	<	\| 6 \| \|FN\| OP \| 2 \|
233	<	+------------+--------------------------+--+----------+------------+
234	<	0 5 \|6 19 20 21 25 26 31
231	>	+------------+-------------------------+--+-----------+------------+
232	>	\| 6 \| \|FN\| OP \| 2 \|
233	>	+------------+-------------------------+--+-----------+------------+
234	>	0 5 \|6 18 19 20 25 26 31
235		*/
236
237	<	typedef bit_field< 20, 20 > FN_field;
238	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
237	>	typedef bit_field< 19, 19 > FN_field;
238	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
239		typedef bit_field< 26, 31 > EMUL_OP_field;
240
241	+	// Execute EMUL_OP routine
242	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
243	+	{
244	+	M68kRegisters r68;
245	+	WriteMacInt32(XLM_68K_R25, gpr(25));
246	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
247	+	for (int i = 0; i < 8; i++)
248	+	r68.d[i] = gpr(8 + i);
249	+	for (int i = 0; i < 7; i++)
250	+	r68.a[i] = gpr(16 + i);
251	+	r68.a[7] = gpr(1);
252	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
253	+	uint32 saved_xer = get_xer();
254	+	EmulOp(&r68, gpr(24), emul_op);
255	+	set_cr(saved_cr);
256	+	set_xer(saved_xer);
257	+	for (int i = 0; i < 8; i++)
258	+	gpr(8 + i) = r68.d[i];
259	+	for (int i = 0; i < 7; i++)
260	+	gpr(16 + i) = r68.a[i];
261	+	gpr(1) = r68.a[7];
262	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
263	+	}
264	+
265		// Execute SheepShaver instruction
266		void sheepshaver_cpu::execute_sheep(uint32 opcode)
267		{
#	Line 222 \| Line 285 \| void sheepshaver_cpu::execute_sheep(uint
285		pc() += 4;
286		break;
287
288	<	default: { // EMUL_OP
289	<	M68kRegisters r68;
227	<	WriteMacInt32(XLM_68K_R25, gpr(25));
228	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
229	<	for (int i = 0; i < 8; i++)
230	<	r68.d[i] = gpr(8 + i);
231	<	for (int i = 0; i < 7; i++)
232	<	r68.a[i] = gpr(16 + i);
233	<	r68.a[7] = gpr(1);
234	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
235	<	for (int i = 0; i < 8; i++)
236	<	gpr(8 + i) = r68.d[i];
237	<	for (int i = 0; i < 7; i++)
238	<	gpr(16 + i) = r68.a[i];
239	<	gpr(1) = r68.a[7];
240	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
288	>	default: // EMUL_OP
289	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
290		pc() += 4;
291		break;
292		}
244	–	}
293		}
294
295	<	// Execution loop
296	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
295	>	// Compile one instruction
296	>	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
297		{
298	<	powerpc_cpu::execute(entry, enable_cache);
298	>	#if PPC_ENABLE_JIT
299	>	const instr_info_t *ii = cg_context.instr_info;
300	>	if (ii->mnemo != PPC_I(SHEEP))
301	>	return false;
302	>
303	>	bool compiled = false;
304	>	powerpc_dyngen & dg = cg_context.codegen;
305	>	uint32 opcode = cg_context.opcode;
306	>
307	>	switch (opcode & 0x3f) {
308	>	case 0: // EMUL_RETURN
309	>	dg.gen_invoke(QuitEmulator);
310	>	compiled = true;
311	>	break;
312	>
313	>	case 1: // EXEC_RETURN
314	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
315	>	compiled = true;
316	>	break;
317	>
318	>	case 2: { // EXEC_NATIVE
319	>	uint32 selector = NATIVE_OP_field::extract(opcode);
320	>	switch (selector) {
321	>	case NATIVE_PATCH_NAME_REGISTRY:
322	>	dg.gen_invoke(DoPatchNameRegistry);
323	>	compiled = true;
324	>	break;
325	>	case NATIVE_VIDEO_INSTALL_ACCEL:
326	>	dg.gen_invoke(VideoInstallAccel);
327	>	compiled = true;
328	>	break;
329	>	case NATIVE_VIDEO_VBL:
330	>	dg.gen_invoke(VideoVBL);
331	>	compiled = true;
332	>	break;
333	>	case NATIVE_GET_RESOURCE:
334	>	case NATIVE_GET_1_RESOURCE:
335	>	case NATIVE_GET_IND_RESOURCE:
336	>	case NATIVE_GET_1_IND_RESOURCE:
337	>	case NATIVE_R_GET_RESOURCE: {
338	>	static const uint32 get_resource_ptr[] = {
339	>	XLM_GET_RESOURCE,
340	>	XLM_GET_1_RESOURCE,
341	>	XLM_GET_IND_RESOURCE,
342	>	XLM_GET_1_IND_RESOURCE,
343	>	XLM_R_GET_RESOURCE
344	>	};
345	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
346	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
347	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
348	>	dg.gen_invoke_CPU_im(func, old_get_resource);
349	>	compiled = true;
350	>	break;
351	>	}
352	>	case NATIVE_DISABLE_INTERRUPT:
353	>	dg.gen_invoke(DisableInterrupt);
354	>	compiled = true;
355	>	break;
356	>	case NATIVE_ENABLE_INTERRUPT:
357	>	dg.gen_invoke(EnableInterrupt);
358	>	compiled = true;
359	>	break;
360	>	case NATIVE_CHECK_LOAD_INVOC:
361	>	dg.gen_load_T0_GPR(3);
362	>	dg.gen_load_T1_GPR(4);
363	>	dg.gen_se_16_32_T1();
364	>	dg.gen_load_T2_GPR(5);
365	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
366	>	compiled = true;
367	>	break;
368	>	case NATIVE_BITBLT:
369	>	dg.gen_load_T0_GPR(3);
370	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
371	>	compiled = true;
372	>	break;
373	>	case NATIVE_INVRECT:
374	>	dg.gen_load_T0_GPR(3);
375	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
376	>	compiled = true;
377	>	break;
378	>	case NATIVE_FILLRECT:
379	>	dg.gen_load_T0_GPR(3);
380	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
381	>	compiled = true;
382	>	break;
383	>	}
384	>	if (FN_field::test(opcode)) {
385	>	if (compiled) {
386	>	dg.gen_load_A0_LR();
387	>	dg.gen_set_PC_A0();
388	>	}
389	>	cg_context.done_compile = true;
390	>	}
391	>	else
392	>	cg_context.done_compile = false;
393	>	break;
394	>	}
395	>
396	>	default: { // EMUL_OP
397	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
398	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
399	>	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
400	>	cg_context.done_compile = false;
401	>	compiled = true;
402	>	break;
403	>	}
404	>	}
405	>	return compiled;
406	>	#endif
407	>	return false;
408		}
409
410		// Handle MacOS interrupt
#	Line 258 \| Line 415 \| void sheepshaver_cpu::interrupt(uint32 e
415		const clock_t interrupt_start = clock();
416		#endif
417
418	+	#if SAFE_INTERRUPT_PPC
419	+	static int depth = 0;
420	+	if (depth != 0)
421	+	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
422	+	depth++;
423	+	#endif
424	+	#if SAFE_INTERRUPT_PPC >= 2
425	+	uint32 saved_regs[32];
426	+	memcpy(&saved_regs[0], &gpr(0), sizeof(saved_regs));
427	+	#endif
428	+
429		#if !MULTICORE_CPU
430		// Save program counters and branch registers
431		uint32 saved_pc = pc();
#	Line 267 \| Line 435 \| void sheepshaver_cpu::interrupt(uint32 e
435		#endif
436
437		// Initialize stack pointer to SheepShaver alternate stack base
438	<	gpr(1) = SheepStack1Base - 64;
438	>	gpr(1) = SignalStackBase() - 64;
439
440		// Build trampoline to return from interrupt
441	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
441	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
442
443		// Prepare registers for nanokernel interrupt routine
444		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 289 \| Line 457 \| void sheepshaver_cpu::interrupt(uint32 e
457		gpr(1) = KernelDataAddr;
458		gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
459		gpr(8) = 0;
460	<	gpr(10) = (uint32)trampoline;
461	<	gpr(12) = (uint32)trampoline;
460	>	gpr(10) = trampoline.addr();
461	>	gpr(12) = trampoline.addr();
462		gpr(13) = get_cr();
463
464		// rlwimi. r7,r7,8,0,0
#	Line 315 \| Line 483 \| void sheepshaver_cpu::interrupt(uint32 e
483		#if EMUL_TIME_STATS
484		interrupt_time += (clock() - interrupt_start);
485		#endif
486	+
487	+	#if SAFE_INTERRUPT_PPC >= 2
488	+	if (memcmp(&saved_regs[0], &gpr(0), sizeof(saved_regs)) != 0)
489	+	printf("FATAL: dirty PowerPC registers\n");
490	+	#endif
491	+	#if SAFE_INTERRUPT_PPC
492	+	depth--;
493	+	#endif
494		}
495
496		// Execute 68k routine
#	Line 427 \| Line 603 \| uint32 sheepshaver_cpu::execute_macos_co
603		uint32 saved_ctr= ctr();
604
605		// Build trampoline with EXEC_RETURN
606	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
607	<	lr() = (uint32)trampoline;
606	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
607	>	lr() = trampoline.addr();
608
609		gpr(1) -= 64; // Create stack frame
610		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 472 \| Line 648 \| inline void sheepshaver_cpu::execute_ppc
648		// Save branch registers
649		uint32 saved_lr = lr();
650
651	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
652	<	lr() = (uint32)trampoline;
651	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
652	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
653	>	lr() = trampoline.addr();
654
655		execute(entry);
656
#	Line 482 \| Line 659 \| inline void sheepshaver_cpu::execute_ppc
659		}
660
661		// Resource Manager thunk
485	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
486	–
662		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
663		{
664		uint32 type = gpr(3);
#	Line 593 \| Line 768 \| static sigsegv_return_t sigsegv_handler(
768		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
769		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
770
771	+	// Ignore writes to the zero page
772	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
773	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
774	+
775		// Ignore all other faults, if requested
776		if (PrefsFindBool("ignoresegv"))
777		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
#	Line 618 \| Line 797 \| void init_emul_ppc(void)
797		// Initialize main CPU emulator
798		main_cpu = new sheepshaver_cpu();
799		main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
800	+	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
801		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
802
803		#if MULTICORE_CPU
#	Line 682 \| Line 862 \| void exit_emul_ppc(void)
862		void emul_ppc(uint32 entry)
863		{
864		current_cpu = main_cpu;
865	<	#if DEBUG
865	>	#if 0
866		current_cpu->start_log();
867		#endif
868		// start emulation loop and enable code translation or caching
869	<	current_cpu->execute(entry, true);
869	>	current_cpu->execute(entry);
870		}
871
872		/*
#	Line 781 \| Line 961 \| void sheepshaver_cpu::handle_interrupt(v
961		if (InterruptFlags & INTFLAG_VIA) {
962		ClearInterruptFlag(INTFLAG_VIA);
963		ADBInterrupt();
964	<	ExecutePPC(VideoVBL);
964	>	ExecuteNative(NATIVE_VIDEO_VBL);
965		}
966		}
967		#endif
#	Line 791 \| Line 971 \| void sheepshaver_cpu::handle_interrupt(v
971		}
972		}
973
794	–	/*
795	–	* Execute NATIVE_OP opcode (called by PowerPC emulator)
796	–	*/
797	–
798	–	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
799	–	tswap32(POWERPC_EMUL_OP \| ((LR) << 11) \| (((uint32)OP) << 6) \| 2)
800	–
801	–	// FIXME: Make sure 32-bit relocations are used
802	–	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
803	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
804	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
805	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
806	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
807	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
808	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
809	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
810	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
811	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
812	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
813	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
814	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
815	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
816	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
817	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
818	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
819	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
820	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
821	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
822	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
823	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
824	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
825	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
826	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
827	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
828	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
829	–	};
830	–
974		static void get_resource(void);
975		static void get_1_resource(void);
976		static void get_ind_resource(void);
#	Line 885 \| Line 1028 \| static void NativeOp(int selector)
1028		GPR(3) = false;
1029		break;
1030		#endif
1031	+	case NATIVE_SYNC_HOOK:
1032	+	GPR(3) = NQD_sync_hook(GPR(3));
1033	+	break;
1034	+	case NATIVE_BITBLT_HOOK:
1035	+	GPR(3) = NQD_bitblt_hook(GPR(3));
1036	+	break;
1037	+	case NATIVE_BITBLT:
1038	+	NQD_bitblt(GPR(3));
1039	+	break;
1040	+	case NATIVE_FILLRECT_HOOK:
1041	+	GPR(3) = NQD_fillrect_hook(GPR(3));
1042	+	break;
1043	+	case NATIVE_INVRECT:
1044	+	NQD_invrect(GPR(3));
1045	+	break;
1046	+	case NATIVE_FILLRECT:
1047	+	NQD_fillrect(GPR(3));
1048	+	break;
1049		case NATIVE_SERIAL_NOTHING:
1050		case NATIVE_SERIAL_OPEN:
1051		case NATIVE_SERIAL_PRIME_IN:
#	Line 930 \| Line 1091 \| static void NativeOp(int selector)
1091		case NATIVE_MAKE_EXECUTABLE:
1092		MakeExecutable(0, (void *)GPR(4), GPR(5));
1093		break;
1094	+	case NATIVE_CHECK_LOAD_INVOC:
1095	+	check_load_invoc(GPR(3), GPR(4), GPR(5));
1096	+	break;
1097		default:
1098		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1099		QuitEmulator();
#	Line 942 \| Line 1106 \| static void NativeOp(int selector)
1106		}
1107
1108		/*
945	–	* Execute native subroutine (LR must contain return address)
946	–	*/
947	–
948	–	void ExecuteNative(int selector)
949	–	{
950	–	uint32 tvect[2];
951	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
952	–	tvect[1] = 0; // Fake TVECT
953	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
954	–	M68kRegisters r;
955	–	Execute68k((uint32)&desc, &r);
956	–	}
957	–
958	–	/*
1109		* Execute 68k subroutine (must be ended with EXEC_RETURN)
1110		* This must only be called by the emul_thread when in EMUL_OP mode
1111		* r->a[7] is unused, the routine runs on the caller's stack
#	Line 973 \| Line 1123 \| void Execute68k(uint32 pc, M68kRegisters
1123
1124		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1125		{
1126	<	uint16 proc[2];
1127	<	proc[0] = htons(trap);
1128	<	proc[1] = htons(M68K_RTS);
1129	<	Execute68k((uint32)proc, r);
1126	>	SheepVar proc_var(4);
1127	>	uint32 proc = proc_var.addr();
1128	>	WriteMacInt16(proc, trap);
1129	>	WriteMacInt16(proc + 2, M68K_RTS);
1130	>	Execute68k(proc, r);
1131		}
1132
1133		/*

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs. Revision 1.36 by gbeauche, 2004-05-12T15:54:23Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs.
Revision 1.36 by gbeauche, 2004-05-12T15:54:23Z