| 1 |
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/* |
| 2 |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
| 3 |
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* |
| 4 |
< |
* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
| 4 |
> |
* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
| 5 |
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* |
| 6 |
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* This program is free software; you can redistribute it and/or modify |
| 7 |
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* it under the terms of the GNU General Public License as published by |
| 31 |
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#include "cpu/ppc/ppc-cpu.hpp" |
| 32 |
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#include "cpu/ppc/ppc-operations.hpp" |
| 33 |
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#include "cpu/ppc/ppc-instructions.hpp" |
| 34 |
+ |
#include "thunks.h" |
| 35 |
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|
| 36 |
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// Used for NativeOp trampolines |
| 37 |
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#include "video.h" |
| 40 |
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#include "ether.h" |
| 41 |
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|
| 42 |
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#include <stdio.h> |
| 43 |
+ |
#include <stdlib.h> |
| 44 |
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|
| 45 |
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#if ENABLE_MON |
| 46 |
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#include "mon.h" |
| 74 |
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#endif |
| 75 |
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} |
| 76 |
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|
| 77 |
+ |
// From main_*.cpp |
| 78 |
+ |
extern uintptr SignalStackBase(); |
| 79 |
+ |
|
| 80 |
+ |
// From rsrc_patches.cpp |
| 81 |
+ |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
| 82 |
+ |
|
| 83 |
+ |
// PowerPC EmulOp to exit from emulation looop |
| 84 |
+ |
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
| 85 |
+ |
|
| 86 |
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// Enable multicore (main/interrupts) cpu emulation? |
| 87 |
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#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
| 88 |
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|
| 104 |
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// SIGSEGV handler |
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static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
| 106 |
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|
| 107 |
+ |
// JIT Compiler enabled? |
| 108 |
+ |
static inline bool enable_jit_p() |
| 109 |
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{ |
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+ |
return PrefsFindBool("jit"); |
| 111 |
+ |
} |
| 112 |
+ |
|
| 113 |
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|
| 114 |
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/** |
| 115 |
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* PowerPC emulator glue with special 'sheep' opcodes |
| 131 |
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// Constructor |
| 132 |
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sheepshaver_cpu(); |
| 133 |
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|
| 134 |
< |
// Condition Register accessors |
| 134 |
> |
// CR & XER accessors |
| 135 |
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uint32 get_cr() const { return cr().get(); } |
| 136 |
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void set_cr(uint32 v) { cr().set(v); } |
| 137 |
+ |
uint32 get_xer() const { return xer().get(); } |
| 138 |
+ |
void set_xer(uint32 v) { xer().set(v); } |
| 139 |
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|
| 140 |
< |
// Execution loop |
| 141 |
< |
void execute(uint32 entry, bool enable_cache = false); |
| 140 |
> |
// Execute EMUL_OP routine |
| 141 |
> |
void execute_emul_op(uint32 emul_op); |
| 142 |
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|
| 143 |
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// Execute 68k routine |
| 144 |
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void execute_68k(uint32 entry, M68kRegisters *r); |
| 149 |
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// Execute MacOS/PPC code |
| 150 |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
| 151 |
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|
| 152 |
+ |
// Compile one instruction |
| 153 |
+ |
virtual bool compile1(codegen_context_t & cg_context); |
| 154 |
+ |
|
| 155 |
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// Resource manager thunk |
| 156 |
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void get_resource(uint32 old_get_resource); |
| 157 |
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|
| 159 |
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void interrupt(uint32 entry); |
| 160 |
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void handle_interrupt(); |
| 161 |
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|
| 140 |
– |
// Lazy memory allocator (one item at a time) |
| 141 |
– |
void *operator new(size_t size) |
| 142 |
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{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); } |
| 143 |
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void operator delete(void *p) |
| 144 |
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{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); } |
| 145 |
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// FIXME: really make surre array allocation fail at link time? |
| 146 |
– |
void *operator new[](size_t); |
| 147 |
– |
void operator delete[](void *p); |
| 148 |
– |
|
| 162 |
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// Make sure the SIGSEGV handler can access CPU registers |
| 163 |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
| 164 |
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}; |
| 165 |
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|
| 166 |
< |
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
| 166 |
> |
// Memory allocator returning areas aligned on 16-byte boundaries |
| 167 |
> |
void *operator new(size_t size) |
| 168 |
> |
{ |
| 169 |
> |
void *p; |
| 170 |
> |
|
| 171 |
> |
#if defined(HAVE_POSIX_MEMALIGN) |
| 172 |
> |
if (posix_memalign(&p, 16, size) != 0) |
| 173 |
> |
throw std::bad_alloc(); |
| 174 |
> |
#elif defined(HAVE_MEMALIGN) |
| 175 |
> |
p = memalign(16, size); |
| 176 |
> |
#elif defined(HAVE_VALLOC) |
| 177 |
> |
p = valloc(size); // page-aligned! |
| 178 |
> |
#else |
| 179 |
> |
/* XXX: handle padding ourselves */ |
| 180 |
> |
p = malloc(size); |
| 181 |
> |
#endif |
| 182 |
> |
|
| 183 |
> |
return p; |
| 184 |
> |
} |
| 185 |
> |
|
| 186 |
> |
void operator delete(void *p) |
| 187 |
> |
{ |
| 188 |
> |
#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
| 189 |
> |
#if defined(__GLIBC__) |
| 190 |
> |
// this is known to work only with GNU libc |
| 191 |
> |
free(p); |
| 192 |
> |
#endif |
| 193 |
> |
#else |
| 194 |
> |
free(p); |
| 195 |
> |
#endif |
| 196 |
> |
} |
| 197 |
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|
| 198 |
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sheepshaver_cpu::sheepshaver_cpu() |
| 199 |
< |
: powerpc_cpu() |
| 199 |
> |
: powerpc_cpu(enable_jit_p()) |
| 200 |
|
{ |
| 201 |
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init_decoder(); |
| 202 |
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} |
| 203 |
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|
| 204 |
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void sheepshaver_cpu::init_decoder() |
| 205 |
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{ |
| 163 |
– |
#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
| 164 |
– |
static bool initialized = false; |
| 165 |
– |
if (initialized) |
| 166 |
– |
return; |
| 167 |
– |
initialized = true; |
| 168 |
– |
#endif |
| 169 |
– |
|
| 206 |
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static const instr_info_t sheep_ii_table[] = { |
| 207 |
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{ "sheep", |
| 208 |
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(execute_pmf)&sheepshaver_cpu::execute_sheep, |
| 225 |
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static void NativeOp(int selector); |
| 226 |
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|
| 227 |
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/* NativeOp instruction format: |
| 228 |
< |
+------------+--------------------------+--+----------+------------+ |
| 229 |
< |
| 6 | |FN| OP | 2 | |
| 230 |
< |
+------------+--------------------------+--+----------+------------+ |
| 231 |
< |
0 5 |6 19 20 21 25 26 31 |
| 228 |
> |
+------------+-------------------------+--+-----------+------------+ |
| 229 |
> |
| 6 | |FN| OP | 2 | |
| 230 |
> |
+------------+-------------------------+--+-----------+------------+ |
| 231 |
> |
0 5 |6 18 19 20 25 26 31 |
| 232 |
|
*/ |
| 233 |
|
|
| 234 |
< |
typedef bit_field< 20, 20 > FN_field; |
| 235 |
< |
typedef bit_field< 21, 25 > NATIVE_OP_field; |
| 234 |
> |
typedef bit_field< 19, 19 > FN_field; |
| 235 |
> |
typedef bit_field< 20, 25 > NATIVE_OP_field; |
| 236 |
|
typedef bit_field< 26, 31 > EMUL_OP_field; |
| 237 |
|
|
| 238 |
+ |
// Execute EMUL_OP routine |
| 239 |
+ |
void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
| 240 |
+ |
{ |
| 241 |
+ |
M68kRegisters r68; |
| 242 |
+ |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
| 243 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
| 244 |
+ |
for (int i = 0; i < 8; i++) |
| 245 |
+ |
r68.d[i] = gpr(8 + i); |
| 246 |
+ |
for (int i = 0; i < 7; i++) |
| 247 |
+ |
r68.a[i] = gpr(16 + i); |
| 248 |
+ |
r68.a[7] = gpr(1); |
| 249 |
+ |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
| 250 |
+ |
uint32 saved_xer = get_xer(); |
| 251 |
+ |
EmulOp(&r68, gpr(24), emul_op); |
| 252 |
+ |
set_cr(saved_cr); |
| 253 |
+ |
set_xer(saved_xer); |
| 254 |
+ |
for (int i = 0; i < 8; i++) |
| 255 |
+ |
gpr(8 + i) = r68.d[i]; |
| 256 |
+ |
for (int i = 0; i < 7; i++) |
| 257 |
+ |
gpr(16 + i) = r68.a[i]; |
| 258 |
+ |
gpr(1) = r68.a[7]; |
| 259 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
| 260 |
+ |
} |
| 261 |
+ |
|
| 262 |
|
// Execute SheepShaver instruction |
| 263 |
|
void sheepshaver_cpu::execute_sheep(uint32 opcode) |
| 264 |
|
{ |
| 282 |
|
pc() += 4; |
| 283 |
|
break; |
| 284 |
|
|
| 285 |
< |
default: { // EMUL_OP |
| 286 |
< |
M68kRegisters r68; |
| 227 |
< |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
| 228 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
| 229 |
< |
for (int i = 0; i < 8; i++) |
| 230 |
< |
r68.d[i] = gpr(8 + i); |
| 231 |
< |
for (int i = 0; i < 7; i++) |
| 232 |
< |
r68.a[i] = gpr(16 + i); |
| 233 |
< |
r68.a[7] = gpr(1); |
| 234 |
< |
EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3); |
| 235 |
< |
for (int i = 0; i < 8; i++) |
| 236 |
< |
gpr(8 + i) = r68.d[i]; |
| 237 |
< |
for (int i = 0; i < 7; i++) |
| 238 |
< |
gpr(16 + i) = r68.a[i]; |
| 239 |
< |
gpr(1) = r68.a[7]; |
| 240 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
| 285 |
> |
default: // EMUL_OP |
| 286 |
> |
execute_emul_op(EMUL_OP_field::extract(opcode) - 3); |
| 287 |
|
pc() += 4; |
| 288 |
|
break; |
| 289 |
|
} |
| 244 |
– |
} |
| 290 |
|
} |
| 291 |
|
|
| 292 |
< |
// Execution loop |
| 293 |
< |
void sheepshaver_cpu::execute(uint32 entry, bool enable_cache) |
| 292 |
> |
// Compile one instruction |
| 293 |
> |
bool sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
| 294 |
|
{ |
| 295 |
< |
powerpc_cpu::execute(entry, enable_cache); |
| 295 |
> |
#if PPC_ENABLE_JIT |
| 296 |
> |
const instr_info_t *ii = cg_context.instr_info; |
| 297 |
> |
if (ii->mnemo != PPC_I(SHEEP)) |
| 298 |
> |
return false; |
| 299 |
> |
|
| 300 |
> |
bool compiled = false; |
| 301 |
> |
powerpc_dyngen & dg = cg_context.codegen; |
| 302 |
> |
uint32 opcode = cg_context.opcode; |
| 303 |
> |
|
| 304 |
> |
switch (opcode & 0x3f) { |
| 305 |
> |
case 0: // EMUL_RETURN |
| 306 |
> |
dg.gen_invoke(QuitEmulator); |
| 307 |
> |
compiled = true; |
| 308 |
> |
break; |
| 309 |
> |
|
| 310 |
> |
case 1: // EXEC_RETURN |
| 311 |
> |
dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN); |
| 312 |
> |
compiled = true; |
| 313 |
> |
break; |
| 314 |
> |
|
| 315 |
> |
case 2: { // EXEC_NATIVE |
| 316 |
> |
uint32 selector = NATIVE_OP_field::extract(opcode); |
| 317 |
> |
switch (selector) { |
| 318 |
> |
case NATIVE_PATCH_NAME_REGISTRY: |
| 319 |
> |
dg.gen_invoke(DoPatchNameRegistry); |
| 320 |
> |
compiled = true; |
| 321 |
> |
break; |
| 322 |
> |
case NATIVE_VIDEO_INSTALL_ACCEL: |
| 323 |
> |
dg.gen_invoke(VideoInstallAccel); |
| 324 |
> |
compiled = true; |
| 325 |
> |
break; |
| 326 |
> |
case NATIVE_VIDEO_VBL: |
| 327 |
> |
dg.gen_invoke(VideoVBL); |
| 328 |
> |
compiled = true; |
| 329 |
> |
break; |
| 330 |
> |
case NATIVE_GET_RESOURCE: |
| 331 |
> |
case NATIVE_GET_1_RESOURCE: |
| 332 |
> |
case NATIVE_GET_IND_RESOURCE: |
| 333 |
> |
case NATIVE_GET_1_IND_RESOURCE: |
| 334 |
> |
case NATIVE_R_GET_RESOURCE: { |
| 335 |
> |
static const uint32 get_resource_ptr[] = { |
| 336 |
> |
XLM_GET_RESOURCE, |
| 337 |
> |
XLM_GET_1_RESOURCE, |
| 338 |
> |
XLM_GET_IND_RESOURCE, |
| 339 |
> |
XLM_GET_1_IND_RESOURCE, |
| 340 |
> |
XLM_R_GET_RESOURCE |
| 341 |
> |
}; |
| 342 |
> |
uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]); |
| 343 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
| 344 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr(); |
| 345 |
> |
dg.gen_invoke_CPU_im(func, old_get_resource); |
| 346 |
> |
compiled = true; |
| 347 |
> |
break; |
| 348 |
> |
} |
| 349 |
> |
case NATIVE_DISABLE_INTERRUPT: |
| 350 |
> |
dg.gen_invoke(DisableInterrupt); |
| 351 |
> |
compiled = true; |
| 352 |
> |
break; |
| 353 |
> |
case NATIVE_ENABLE_INTERRUPT: |
| 354 |
> |
dg.gen_invoke(EnableInterrupt); |
| 355 |
> |
compiled = true; |
| 356 |
> |
break; |
| 357 |
> |
case NATIVE_CHECK_LOAD_INVOC: |
| 358 |
> |
dg.gen_load_T0_GPR(3); |
| 359 |
> |
dg.gen_load_T1_GPR(4); |
| 360 |
> |
dg.gen_se_16_32_T1(); |
| 361 |
> |
dg.gen_load_T2_GPR(5); |
| 362 |
> |
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc); |
| 363 |
> |
compiled = true; |
| 364 |
> |
break; |
| 365 |
> |
case NATIVE_BITBLT: |
| 366 |
> |
dg.gen_load_T0_GPR(3); |
| 367 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
| 368 |
> |
compiled = true; |
| 369 |
> |
break; |
| 370 |
> |
case NATIVE_INVRECT: |
| 371 |
> |
dg.gen_load_T0_GPR(3); |
| 372 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_invrect); |
| 373 |
> |
compiled = true; |
| 374 |
> |
break; |
| 375 |
> |
case NATIVE_FILLRECT: |
| 376 |
> |
dg.gen_load_T0_GPR(3); |
| 377 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect); |
| 378 |
> |
compiled = true; |
| 379 |
> |
break; |
| 380 |
> |
} |
| 381 |
> |
if (FN_field::test(opcode)) { |
| 382 |
> |
if (compiled) { |
| 383 |
> |
dg.gen_load_A0_LR(); |
| 384 |
> |
dg.gen_set_PC_A0(); |
| 385 |
> |
} |
| 386 |
> |
cg_context.done_compile = true; |
| 387 |
> |
} |
| 388 |
> |
else |
| 389 |
> |
cg_context.done_compile = false; |
| 390 |
> |
break; |
| 391 |
> |
} |
| 392 |
> |
|
| 393 |
> |
default: { // EMUL_OP |
| 394 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
| 395 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
| 396 |
> |
dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3); |
| 397 |
> |
cg_context.done_compile = false; |
| 398 |
> |
compiled = true; |
| 399 |
> |
break; |
| 400 |
> |
} |
| 401 |
> |
} |
| 402 |
> |
return compiled; |
| 403 |
> |
#endif |
| 404 |
> |
return false; |
| 405 |
|
} |
| 406 |
|
|
| 407 |
|
// Handle MacOS interrupt |
| 421 |
|
#endif |
| 422 |
|
|
| 423 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
| 424 |
< |
gpr(1) = SheepStack1Base - 64; |
| 424 |
> |
gpr(1) = SignalStackBase() - 64; |
| 425 |
|
|
| 426 |
|
// Build trampoline to return from interrupt |
| 427 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
| 427 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
| 428 |
|
|
| 429 |
|
// Prepare registers for nanokernel interrupt routine |
| 430 |
|
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
| 443 |
|
gpr(1) = KernelDataAddr; |
| 444 |
|
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
| 445 |
|
gpr(8) = 0; |
| 446 |
< |
gpr(10) = (uint32)trampoline; |
| 447 |
< |
gpr(12) = (uint32)trampoline; |
| 446 |
> |
gpr(10) = trampoline.addr(); |
| 447 |
> |
gpr(12) = trampoline.addr(); |
| 448 |
|
gpr(13) = get_cr(); |
| 449 |
|
|
| 450 |
|
// rlwimi. r7,r7,8,0,0 |
| 581 |
|
uint32 saved_ctr= ctr(); |
| 582 |
|
|
| 583 |
|
// Build trampoline with EXEC_RETURN |
| 584 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
| 585 |
< |
lr() = (uint32)trampoline; |
| 584 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
| 585 |
> |
lr() = trampoline.addr(); |
| 586 |
|
|
| 587 |
|
gpr(1) -= 64; // Create stack frame |
| 588 |
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
| 626 |
|
// Save branch registers |
| 627 |
|
uint32 saved_lr = lr(); |
| 628 |
|
|
| 629 |
< |
const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
| 630 |
< |
lr() = (uint32)trampoline; |
| 629 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
| 630 |
> |
WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN); |
| 631 |
> |
lr() = trampoline.addr(); |
| 632 |
|
|
| 633 |
|
execute(entry); |
| 634 |
|
|
| 637 |
|
} |
| 638 |
|
|
| 639 |
|
// Resource Manager thunk |
| 485 |
– |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
| 486 |
– |
|
| 640 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
| 641 |
|
{ |
| 642 |
|
uint32 type = gpr(3); |
| 746 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
| 747 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
| 748 |
|
|
| 749 |
+ |
// Ignore writes to the zero page |
| 750 |
+ |
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
| 751 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
| 752 |
+ |
|
| 753 |
|
// Ignore all other faults, if requested |
| 754 |
|
if (PrefsFindBool("ignoresegv")) |
| 755 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
| 775 |
|
// Initialize main CPU emulator |
| 776 |
|
main_cpu = new sheepshaver_cpu(); |
| 777 |
|
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
| 778 |
+ |
main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
| 779 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
| 780 |
|
|
| 781 |
|
#if MULTICORE_CPU |
| 840 |
|
void emul_ppc(uint32 entry) |
| 841 |
|
{ |
| 842 |
|
current_cpu = main_cpu; |
| 843 |
< |
#if DEBUG |
| 843 |
> |
#if 0 |
| 844 |
|
current_cpu->start_log(); |
| 845 |
|
#endif |
| 846 |
|
// start emulation loop and enable code translation or caching |
| 847 |
< |
current_cpu->execute(entry, true); |
| 847 |
> |
current_cpu->execute(entry); |
| 848 |
|
} |
| 849 |
|
|
| 850 |
|
/* |
| 939 |
|
if (InterruptFlags & INTFLAG_VIA) { |
| 940 |
|
ClearInterruptFlag(INTFLAG_VIA); |
| 941 |
|
ADBInterrupt(); |
| 942 |
< |
ExecutePPC(VideoVBL); |
| 942 |
> |
ExecuteNative(NATIVE_VIDEO_VBL); |
| 943 |
|
} |
| 944 |
|
} |
| 945 |
|
#endif |
| 949 |
|
} |
| 950 |
|
} |
| 951 |
|
|
| 794 |
– |
/* |
| 795 |
– |
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
| 796 |
– |
*/ |
| 797 |
– |
|
| 798 |
– |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
| 799 |
– |
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
| 800 |
– |
|
| 801 |
– |
// FIXME: Make sure 32-bit relocations are used |
| 802 |
– |
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
| 803 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
| 804 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
| 805 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
| 806 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
| 807 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
| 808 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
| 809 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
| 810 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
| 811 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
| 812 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
| 813 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
| 814 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
| 815 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
| 816 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
| 817 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
| 818 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
| 819 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
| 820 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
| 821 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
| 822 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
| 823 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
| 824 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
| 825 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
| 826 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
| 827 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
| 828 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE), |
| 829 |
– |
}; |
| 830 |
– |
|
| 952 |
|
static void get_resource(void); |
| 953 |
|
static void get_1_resource(void); |
| 954 |
|
static void get_ind_resource(void); |
| 1006 |
|
GPR(3) = false; |
| 1007 |
|
break; |
| 1008 |
|
#endif |
| 1009 |
+ |
case NATIVE_SYNC_HOOK: |
| 1010 |
+ |
GPR(3) = NQD_sync_hook(GPR(3)); |
| 1011 |
+ |
break; |
| 1012 |
+ |
case NATIVE_BITBLT_HOOK: |
| 1013 |
+ |
GPR(3) = NQD_bitblt_hook(GPR(3)); |
| 1014 |
+ |
break; |
| 1015 |
+ |
case NATIVE_BITBLT: |
| 1016 |
+ |
NQD_bitblt(GPR(3)); |
| 1017 |
+ |
break; |
| 1018 |
+ |
case NATIVE_FILLRECT_HOOK: |
| 1019 |
+ |
GPR(3) = NQD_fillrect_hook(GPR(3)); |
| 1020 |
+ |
break; |
| 1021 |
+ |
case NATIVE_INVRECT: |
| 1022 |
+ |
NQD_invrect(GPR(3)); |
| 1023 |
+ |
break; |
| 1024 |
+ |
case NATIVE_FILLRECT: |
| 1025 |
+ |
NQD_fillrect(GPR(3)); |
| 1026 |
+ |
break; |
| 1027 |
|
case NATIVE_SERIAL_NOTHING: |
| 1028 |
|
case NATIVE_SERIAL_OPEN: |
| 1029 |
|
case NATIVE_SERIAL_PRIME_IN: |
| 1069 |
|
case NATIVE_MAKE_EXECUTABLE: |
| 1070 |
|
MakeExecutable(0, (void *)GPR(4), GPR(5)); |
| 1071 |
|
break; |
| 1072 |
+ |
case NATIVE_CHECK_LOAD_INVOC: |
| 1073 |
+ |
check_load_invoc(GPR(3), GPR(4), GPR(5)); |
| 1074 |
+ |
break; |
| 1075 |
|
default: |
| 1076 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
| 1077 |
|
QuitEmulator(); |
| 1084 |
|
} |
| 1085 |
|
|
| 1086 |
|
/* |
| 945 |
– |
* Execute native subroutine (LR must contain return address) |
| 946 |
– |
*/ |
| 947 |
– |
|
| 948 |
– |
void ExecuteNative(int selector) |
| 949 |
– |
{ |
| 950 |
– |
uint32 tvect[2]; |
| 951 |
– |
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
| 952 |
– |
tvect[1] = 0; // Fake TVECT |
| 953 |
– |
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
| 954 |
– |
M68kRegisters r; |
| 955 |
– |
Execute68k((uint32)&desc, &r); |
| 956 |
– |
} |
| 957 |
– |
|
| 958 |
– |
/* |
| 1087 |
|
* Execute 68k subroutine (must be ended with EXEC_RETURN) |
| 1088 |
|
* This must only be called by the emul_thread when in EMUL_OP mode |
| 1089 |
|
* r->a[7] is unused, the routine runs on the caller's stack |
| 1101 |
|
|
| 1102 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
| 1103 |
|
{ |
| 1104 |
< |
uint16 proc[2]; |
| 1105 |
< |
proc[0] = htons(trap); |
| 1106 |
< |
proc[1] = htons(M68K_RTS); |
| 1107 |
< |
Execute68k((uint32)proc, r); |
| 1104 |
> |
SheepVar proc_var(4); |
| 1105 |
> |
uint32 proc = proc_var.addr(); |
| 1106 |
> |
WriteMacInt16(proc, trap); |
| 1107 |
> |
WriteMacInt16(proc + 2, M68K_RTS); |
| 1108 |
> |
Execute68k(proc, r); |
| 1109 |
|
} |
| 1110 |
|
|
| 1111 |
|
/* |
