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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp
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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.18 by gbeauche, 2003-11-24T23:45:41Z vs.
Revision 1.21 by gbeauche, 2003-12-04T17:26:38Z

# Line 31 | Line 31
31   #include "cpu/ppc/ppc-cpu.hpp"
32   #include "cpu/ppc/ppc-operations.hpp"
33   #include "cpu/ppc/ppc-instructions.hpp"
34 + #include "thunks.h"
35  
36   // Used for NativeOp trampolines
37   #include "video.h"
# Line 72 | Line 73 | static void enter_mon(void)
73   #endif
74   }
75  
76 + // PowerPC EmulOp to exit from emulation looop
77 + const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
78 +
79   // Enable multicore (main/interrupts) cpu emulation?
80   #define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
81  
# Line 93 | Line 97 | static KernelData * const kernel_data =
97   // SIGSEGV handler
98   static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
99  
100 + // JIT Compiler enabled?
101 + static inline bool enable_jit_p()
102 + {
103 +        return PrefsFindBool("jit");
104 + }
105 +
106  
107   /**
108   *              PowerPC emulator glue with special 'sheep' opcodes
# Line 118 | Line 128 | public:
128          uint32 get_cr() const           { return cr().get(); }
129          void set_cr(uint32 v)           { cr().set(v); }
130  
121        // Execution loop
122        void execute(uint32 entry, bool enable_cache = false);
123
131          // Execute 68k routine
132          void execute_68k(uint32 entry, M68kRegisters *r);
133  
# Line 153 | Line 160 | public:
160   lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
161  
162   sheepshaver_cpu::sheepshaver_cpu()
163 <        : powerpc_cpu()
163 >        : powerpc_cpu(enable_jit_p())
164   {
165          init_decoder();
166   }
# Line 244 | Line 251 | void sheepshaver_cpu::execute_sheep(uint
251          }
252   }
253  
247 // Execution loop
248 void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
249 {
250        powerpc_cpu::execute(entry, enable_cache);
251 }
252
254   // Handle MacOS interrupt
255   void sheepshaver_cpu::interrupt(uint32 entry)
256   {
# Line 267 | Line 268 | void sheepshaver_cpu::interrupt(uint32 e
268   #endif
269  
270          // Initialize stack pointer to SheepShaver alternate stack base
271 <        gpr(1) = SheepStack1Base - 64;
271 >        SheepArray<64> stack_area;
272 >        gpr(1) = stack_area.addr();
273  
274          // Build trampoline to return from interrupt
275 <        uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
275 >        SheepVar32 trampoline = POWERPC_EXEC_RETURN;
276  
277          // Prepare registers for nanokernel interrupt routine
278          kernel_data->v[0x004 >> 2] = htonl(gpr(1));
# Line 289 | Line 291 | void sheepshaver_cpu::interrupt(uint32 e
291          gpr(1)  = KernelDataAddr;
292          gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
293          gpr(8)  = 0;
294 <        gpr(10) = (uint32)trampoline;
295 <        gpr(12) = (uint32)trampoline;
294 >        gpr(10) = trampoline.addr();
295 >        gpr(12) = trampoline.addr();
296          gpr(13) = get_cr();
297  
298          // rlwimi. r7,r7,8,0,0
# Line 427 | Line 429 | uint32 sheepshaver_cpu::execute_macos_co
429          uint32 saved_ctr= ctr();
430  
431          // Build trampoline with EXEC_RETURN
432 <        uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
433 <        lr() = (uint32)trampoline;
432 >        SheepVar32 trampoline = POWERPC_EXEC_RETURN;
433 >        lr() = trampoline.addr();
434  
435          gpr(1) -= 64;                                                           // Create stack frame
436          uint32 proc = ReadMacInt32(tvect);                      // Get routine address
# Line 472 | Line 474 | inline void sheepshaver_cpu::execute_ppc
474          // Save branch registers
475          uint32 saved_lr = lr();
476  
477 <        const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
478 <        lr() = (uint32)trampoline;
477 >        SheepVar32 trampoline = POWERPC_EXEC_RETURN;
478 >        WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
479 >        lr() = trampoline.addr();
480  
481          execute(entry);
482  
# Line 686 | Line 689 | void emul_ppc(uint32 entry)
689          current_cpu->start_log();
690   #endif
691          // start emulation loop and enable code translation or caching
692 <        current_cpu->execute(entry, true);
692 >        current_cpu->execute(entry);
693   }
694  
695   /*
# Line 791 | Line 794 | void sheepshaver_cpu::handle_interrupt(v
794          }
795   }
796  
794 /*
795 *  Execute NATIVE_OP opcode (called by PowerPC emulator)
796 */
797
798 #define POWERPC_NATIVE_OP_INIT(LR, OP) \
799                tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
800
801 // FIXME: Make sure 32-bit relocations are used
802 const uint32 NativeOpTable[NATIVE_OP_MAX] = {
803        POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
804        POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
805        POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
806        POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
807        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
808        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
809        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
810        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
811        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
812        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
813        POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
814        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
815        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
816        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
817        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
818        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
819        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
820        POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
821        POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
822        POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
823        POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
824        POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
825        POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
826        POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
827        POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
828        POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
829 };
830
797   static void get_resource(void);
798   static void get_1_resource(void);
799   static void get_ind_resource(void);
# Line 947 | Line 913 | static void NativeOp(int selector)
913  
914   void ExecuteNative(int selector)
915   {
916 <        uint32 tvect[2];
951 <        tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
952 <        tvect[1] = 0; // Fake TVECT
953 <        RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
916 >        SheepRoutineDescriptor desc(0, NativeTVECT(selector));
917          M68kRegisters r;
918 <        Execute68k((uint32)&desc, &r);
918 >        Execute68k(desc.addr(), &r);
919   }
920  
921   /*
# Line 973 | Line 936 | void Execute68k(uint32 pc, M68kRegisters
936  
937   void Execute68kTrap(uint16 trap, M68kRegisters *r)
938   {
939 <        uint16 proc[2];
940 <        proc[0] = htons(trap);
941 <        proc[1] = htons(M68K_RTS);
942 <        Execute68k((uint32)proc, r);
939 >        SheepVar proc_var(4);
940 >        uint32 proc = proc_var.addr();
941 >        WriteMacInt16(proc, trap);
942 >        WriteMacInt16(proc + 2, M68K_RTS);
943 >        Execute68k(proc, r);
944   }
945  
946   /*

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