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/* |
2 |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
3 |
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* |
4 |
< |
* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
4 |
> |
* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
5 |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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#include "sigsegv.h" |
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#include "cpu/ppc/ppc-cpu.hpp" |
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#include "cpu/ppc/ppc-operations.hpp" |
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#include "cpu/ppc/ppc-instructions.hpp" |
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#include "thunks.h" |
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|
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// Used for NativeOp trampolines |
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#include "video.h" |
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#include "name_registry.h" |
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#include "serial.h" |
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#include "ether.h" |
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#include "timer.h" |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#ifdef HAVE_MALLOC_H |
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#include <malloc.h> |
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#endif |
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|
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#ifdef USE_SDL_VIDEO |
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#include <SDL_events.h> |
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#endif |
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|
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#if ENABLE_MON |
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#include "mon.h" |
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#include "debug.h" |
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|
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// Emulation time statistics |
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#define EMUL_TIME_STATS 1 |
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#ifndef EMUL_TIME_STATS |
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#define EMUL_TIME_STATS 0 |
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#endif |
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|
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#if EMUL_TIME_STATS |
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static clock_t emul_start_time; |
68 |
< |
static uint32 interrupt_count = 0; |
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> |
static uint32 interrupt_count = 0, ppc_interrupt_count = 0; |
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static clock_t interrupt_time = 0; |
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static uint32 exec68k_count = 0; |
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static clock_t exec68k_time = 0; |
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#endif |
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} |
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|
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// Enable multicore (main/interrupts) cpu emulation? |
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#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
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> |
// From main_*.cpp |
88 |
> |
extern uintptr SignalStackBase(); |
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|
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> |
// From rsrc_patches.cpp |
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> |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
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> |
|
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// PowerPC EmulOp to exit from emulation looop |
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const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
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|
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// Enable interrupt routine safety checks? |
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#define SAFE_INTERRUPT_PPC 1 |
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|
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// Enable Execute68k() safety checks? |
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#define SAFE_EXEC_68K 1 |
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#define INTERRUPTS_IN_NATIVE_MODE 1 |
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|
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// Pointer to Kernel Data |
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static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
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static KernelData * kernel_data; |
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|
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// SIGSEGV handler |
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static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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|
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#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
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// Special trampolines for EmulOp and NativeOp |
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static uint8 *emul_op_trampoline; |
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static uint8 *native_op_trampoline; |
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#endif |
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|
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// JIT Compiler enabled? |
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static inline bool enable_jit_p() |
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{ |
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return PrefsFindBool("jit"); |
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} |
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|
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|
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/** |
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* PowerPC emulator glue with special 'sheep' opcodes |
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**/ |
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|
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enum { |
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PPC_I(SHEEP) = PPC_I(MAX), |
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PPC_I(SHEEP_MAX) |
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}; |
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|
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class sheepshaver_cpu |
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: public powerpc_cpu |
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{ |
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void init_decoder(); |
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void execute_sheep(uint32 opcode); |
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|
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// CPU context to preserve on interrupt |
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class interrupt_context { |
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uint32 gpr[32]; |
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uint32 pc; |
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uint32 lr; |
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uint32 ctr; |
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uint32 cr; |
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uint32 xer; |
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sheepshaver_cpu *cpu; |
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const char *where; |
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public: |
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interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
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~interrupt_context(); |
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}; |
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|
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public: |
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|
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// Constructor |
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sheepshaver_cpu(); |
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|
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// Condition Register accessors |
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// CR & XER accessors |
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uint32 get_cr() const { return cr().get(); } |
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void set_cr(uint32 v) { cr().set(v); } |
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uint32 get_xer() const { return xer().get(); } |
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void set_xer(uint32 v) { xer().set(v); } |
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|
171 |
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// Execution loop |
172 |
< |
void execute(uint32 entry, bool enable_cache = false); |
171 |
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// Execute NATIVE_OP routine |
172 |
> |
void execute_native_op(uint32 native_op); |
173 |
> |
|
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> |
// Execute EMUL_OP routine |
175 |
> |
void execute_emul_op(uint32 emul_op); |
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|
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// Execute 68k routine |
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void execute_68k(uint32 entry, M68kRegisters *r); |
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// Execute MacOS/PPC code |
184 |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
185 |
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|
186 |
+ |
#if PPC_ENABLE_JIT |
187 |
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// Compile one instruction |
188 |
+ |
virtual int compile1(codegen_context_t & cg_context); |
189 |
+ |
#endif |
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// Resource manager thunk |
191 |
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void get_resource(uint32 old_get_resource); |
192 |
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|
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void interrupt(uint32 entry); |
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void handle_interrupt(); |
196 |
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|
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// Lazy memory allocator (one item at a time) |
135 |
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void *operator new(size_t size) |
136 |
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{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); } |
137 |
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void operator delete(void *p) |
138 |
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{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); } |
139 |
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// FIXME: really make surre array allocation fail at link time? |
140 |
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void *operator new[](size_t); |
141 |
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void operator delete[](void *p); |
142 |
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|
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// Make sure the SIGSEGV handler can access CPU registers |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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+ |
|
200 |
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// Memory allocator returning areas aligned on 16-byte boundaries |
201 |
+ |
void *operator new(size_t size); |
202 |
+ |
void operator delete(void *p); |
203 |
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}; |
204 |
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|
205 |
< |
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
205 |
> |
// Memory allocator returning areas aligned on 16-byte boundaries |
206 |
> |
void *sheepshaver_cpu::operator new(size_t size) |
207 |
> |
{ |
208 |
> |
void *p; |
209 |
> |
|
210 |
> |
#if defined(HAVE_POSIX_MEMALIGN) |
211 |
> |
if (posix_memalign(&p, 16, size) != 0) |
212 |
> |
throw std::bad_alloc(); |
213 |
> |
#elif defined(HAVE_MEMALIGN) |
214 |
> |
p = memalign(16, size); |
215 |
> |
#elif defined(HAVE_VALLOC) |
216 |
> |
p = valloc(size); // page-aligned! |
217 |
> |
#else |
218 |
> |
/* XXX: handle padding ourselves */ |
219 |
> |
p = malloc(size); |
220 |
> |
#endif |
221 |
> |
|
222 |
> |
return p; |
223 |
> |
} |
224 |
> |
|
225 |
> |
void sheepshaver_cpu::operator delete(void *p) |
226 |
> |
{ |
227 |
> |
#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
228 |
> |
#if defined(__GLIBC__) |
229 |
> |
// this is known to work only with GNU libc |
230 |
> |
free(p); |
231 |
> |
#endif |
232 |
> |
#else |
233 |
> |
free(p); |
234 |
> |
#endif |
235 |
> |
} |
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|
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sheepshaver_cpu::sheepshaver_cpu() |
238 |
< |
: powerpc_cpu() |
238 |
> |
: powerpc_cpu(enable_jit_p()) |
239 |
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{ |
240 |
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init_decoder(); |
241 |
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} |
242 |
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|
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void sheepshaver_cpu::init_decoder() |
244 |
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{ |
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#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
158 |
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static bool initialized = false; |
159 |
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if (initialized) |
160 |
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return; |
161 |
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initialized = true; |
162 |
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#endif |
163 |
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|
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static const instr_info_t sheep_ii_table[] = { |
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{ "sheep", |
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(execute_pmf)&sheepshaver_cpu::execute_sheep, |
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NULL, |
249 |
+ |
PPC_I(SHEEP), |
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D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
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} |
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}; |
260 |
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} |
261 |
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} |
262 |
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|
181 |
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// Forward declaration for native opcode handler |
182 |
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static void NativeOp(int selector); |
183 |
– |
|
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/* NativeOp instruction format: |
264 |
< |
+------------+--------------------------+--+----------+------------+ |
265 |
< |
| 6 | |FN| OP | 2 | |
266 |
< |
+------------+--------------------------+--+----------+------------+ |
267 |
< |
0 5 |6 19 20 21 25 26 31 |
264 |
> |
+------------+-------------------------+--+-----------+------------+ |
265 |
> |
| 6 | |FN| OP | 2 | |
266 |
> |
+------------+-------------------------+--+-----------+------------+ |
267 |
> |
0 5 |6 18 19 20 25 26 31 |
268 |
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*/ |
269 |
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|
270 |
< |
typedef bit_field< 20, 20 > FN_field; |
271 |
< |
typedef bit_field< 21, 25 > NATIVE_OP_field; |
270 |
> |
typedef bit_field< 19, 19 > FN_field; |
271 |
> |
typedef bit_field< 20, 25 > NATIVE_OP_field; |
272 |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
273 |
|
|
274 |
+ |
// Execute EMUL_OP routine |
275 |
+ |
void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
276 |
+ |
{ |
277 |
+ |
M68kRegisters r68; |
278 |
+ |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
279 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
280 |
+ |
for (int i = 0; i < 8; i++) |
281 |
+ |
r68.d[i] = gpr(8 + i); |
282 |
+ |
for (int i = 0; i < 7; i++) |
283 |
+ |
r68.a[i] = gpr(16 + i); |
284 |
+ |
r68.a[7] = gpr(1); |
285 |
+ |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
286 |
+ |
uint32 saved_xer = get_xer(); |
287 |
+ |
EmulOp(&r68, gpr(24), emul_op); |
288 |
+ |
set_cr(saved_cr); |
289 |
+ |
set_xer(saved_xer); |
290 |
+ |
for (int i = 0; i < 8; i++) |
291 |
+ |
gpr(8 + i) = r68.d[i]; |
292 |
+ |
for (int i = 0; i < 7; i++) |
293 |
+ |
gpr(16 + i) = r68.a[i]; |
294 |
+ |
gpr(1) = r68.a[7]; |
295 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
296 |
+ |
} |
297 |
+ |
|
298 |
|
// Execute SheepShaver instruction |
299 |
|
void sheepshaver_cpu::execute_sheep(uint32 opcode) |
300 |
|
{ |
311 |
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break; |
312 |
|
|
313 |
|
case 2: // EXEC_NATIVE |
314 |
< |
NativeOp(NATIVE_OP_field::extract(opcode)); |
314 |
> |
execute_native_op(NATIVE_OP_field::extract(opcode)); |
315 |
|
if (FN_field::test(opcode)) |
316 |
|
pc() = lr(); |
317 |
|
else |
318 |
|
pc() += 4; |
319 |
|
break; |
320 |
|
|
321 |
< |
default: { // EMUL_OP |
322 |
< |
M68kRegisters r68; |
220 |
< |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
221 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
222 |
< |
for (int i = 0; i < 8; i++) |
223 |
< |
r68.d[i] = gpr(8 + i); |
224 |
< |
for (int i = 0; i < 7; i++) |
225 |
< |
r68.a[i] = gpr(16 + i); |
226 |
< |
r68.a[7] = gpr(1); |
227 |
< |
EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3); |
228 |
< |
for (int i = 0; i < 8; i++) |
229 |
< |
gpr(8 + i) = r68.d[i]; |
230 |
< |
for (int i = 0; i < 7; i++) |
231 |
< |
gpr(16 + i) = r68.a[i]; |
232 |
< |
gpr(1) = r68.a[7]; |
233 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
321 |
> |
default: // EMUL_OP |
322 |
> |
execute_emul_op(EMUL_OP_field::extract(opcode) - 3); |
323 |
|
pc() += 4; |
324 |
|
break; |
325 |
|
} |
326 |
+ |
} |
327 |
+ |
|
328 |
+ |
// Compile one instruction |
329 |
+ |
#if PPC_ENABLE_JIT |
330 |
+ |
int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
331 |
+ |
{ |
332 |
+ |
const instr_info_t *ii = cg_context.instr_info; |
333 |
+ |
if (ii->mnemo != PPC_I(SHEEP)) |
334 |
+ |
return COMPILE_FAILURE; |
335 |
+ |
|
336 |
+ |
int status = COMPILE_FAILURE; |
337 |
+ |
powerpc_dyngen & dg = cg_context.codegen; |
338 |
+ |
uint32 opcode = cg_context.opcode; |
339 |
+ |
|
340 |
+ |
switch (opcode & 0x3f) { |
341 |
+ |
case 0: // EMUL_RETURN |
342 |
+ |
dg.gen_invoke(QuitEmulator); |
343 |
+ |
status = COMPILE_CODE_OK; |
344 |
+ |
break; |
345 |
+ |
|
346 |
+ |
case 1: // EXEC_RETURN |
347 |
+ |
dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN); |
348 |
+ |
// Don't check for pending interrupts, we do know we have to |
349 |
+ |
// get out of this block ASAP |
350 |
+ |
dg.gen_exec_return(); |
351 |
+ |
status = COMPILE_EPILOGUE_OK; |
352 |
+ |
break; |
353 |
+ |
|
354 |
+ |
case 2: { // EXEC_NATIVE |
355 |
+ |
uint32 selector = NATIVE_OP_field::extract(opcode); |
356 |
+ |
switch (selector) { |
357 |
+ |
#if !PPC_REENTRANT_JIT |
358 |
+ |
// Filter out functions that may invoke Execute68k() or |
359 |
+ |
// CallMacOS(), this would break reentrancy as they could |
360 |
+ |
// invalidate the translation cache and even overwrite |
361 |
+ |
// continuation code when we are done with them. |
362 |
+ |
case NATIVE_PATCH_NAME_REGISTRY: |
363 |
+ |
dg.gen_invoke(DoPatchNameRegistry); |
364 |
+ |
status = COMPILE_CODE_OK; |
365 |
+ |
break; |
366 |
+ |
case NATIVE_VIDEO_INSTALL_ACCEL: |
367 |
+ |
dg.gen_invoke(VideoInstallAccel); |
368 |
+ |
status = COMPILE_CODE_OK; |
369 |
+ |
break; |
370 |
+ |
case NATIVE_VIDEO_VBL: |
371 |
+ |
dg.gen_invoke(VideoVBL); |
372 |
+ |
status = COMPILE_CODE_OK; |
373 |
+ |
break; |
374 |
+ |
case NATIVE_GET_RESOURCE: |
375 |
+ |
case NATIVE_GET_1_RESOURCE: |
376 |
+ |
case NATIVE_GET_IND_RESOURCE: |
377 |
+ |
case NATIVE_GET_1_IND_RESOURCE: |
378 |
+ |
case NATIVE_R_GET_RESOURCE: { |
379 |
+ |
static const uint32 get_resource_ptr[] = { |
380 |
+ |
XLM_GET_RESOURCE, |
381 |
+ |
XLM_GET_1_RESOURCE, |
382 |
+ |
XLM_GET_IND_RESOURCE, |
383 |
+ |
XLM_GET_1_IND_RESOURCE, |
384 |
+ |
XLM_R_GET_RESOURCE |
385 |
+ |
}; |
386 |
+ |
uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]); |
387 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
388 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr(); |
389 |
+ |
dg.gen_invoke_CPU_im(func, old_get_resource); |
390 |
+ |
status = COMPILE_CODE_OK; |
391 |
+ |
break; |
392 |
+ |
} |
393 |
+ |
case NATIVE_CHECK_LOAD_INVOC: |
394 |
+ |
dg.gen_load_T0_GPR(3); |
395 |
+ |
dg.gen_load_T1_GPR(4); |
396 |
+ |
dg.gen_se_16_32_T1(); |
397 |
+ |
dg.gen_load_T2_GPR(5); |
398 |
+ |
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc); |
399 |
+ |
status = COMPILE_CODE_OK; |
400 |
+ |
break; |
401 |
+ |
#endif |
402 |
+ |
case NATIVE_BITBLT: |
403 |
+ |
dg.gen_load_T0_GPR(3); |
404 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
405 |
+ |
status = COMPILE_CODE_OK; |
406 |
+ |
break; |
407 |
+ |
case NATIVE_INVRECT: |
408 |
+ |
dg.gen_load_T0_GPR(3); |
409 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_invrect); |
410 |
+ |
status = COMPILE_CODE_OK; |
411 |
+ |
break; |
412 |
+ |
case NATIVE_FILLRECT: |
413 |
+ |
dg.gen_load_T0_GPR(3); |
414 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect); |
415 |
+ |
status = COMPILE_CODE_OK; |
416 |
+ |
break; |
417 |
+ |
} |
418 |
+ |
// Could we fully translate this NativeOp? |
419 |
+ |
if (status == COMPILE_CODE_OK) { |
420 |
+ |
if (!FN_field::test(opcode)) |
421 |
+ |
cg_context.done_compile = false; |
422 |
+ |
else { |
423 |
+ |
dg.gen_load_A0_LR(); |
424 |
+ |
dg.gen_set_PC_A0(); |
425 |
+ |
cg_context.done_compile = true; |
426 |
+ |
} |
427 |
+ |
break; |
428 |
+ |
} |
429 |
+ |
#if PPC_REENTRANT_JIT |
430 |
+ |
// Try to execute NativeOp trampoline |
431 |
+ |
if (!FN_field::test(opcode)) |
432 |
+ |
dg.gen_set_PC_im(cg_context.pc + 4); |
433 |
+ |
else { |
434 |
+ |
dg.gen_load_A0_LR(); |
435 |
+ |
dg.gen_set_PC_A0(); |
436 |
+ |
} |
437 |
+ |
dg.gen_mov_32_T0_im(selector); |
438 |
+ |
dg.gen_jmp(native_op_trampoline); |
439 |
+ |
cg_context.done_compile = true; |
440 |
+ |
status = COMPILE_EPILOGUE_OK; |
441 |
+ |
break; |
442 |
+ |
#endif |
443 |
+ |
// Invoke NativeOp handler |
444 |
+ |
if (!FN_field::test(opcode)) { |
445 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
446 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
447 |
+ |
dg.gen_invoke_CPU_im(func, selector); |
448 |
+ |
cg_context.done_compile = false; |
449 |
+ |
status = COMPILE_CODE_OK; |
450 |
+ |
} |
451 |
+ |
// Otherwise, let it generate a call to execute_sheep() which |
452 |
+ |
// will cause necessary updates to the program counter |
453 |
+ |
break; |
454 |
+ |
} |
455 |
+ |
|
456 |
+ |
default: { // EMUL_OP |
457 |
+ |
uint32 emul_op = EMUL_OP_field::extract(opcode) - 3; |
458 |
+ |
#if PPC_REENTRANT_JIT |
459 |
+ |
// Try to execute EmulOp trampoline |
460 |
+ |
dg.gen_set_PC_im(cg_context.pc + 4); |
461 |
+ |
dg.gen_mov_32_T0_im(emul_op); |
462 |
+ |
dg.gen_jmp(emul_op_trampoline); |
463 |
+ |
cg_context.done_compile = true; |
464 |
+ |
status = COMPILE_EPILOGUE_OK; |
465 |
+ |
break; |
466 |
+ |
#endif |
467 |
+ |
// Invoke EmulOp handler |
468 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
469 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
470 |
+ |
dg.gen_invoke_CPU_im(func, emul_op); |
471 |
+ |
cg_context.done_compile = false; |
472 |
+ |
status = COMPILE_CODE_OK; |
473 |
+ |
break; |
474 |
+ |
} |
475 |
|
} |
476 |
+ |
return status; |
477 |
|
} |
478 |
+ |
#endif |
479 |
|
|
480 |
< |
// Execution loop |
481 |
< |
void sheepshaver_cpu::execute(uint32 entry, bool enable_cache) |
480 |
> |
// CPU context to preserve on interrupt |
481 |
> |
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
482 |
|
{ |
483 |
< |
powerpc_cpu::execute(entry, enable_cache); |
483 |
> |
#if SAFE_INTERRUPT_PPC >= 2 |
484 |
> |
cpu = _cpu; |
485 |
> |
where = _where; |
486 |
> |
|
487 |
> |
// Save interrupt context |
488 |
> |
memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
489 |
> |
pc = cpu->pc(); |
490 |
> |
lr = cpu->lr(); |
491 |
> |
ctr = cpu->ctr(); |
492 |
> |
cr = cpu->get_cr(); |
493 |
> |
xer = cpu->get_xer(); |
494 |
> |
#endif |
495 |
> |
} |
496 |
> |
|
497 |
> |
sheepshaver_cpu::interrupt_context::~interrupt_context() |
498 |
> |
{ |
499 |
> |
#if SAFE_INTERRUPT_PPC >= 2 |
500 |
> |
// Check whether CPU context was preserved by interrupt |
501 |
> |
if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
502 |
> |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
503 |
> |
for (int i = 0; i < 32; i++) |
504 |
> |
if (gpr[i] != cpu->gpr(i)) |
505 |
> |
printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
506 |
> |
} |
507 |
> |
if (pc != cpu->pc()) |
508 |
> |
printf("FATAL: %s: interrupt clobbers PC\n", where); |
509 |
> |
if (lr != cpu->lr()) |
510 |
> |
printf("FATAL: %s: interrupt clobbers LR\n", where); |
511 |
> |
if (ctr != cpu->ctr()) |
512 |
> |
printf("FATAL: %s: interrupt clobbers CTR\n", where); |
513 |
> |
if (cr != cpu->get_cr()) |
514 |
> |
printf("FATAL: %s: interrupt clobbers CR\n", where); |
515 |
> |
if (xer != cpu->get_xer()) |
516 |
> |
printf("FATAL: %s: interrupt clobbers XER\n", where); |
517 |
> |
#endif |
518 |
|
} |
519 |
|
|
520 |
|
// Handle MacOS interrupt |
521 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
522 |
|
{ |
523 |
|
#if EMUL_TIME_STATS |
524 |
< |
interrupt_count++; |
524 |
> |
ppc_interrupt_count++; |
525 |
|
const clock_t interrupt_start = clock(); |
526 |
|
#endif |
527 |
|
|
528 |
< |
#if !MULTICORE_CPU |
528 |
> |
#if SAFE_INTERRUPT_PPC |
529 |
> |
static int depth = 0; |
530 |
> |
if (depth != 0) |
531 |
> |
printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
532 |
> |
depth++; |
533 |
> |
#endif |
534 |
> |
|
535 |
|
// Save program counters and branch registers |
536 |
|
uint32 saved_pc = pc(); |
537 |
|
uint32 saved_lr = lr(); |
538 |
|
uint32 saved_ctr= ctr(); |
539 |
|
uint32 saved_sp = gpr(1); |
260 |
– |
#endif |
540 |
|
|
541 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
542 |
< |
gpr(1) = SheepStack1Base - 64; |
542 |
> |
gpr(1) = SignalStackBase() - 64; |
543 |
|
|
544 |
|
// Build trampoline to return from interrupt |
545 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
545 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
546 |
|
|
547 |
|
// Prepare registers for nanokernel interrupt routine |
548 |
|
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
561 |
|
gpr(1) = KernelDataAddr; |
562 |
|
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
563 |
|
gpr(8) = 0; |
564 |
< |
gpr(10) = (uint32)trampoline; |
565 |
< |
gpr(12) = (uint32)trampoline; |
564 |
> |
gpr(10) = trampoline.addr(); |
565 |
> |
gpr(12) = trampoline.addr(); |
566 |
|
gpr(13) = get_cr(); |
567 |
|
|
568 |
|
// rlwimi. r7,r7,8,0,0 |
576 |
|
// Enter nanokernel |
577 |
|
execute(entry); |
578 |
|
|
300 |
– |
#if !MULTICORE_CPU |
579 |
|
// Restore program counters and branch registers |
580 |
|
pc() = saved_pc; |
581 |
|
lr() = saved_lr; |
582 |
|
ctr()= saved_ctr; |
583 |
|
gpr(1) = saved_sp; |
306 |
– |
#endif |
584 |
|
|
585 |
|
#if EMUL_TIME_STATS |
586 |
|
interrupt_time += (clock() - interrupt_start); |
587 |
|
#endif |
588 |
+ |
|
589 |
+ |
#if SAFE_INTERRUPT_PPC |
590 |
+ |
depth--; |
591 |
+ |
#endif |
592 |
|
} |
593 |
|
|
594 |
|
// Execute 68k routine |
701 |
|
uint32 saved_ctr= ctr(); |
702 |
|
|
703 |
|
// Build trampoline with EXEC_RETURN |
704 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
705 |
< |
lr() = (uint32)trampoline; |
704 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
705 |
> |
lr() = trampoline.addr(); |
706 |
|
|
707 |
|
gpr(1) -= 64; // Create stack frame |
708 |
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
746 |
|
// Save branch registers |
747 |
|
uint32 saved_lr = lr(); |
748 |
|
|
749 |
< |
const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
750 |
< |
lr() = (uint32)trampoline; |
749 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
750 |
> |
WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN); |
751 |
> |
lr() = trampoline.addr(); |
752 |
|
|
753 |
|
execute(entry); |
754 |
|
|
757 |
|
} |
758 |
|
|
759 |
|
// Resource Manager thunk |
478 |
– |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
479 |
– |
|
760 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
761 |
|
{ |
762 |
|
uint32 type = gpr(3); |
782 |
|
* SheepShaver CPU engine interface |
783 |
|
**/ |
784 |
|
|
785 |
< |
static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow |
786 |
< |
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
507 |
< |
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
785 |
> |
// PowerPC CPU emulator |
786 |
> |
static sheepshaver_cpu *ppc_cpu = NULL; |
787 |
|
|
788 |
|
void FlushCodeCache(uintptr start, uintptr end) |
789 |
|
{ |
790 |
|
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
791 |
< |
main_cpu->invalidate_cache_range(start, end); |
513 |
< |
#if MULTICORE_CPU |
514 |
< |
interrupt_cpu->invalidate_cache_range(start, end); |
515 |
< |
#endif |
516 |
< |
} |
517 |
< |
|
518 |
< |
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
519 |
< |
{ |
520 |
< |
#if MULTICORE_CPU |
521 |
< |
current_cpu = new_cpu; |
522 |
< |
#endif |
523 |
< |
} |
524 |
< |
|
525 |
< |
static inline void cpu_pop() |
526 |
< |
{ |
527 |
< |
#if MULTICORE_CPU |
528 |
< |
current_cpu = main_cpu; |
529 |
< |
#endif |
791 |
> |
ppc_cpu->invalidate_cache_range(start, end); |
792 |
|
} |
793 |
|
|
794 |
|
// Dump PPC registers |
795 |
|
static void dump_registers(void) |
796 |
|
{ |
797 |
< |
current_cpu->dump_registers(); |
797 |
> |
ppc_cpu->dump_registers(); |
798 |
|
} |
799 |
|
|
800 |
|
// Dump log |
801 |
|
static void dump_log(void) |
802 |
|
{ |
803 |
< |
current_cpu->dump_log(); |
803 |
> |
ppc_cpu->dump_log(); |
804 |
|
} |
805 |
|
|
806 |
|
/* |
807 |
|
* Initialize CPU emulation |
808 |
|
*/ |
809 |
|
|
810 |
< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
810 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
811 |
|
{ |
812 |
|
#if ENABLE_VOSF |
813 |
|
// Handle screen fault |
819 |
|
const uintptr addr = (uintptr)fault_address; |
820 |
|
#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
821 |
|
// Ignore writes to ROM |
822 |
< |
if ((addr - ROM_BASE) < ROM_SIZE) |
822 |
> |
if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE) |
823 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
824 |
|
|
825 |
|
// Get program counter of target CPU |
826 |
< |
sheepshaver_cpu * const cpu = current_cpu; |
826 |
> |
sheepshaver_cpu * const cpu = ppc_cpu; |
827 |
|
const uint32 pc = cpu->pc(); |
828 |
|
|
829 |
|
// Fault in Mac ROM or RAM? |
830 |
< |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
830 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
831 |
|
if (mac_fault) { |
832 |
|
|
833 |
|
// "VM settings" during MacOS 8 installation |
847 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
848 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
849 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
850 |
+ |
|
851 |
+ |
// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM) |
852 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000)) |
853 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
854 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
855 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
856 |
+ |
|
857 |
+ |
// Ignore writes to the zero page |
858 |
+ |
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
859 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
860 |
|
|
861 |
|
// Ignore all other faults, if requested |
862 |
|
if (PrefsFindBool("ignoresegv")) |
869 |
|
printf("SIGSEGV\n"); |
870 |
|
printf(" pc %p\n", fault_instruction); |
871 |
|
printf(" ea %p\n", fault_address); |
600 |
– |
printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
872 |
|
dump_registers(); |
873 |
< |
current_cpu->dump_log(); |
873 |
> |
ppc_cpu->dump_log(); |
874 |
|
enter_mon(); |
875 |
|
QuitEmulator(); |
876 |
|
|
879 |
|
|
880 |
|
void init_emul_ppc(void) |
881 |
|
{ |
882 |
+ |
// Get pointer to KernelData in host address space |
883 |
+ |
kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE); |
884 |
+ |
|
885 |
|
// Initialize main CPU emulator |
886 |
< |
main_cpu = new sheepshaver_cpu(); |
887 |
< |
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
886 |
> |
ppc_cpu = new sheepshaver_cpu(); |
887 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
888 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
889 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
890 |
|
|
616 |
– |
#if MULTICORE_CPU |
617 |
– |
// Initialize alternate CPU emulator to handle interrupts |
618 |
– |
interrupt_cpu = new sheepshaver_cpu(); |
619 |
– |
#endif |
620 |
– |
|
621 |
– |
// Install the handler for SIGSEGV |
622 |
– |
sigsegv_install_handler(sigsegv_handler); |
623 |
– |
|
891 |
|
#if ENABLE_MON |
892 |
|
// Install "regs" command in cxmon |
893 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
913 |
|
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
914 |
|
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
915 |
|
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
916 |
+ |
printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count, |
917 |
+ |
(double(ppc_interrupt_count) * 100.0) / double(interrupt_count)); |
918 |
|
|
919 |
|
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
920 |
|
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
931 |
|
printf("\n"); |
932 |
|
#endif |
933 |
|
|
934 |
< |
delete main_cpu; |
666 |
< |
#if MULTICORE_CPU |
667 |
< |
delete interrupt_cpu; |
668 |
< |
#endif |
934 |
> |
delete ppc_cpu; |
935 |
|
} |
936 |
|
|
937 |
+ |
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
938 |
+ |
// Initialize EmulOp trampolines |
939 |
+ |
void init_emul_op_trampolines(basic_dyngen & dg) |
940 |
+ |
{ |
941 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
942 |
+ |
func_t func; |
943 |
+ |
|
944 |
+ |
// EmulOp |
945 |
+ |
emul_op_trampoline = dg.gen_start(); |
946 |
+ |
func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
947 |
+ |
dg.gen_invoke_CPU_T0(func); |
948 |
+ |
dg.gen_exec_return(); |
949 |
+ |
dg.gen_end(); |
950 |
+ |
|
951 |
+ |
// NativeOp |
952 |
+ |
native_op_trampoline = dg.gen_start(); |
953 |
+ |
func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
954 |
+ |
dg.gen_invoke_CPU_T0(func); |
955 |
+ |
dg.gen_exec_return(); |
956 |
+ |
dg.gen_end(); |
957 |
+ |
|
958 |
+ |
D(bug("EmulOp trampoline: %p\n", emul_op_trampoline)); |
959 |
+ |
D(bug("NativeOp trampoline: %p\n", native_op_trampoline)); |
960 |
+ |
} |
961 |
+ |
#endif |
962 |
+ |
|
963 |
|
/* |
964 |
|
* Emulation loop |
965 |
|
*/ |
966 |
|
|
967 |
|
void emul_ppc(uint32 entry) |
968 |
|
{ |
969 |
< |
current_cpu = main_cpu; |
970 |
< |
#if DEBUG |
679 |
< |
current_cpu->start_log(); |
969 |
> |
#if 0 |
970 |
> |
ppc_cpu->start_log(); |
971 |
|
#endif |
972 |
|
// start emulation loop and enable code translation or caching |
973 |
< |
current_cpu->execute(entry, true); |
973 |
> |
ppc_cpu->execute(entry); |
974 |
|
} |
975 |
|
|
976 |
|
/* |
977 |
|
* Handle PowerPC interrupt |
978 |
|
*/ |
979 |
|
|
689 |
– |
#if ASYNC_IRQ |
690 |
– |
void HandleInterrupt(void) |
691 |
– |
{ |
692 |
– |
main_cpu->handle_interrupt(); |
693 |
– |
} |
694 |
– |
#else |
980 |
|
void TriggerInterrupt(void) |
981 |
|
{ |
982 |
|
#if 0 |
983 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
984 |
|
#else |
985 |
|
// Trigger interrupt to main cpu only |
986 |
< |
if (main_cpu) |
987 |
< |
main_cpu->trigger_interrupt(); |
986 |
> |
if (ppc_cpu) |
987 |
> |
ppc_cpu->trigger_interrupt(); |
988 |
|
#endif |
989 |
|
} |
705 |
– |
#endif |
990 |
|
|
991 |
|
void sheepshaver_cpu::handle_interrupt(void) |
992 |
|
{ |
993 |
+ |
#ifdef USE_SDL_VIDEO |
994 |
+ |
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
995 |
+ |
SDL_PumpEvents(); |
996 |
+ |
#endif |
997 |
+ |
|
998 |
|
// Do nothing if interrupts are disabled |
999 |
< |
if (*(int32 *)XLM_IRQ_NEST > 0) |
999 |
> |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
1000 |
|
return; |
1001 |
|
|
1002 |
< |
// Do nothing if there is no interrupt pending |
1003 |
< |
if (InterruptFlags == 0) |
1004 |
< |
return; |
1002 |
> |
// Current interrupt nest level |
1003 |
> |
static int interrupt_depth = 0; |
1004 |
> |
++interrupt_depth; |
1005 |
> |
#if EMUL_TIME_STATS |
1006 |
> |
interrupt_count++; |
1007 |
> |
#endif |
1008 |
|
|
1009 |
|
// Disable MacOS stack sniffer |
1010 |
|
WriteMacInt32(0x110, 0); |
1013 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
1014 |
|
case MODE_68K: |
1015 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
724 |
– |
assert(current_cpu == main_cpu); |
1016 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1017 |
|
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
1018 |
|
break; |
1020 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
1021 |
|
case MODE_NATIVE: |
1022 |
|
// 68k emulator inactive, in nanokernel? |
1023 |
< |
assert(current_cpu == main_cpu); |
1024 |
< |
if (gpr(1) != KernelDataAddr) { |
1023 |
> |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
1024 |
> |
interrupt_context ctx(this, "PowerPC mode"); |
1025 |
> |
|
1026 |
|
// Prepare for 68k interrupt level 1 |
1027 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1028 |
|
WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc, |
1031 |
|
|
1032 |
|
// Execute nanokernel interrupt routine (this will activate the 68k emulator) |
1033 |
|
DisableInterrupt(); |
742 |
– |
cpu_push(interrupt_cpu); |
1034 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
1035 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c); |
1035 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312b1c); |
1036 |
|
else |
1037 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c); |
747 |
< |
cpu_pop(); |
1037 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312a3c); |
1038 |
|
} |
1039 |
|
break; |
1040 |
|
#endif |
1043 |
|
case MODE_EMUL_OP: |
1044 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
1045 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
1046 |
+ |
interrupt_context ctx(this, "68k mode"); |
1047 |
+ |
#if EMUL_TIME_STATS |
1048 |
+ |
const clock_t interrupt_start = clock(); |
1049 |
+ |
#endif |
1050 |
|
#if 1 |
1051 |
|
// Execute full 68k interrupt routine |
1052 |
|
M68kRegisters r; |
1053 |
|
uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level |
1054 |
|
WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1 |
1055 |
< |
static const uint8 proc[] = { |
1055 |
> |
static const uint8 proc_template[] = { |
1056 |
|
0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word) |
1057 |
|
0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address) |
1058 |
|
0x40, 0xe7, // move sr,-(sp) (saved SR) |
1060 |
|
0x4e, 0xd0, // jmp (a0) |
1061 |
|
M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
1062 |
|
}; |
1063 |
< |
Execute68k((uint32)proc, &r); |
1063 |
> |
BUILD_SHEEPSHAVER_PROCEDURE(proc); |
1064 |
> |
Execute68k(proc, &r); |
1065 |
|
WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
1066 |
|
#else |
1067 |
|
// Only update cursor |
1069 |
|
if (InterruptFlags & INTFLAG_VIA) { |
1070 |
|
ClearInterruptFlag(INTFLAG_VIA); |
1071 |
|
ADBInterrupt(); |
1072 |
< |
ExecutePPC(VideoVBL); |
1072 |
> |
ExecuteNative(NATIVE_VIDEO_VBL); |
1073 |
|
} |
1074 |
|
} |
1075 |
|
#endif |
1076 |
+ |
#if EMUL_TIME_STATS |
1077 |
+ |
interrupt_time += (clock() - interrupt_start); |
1078 |
+ |
#endif |
1079 |
|
} |
1080 |
|
break; |
1081 |
|
#endif |
1082 |
|
} |
785 |
– |
} |
1083 |
|
|
1084 |
< |
/* |
1085 |
< |
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
1086 |
< |
*/ |
790 |
< |
|
791 |
< |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
792 |
< |
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
793 |
< |
|
794 |
< |
// FIXME: Make sure 32-bit relocations are used |
795 |
< |
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
796 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
797 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
798 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
799 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
800 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
801 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
802 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
803 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
804 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
805 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
806 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
807 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
808 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
809 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
810 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
811 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
812 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
813 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
814 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
815 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
816 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
817 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
818 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
819 |
< |
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
820 |
< |
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
821 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE), |
822 |
< |
}; |
1084 |
> |
// We are done with this interrupt |
1085 |
> |
--interrupt_depth; |
1086 |
> |
} |
1087 |
|
|
1088 |
|
static void get_resource(void); |
1089 |
|
static void get_1_resource(void); |
1091 |
|
static void get_1_ind_resource(void); |
1092 |
|
static void r_get_resource(void); |
1093 |
|
|
1094 |
< |
#define GPR(REG) current_cpu->gpr(REG) |
1095 |
< |
|
832 |
< |
static void NativeOp(int selector) |
1094 |
> |
// Execute NATIVE_OP routine |
1095 |
> |
void sheepshaver_cpu::execute_native_op(uint32 selector) |
1096 |
|
{ |
1097 |
|
#if EMUL_TIME_STATS |
1098 |
|
native_exec_count++; |
1110 |
|
VideoVBL(); |
1111 |
|
break; |
1112 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
1113 |
< |
GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4), |
851 |
< |
(void *)GPR(5), GPR(6), GPR(7)); |
1113 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
1114 |
|
break; |
853 |
– |
#ifdef WORDS_BIGENDIAN |
1115 |
|
case NATIVE_ETHER_IRQ: |
1116 |
|
EtherIRQ(); |
1117 |
|
break; |
1118 |
|
case NATIVE_ETHER_INIT: |
1119 |
< |
GPR(3) = InitStreamModule((void *)GPR(3)); |
1119 |
> |
gpr(3) = InitStreamModule((void *)gpr(3)); |
1120 |
|
break; |
1121 |
|
case NATIVE_ETHER_TERM: |
1122 |
|
TerminateStreamModule(); |
1123 |
|
break; |
1124 |
|
case NATIVE_ETHER_OPEN: |
1125 |
< |
GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7)); |
1125 |
> |
gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7)); |
1126 |
|
break; |
1127 |
|
case NATIVE_ETHER_CLOSE: |
1128 |
< |
GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5)); |
1128 |
> |
gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5)); |
1129 |
|
break; |
1130 |
|
case NATIVE_ETHER_WPUT: |
1131 |
< |
GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4)); |
1131 |
> |
gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4)); |
1132 |
|
break; |
1133 |
|
case NATIVE_ETHER_RSRV: |
1134 |
< |
GPR(3) = ether_rsrv((queue_t *)GPR(3)); |
1134 |
> |
gpr(3) = ether_rsrv((queue_t *)gpr(3)); |
1135 |
|
break; |
1136 |
< |
#else |
1137 |
< |
case NATIVE_ETHER_INIT: |
1138 |
< |
// FIXME: needs more complicated thunks |
1139 |
< |
GPR(3) = false; |
1136 |
> |
case NATIVE_SYNC_HOOK: |
1137 |
> |
gpr(3) = NQD_sync_hook(gpr(3)); |
1138 |
> |
break; |
1139 |
> |
case NATIVE_BITBLT_HOOK: |
1140 |
> |
gpr(3) = NQD_bitblt_hook(gpr(3)); |
1141 |
> |
break; |
1142 |
> |
case NATIVE_BITBLT: |
1143 |
> |
NQD_bitblt(gpr(3)); |
1144 |
> |
break; |
1145 |
> |
case NATIVE_FILLRECT_HOOK: |
1146 |
> |
gpr(3) = NQD_fillrect_hook(gpr(3)); |
1147 |
> |
break; |
1148 |
> |
case NATIVE_INVRECT: |
1149 |
> |
NQD_invrect(gpr(3)); |
1150 |
> |
break; |
1151 |
> |
case NATIVE_FILLRECT: |
1152 |
> |
NQD_fillrect(gpr(3)); |
1153 |
|
break; |
880 |
– |
#endif |
1154 |
|
case NATIVE_SERIAL_NOTHING: |
1155 |
|
case NATIVE_SERIAL_OPEN: |
1156 |
|
case NATIVE_SERIAL_PRIME_IN: |
1168 |
|
SerialStatus, |
1169 |
|
SerialClose |
1170 |
|
}; |
1171 |
< |
GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4)); |
1171 |
> |
gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4)); |
1172 |
|
break; |
1173 |
|
} |
1174 |
|
case NATIVE_GET_RESOURCE: |
1178 |
|
case NATIVE_R_GET_RESOURCE: { |
1179 |
|
typedef void (*GetResourceCallback)(void); |
1180 |
|
static const GetResourceCallback get_resource_callbacks[] = { |
1181 |
< |
get_resource, |
1182 |
< |
get_1_resource, |
1183 |
< |
get_ind_resource, |
1184 |
< |
get_1_ind_resource, |
1185 |
< |
r_get_resource |
1181 |
> |
::get_resource, |
1182 |
> |
::get_1_resource, |
1183 |
> |
::get_ind_resource, |
1184 |
> |
::get_1_ind_resource, |
1185 |
> |
::r_get_resource |
1186 |
|
}; |
1187 |
|
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
1188 |
|
break; |
1189 |
|
} |
917 |
– |
case NATIVE_DISABLE_INTERRUPT: |
918 |
– |
DisableInterrupt(); |
919 |
– |
break; |
920 |
– |
case NATIVE_ENABLE_INTERRUPT: |
921 |
– |
EnableInterrupt(); |
922 |
– |
break; |
1190 |
|
case NATIVE_MAKE_EXECUTABLE: |
1191 |
< |
MakeExecutable(0, (void *)GPR(4), GPR(5)); |
1191 |
> |
MakeExecutable(0, gpr(4), gpr(5)); |
1192 |
> |
break; |
1193 |
> |
case NATIVE_CHECK_LOAD_INVOC: |
1194 |
> |
check_load_invoc(gpr(3), gpr(4), gpr(5)); |
1195 |
|
break; |
1196 |
|
default: |
1197 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
1205 |
|
} |
1206 |
|
|
1207 |
|
/* |
938 |
– |
* Execute native subroutine (LR must contain return address) |
939 |
– |
*/ |
940 |
– |
|
941 |
– |
void ExecuteNative(int selector) |
942 |
– |
{ |
943 |
– |
uint32 tvect[2]; |
944 |
– |
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
945 |
– |
tvect[1] = 0; // Fake TVECT |
946 |
– |
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
947 |
– |
M68kRegisters r; |
948 |
– |
Execute68k((uint32)&desc, &r); |
949 |
– |
} |
950 |
– |
|
951 |
– |
/* |
1208 |
|
* Execute 68k subroutine (must be ended with EXEC_RETURN) |
1209 |
|
* This must only be called by the emul_thread when in EMUL_OP mode |
1210 |
|
* r->a[7] is unused, the routine runs on the caller's stack |
1212 |
|
|
1213 |
|
void Execute68k(uint32 pc, M68kRegisters *r) |
1214 |
|
{ |
1215 |
< |
current_cpu->execute_68k(pc, r); |
1215 |
> |
ppc_cpu->execute_68k(pc, r); |
1216 |
|
} |
1217 |
|
|
1218 |
|
/* |
1222 |
|
|
1223 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
1224 |
|
{ |
1225 |
< |
uint16 proc[2]; |
1226 |
< |
proc[0] = htons(trap); |
1227 |
< |
proc[1] = htons(M68K_RTS); |
1228 |
< |
Execute68k((uint32)proc, r); |
1225 |
> |
SheepVar proc_var(4); |
1226 |
> |
uint32 proc = proc_var.addr(); |
1227 |
> |
WriteMacInt16(proc, trap); |
1228 |
> |
WriteMacInt16(proc + 2, M68K_RTS); |
1229 |
> |
Execute68k(proc, r); |
1230 |
|
} |
1231 |
|
|
1232 |
|
/* |
1235 |
|
|
1236 |
|
uint32 call_macos(uint32 tvect) |
1237 |
|
{ |
1238 |
< |
return current_cpu->execute_macos_code(tvect, 0, NULL); |
1238 |
> |
return ppc_cpu->execute_macos_code(tvect, 0, NULL); |
1239 |
|
} |
1240 |
|
|
1241 |
|
uint32 call_macos1(uint32 tvect, uint32 arg1) |
1242 |
|
{ |
1243 |
|
const uint32 args[] = { arg1 }; |
1244 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1244 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1245 |
|
} |
1246 |
|
|
1247 |
|
uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2) |
1248 |
|
{ |
1249 |
|
const uint32 args[] = { arg1, arg2 }; |
1250 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1250 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1251 |
|
} |
1252 |
|
|
1253 |
|
uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3) |
1254 |
|
{ |
1255 |
|
const uint32 args[] = { arg1, arg2, arg3 }; |
1256 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1256 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1257 |
|
} |
1258 |
|
|
1259 |
|
uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4) |
1260 |
|
{ |
1261 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4 }; |
1262 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1262 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1263 |
|
} |
1264 |
|
|
1265 |
|
uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5) |
1266 |
|
{ |
1267 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 }; |
1268 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1268 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1269 |
|
} |
1270 |
|
|
1271 |
|
uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6) |
1272 |
|
{ |
1273 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 }; |
1274 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1274 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1275 |
|
} |
1276 |
|
|
1277 |
|
uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7) |
1278 |
|
{ |
1279 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 }; |
1280 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1280 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1281 |
|
} |
1282 |
|
|
1283 |
|
/* |
1286 |
|
|
1287 |
|
void get_resource(void) |
1288 |
|
{ |
1289 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1289 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1290 |
|
} |
1291 |
|
|
1292 |
|
void get_1_resource(void) |
1293 |
|
{ |
1294 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1294 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1295 |
|
} |
1296 |
|
|
1297 |
|
void get_ind_resource(void) |
1298 |
|
{ |
1299 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1299 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1300 |
|
} |
1301 |
|
|
1302 |
|
void get_1_ind_resource(void) |
1303 |
|
{ |
1304 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1304 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1305 |
|
} |
1306 |
|
|
1307 |
|
void r_get_resource(void) |
1308 |
|
{ |
1309 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1309 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1310 |
|
} |