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/* |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
3 |
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* |
4 |
< |
* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
4 |
> |
* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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#include "sigsegv.h" |
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#include "cpu/ppc/ppc-cpu.hpp" |
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#include "cpu/ppc/ppc-operations.hpp" |
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#include "cpu/ppc/ppc-instructions.hpp" |
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#include "thunks.h" |
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|
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// Used for NativeOp trampolines |
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#include "video.h" |
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#include "name_registry.h" |
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#include "serial.h" |
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#include "ether.h" |
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#include "timer.h" |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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|
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#if ENABLE_MON |
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#include "mon.h" |
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#include "debug.h" |
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|
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// Emulation time statistics |
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< |
#define EMUL_TIME_STATS 1 |
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#ifndef EMUL_TIME_STATS |
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#define EMUL_TIME_STATS 0 |
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#endif |
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|
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#if EMUL_TIME_STATS |
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static clock_t emul_start_time; |
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static uint32 interrupt_count = 0; |
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static uint32 interrupt_count = 0, ppc_interrupt_count = 0; |
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static clock_t interrupt_time = 0; |
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static uint32 exec68k_count = 0; |
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static clock_t exec68k_time = 0; |
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#endif |
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} |
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|
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// Enable multicore (main/interrupts) cpu emulation? |
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#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
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> |
// From main_*.cpp |
81 |
> |
extern uintptr SignalStackBase(); |
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> |
|
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> |
// From rsrc_patches.cpp |
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> |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
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> |
|
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// PowerPC EmulOp to exit from emulation looop |
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const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
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|
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// Enable interrupt routine safety checks? |
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#define SAFE_INTERRUPT_PPC 1 |
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|
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// Enable Execute68k() safety checks? |
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#define SAFE_EXEC_68K 1 |
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// Interrupts in native mode? |
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#define INTERRUPTS_IN_NATIVE_MODE 1 |
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|
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// Enable native EMUL_OPs to be run without a mode switch |
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#define ENABLE_NATIVE_EMUL_OP 1 |
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|
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// Pointer to Kernel Data |
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static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
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|
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// SIGSEGV handler |
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static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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|
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#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
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// Special trampolines for EmulOp and NativeOp |
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static uint8 *emul_op_trampoline; |
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static uint8 *native_op_trampoline; |
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#endif |
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|
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// JIT Compiler enabled? |
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static inline bool enable_jit_p() |
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{ |
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return PrefsFindBool("jit"); |
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} |
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|
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|
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/** |
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* PowerPC emulator glue with special 'sheep' opcodes |
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**/ |
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|
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enum { |
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PPC_I(SHEEP) = PPC_I(MAX), |
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PPC_I(SHEEP_MAX) |
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}; |
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|
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class sheepshaver_cpu |
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: public powerpc_cpu |
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{ |
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void init_decoder(); |
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void execute_sheep(uint32 opcode); |
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|
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// Filter out EMUL_OP routines that only call native code |
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bool filter_execute_emul_op(uint32 emul_op); |
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|
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// "Native" EMUL_OP routines |
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void execute_emul_op_microseconds(); |
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void execute_emul_op_idle_time_1(); |
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void execute_emul_op_idle_time_2(); |
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|
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// CPU context to preserve on interrupt |
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class interrupt_context { |
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uint32 gpr[32]; |
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uint32 pc; |
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uint32 lr; |
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uint32 ctr; |
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uint32 cr; |
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uint32 xer; |
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sheepshaver_cpu *cpu; |
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const char *where; |
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public: |
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interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
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~interrupt_context(); |
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}; |
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|
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public: |
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|
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// Constructor |
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sheepshaver_cpu(); |
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|
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// Condition Register accessors |
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// CR & XER accessors |
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uint32 get_cr() const { return cr().get(); } |
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void set_cr(uint32 v) { cr().set(v); } |
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uint32 get_xer() const { return xer().get(); } |
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void set_xer(uint32 v) { xer().set(v); } |
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|
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// Execution loop |
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void execute(uint32 entry, bool enable_cache = false); |
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// Execute NATIVE_OP routine |
176 |
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void execute_native_op(uint32 native_op); |
177 |
> |
|
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// Execute EMUL_OP routine |
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void execute_emul_op(uint32 emul_op); |
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|
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// Execute 68k routine |
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void execute_68k(uint32 entry, M68kRegisters *r); |
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// Execute MacOS/PPC code |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
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|
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// Compile one instruction |
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virtual int compile1(codegen_context_t & cg_context); |
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|
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// Resource manager thunk |
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void get_resource(uint32 old_get_resource); |
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|
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void interrupt(uint32 entry); |
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void handle_interrupt(); |
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|
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// Lazy memory allocator (one item at a time) |
135 |
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void *operator new(size_t size) |
136 |
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{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); } |
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void operator delete(void *p) |
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{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); } |
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// FIXME: really make surre array allocation fail at link time? |
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void *operator new[](size_t); |
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void operator delete[](void *p); |
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|
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// Make sure the SIGSEGV handler can access CPU registers |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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}; |
203 |
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|
204 |
< |
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
204 |
> |
// Memory allocator returning areas aligned on 16-byte boundaries |
205 |
> |
void *operator new(size_t size) |
206 |
> |
{ |
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> |
void *p; |
208 |
> |
|
209 |
> |
#if defined(HAVE_POSIX_MEMALIGN) |
210 |
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if (posix_memalign(&p, 16, size) != 0) |
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throw std::bad_alloc(); |
212 |
> |
#elif defined(HAVE_MEMALIGN) |
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p = memalign(16, size); |
214 |
> |
#elif defined(HAVE_VALLOC) |
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p = valloc(size); // page-aligned! |
216 |
> |
#else |
217 |
> |
/* XXX: handle padding ourselves */ |
218 |
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p = malloc(size); |
219 |
> |
#endif |
220 |
> |
|
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return p; |
222 |
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} |
223 |
> |
|
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void operator delete(void *p) |
225 |
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{ |
226 |
> |
#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
227 |
> |
#if defined(__GLIBC__) |
228 |
> |
// this is known to work only with GNU libc |
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free(p); |
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#endif |
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#else |
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> |
free(p); |
233 |
> |
#endif |
234 |
> |
} |
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|
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sheepshaver_cpu::sheepshaver_cpu() |
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< |
: powerpc_cpu() |
237 |
> |
: powerpc_cpu(enable_jit_p()) |
238 |
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{ |
239 |
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init_decoder(); |
240 |
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} |
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|
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void sheepshaver_cpu::init_decoder() |
243 |
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{ |
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#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
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static bool initialized = false; |
159 |
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if (initialized) |
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return; |
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initialized = true; |
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#endif |
163 |
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|
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static const instr_info_t sheep_ii_table[] = { |
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{ "sheep", |
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(execute_pmf)&sheepshaver_cpu::execute_sheep, |
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NULL, |
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+ |
PPC_I(SHEEP), |
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D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
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} |
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}; |
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} |
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} |
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|
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// Forward declaration for native opcode handler |
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static void NativeOp(int selector); |
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|
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/* NativeOp instruction format: |
263 |
< |
+------------+--------------------------+--+----------+------------+ |
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< |
| 6 | |FN| OP | 2 | |
265 |
< |
+------------+--------------------------+--+----------+------------+ |
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< |
0 5 |6 19 20 21 25 26 31 |
263 |
> |
+------------+-------------------------+--+-----------+------------+ |
264 |
> |
| 6 | |FN| OP | 2 | |
265 |
> |
+------------+-------------------------+--+-----------+------------+ |
266 |
> |
0 5 |6 18 19 20 25 26 31 |
267 |
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*/ |
268 |
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|
269 |
< |
typedef bit_field< 20, 20 > FN_field; |
270 |
< |
typedef bit_field< 21, 25 > NATIVE_OP_field; |
269 |
> |
typedef bit_field< 19, 19 > FN_field; |
270 |
> |
typedef bit_field< 20, 25 > NATIVE_OP_field; |
271 |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
272 |
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|
273 |
+ |
// "Native" EMUL_OP routines |
274 |
+ |
#define GPR_A(REG) gpr(16 + (REG)) |
275 |
+ |
#define GPR_D(REG) gpr( 8 + (REG)) |
276 |
+ |
|
277 |
+ |
void sheepshaver_cpu::execute_emul_op_microseconds() |
278 |
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{ |
279 |
+ |
Microseconds(GPR_A(0), GPR_D(0)); |
280 |
+ |
} |
281 |
+ |
|
282 |
+ |
void sheepshaver_cpu::execute_emul_op_idle_time_1() |
283 |
+ |
{ |
284 |
+ |
// Sleep if no events pending |
285 |
+ |
if (ReadMacInt32(0x14c) == 0) |
286 |
+ |
Delay_usec(16667); |
287 |
+ |
GPR_A(0) = ReadMacInt32(0x2b6); |
288 |
+ |
} |
289 |
+ |
|
290 |
+ |
void sheepshaver_cpu::execute_emul_op_idle_time_2() |
291 |
+ |
{ |
292 |
+ |
// Sleep if no events pending |
293 |
+ |
if (ReadMacInt32(0x14c) == 0) |
294 |
+ |
Delay_usec(16667); |
295 |
+ |
GPR_D(0) = (uint32)-2; |
296 |
+ |
} |
297 |
+ |
|
298 |
+ |
// Filter out EMUL_OP routines that only call native code |
299 |
+ |
bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op) |
300 |
+ |
{ |
301 |
+ |
switch (emul_op) { |
302 |
+ |
case OP_MICROSECONDS: |
303 |
+ |
execute_emul_op_microseconds(); |
304 |
+ |
return true; |
305 |
+ |
case OP_IDLE_TIME: |
306 |
+ |
execute_emul_op_idle_time_1(); |
307 |
+ |
return true; |
308 |
+ |
case OP_IDLE_TIME_2: |
309 |
+ |
execute_emul_op_idle_time_2(); |
310 |
+ |
return true; |
311 |
+ |
} |
312 |
+ |
return false; |
313 |
+ |
} |
314 |
+ |
|
315 |
+ |
// Execute EMUL_OP routine |
316 |
+ |
void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
317 |
+ |
{ |
318 |
+ |
#if ENABLE_NATIVE_EMUL_OP |
319 |
+ |
// First, filter out EMUL_OPs that can be executed without a mode switch |
320 |
+ |
if (filter_execute_emul_op(emul_op)) |
321 |
+ |
return; |
322 |
+ |
#endif |
323 |
+ |
|
324 |
+ |
M68kRegisters r68; |
325 |
+ |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
326 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
327 |
+ |
for (int i = 0; i < 8; i++) |
328 |
+ |
r68.d[i] = gpr(8 + i); |
329 |
+ |
for (int i = 0; i < 7; i++) |
330 |
+ |
r68.a[i] = gpr(16 + i); |
331 |
+ |
r68.a[7] = gpr(1); |
332 |
+ |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
333 |
+ |
uint32 saved_xer = get_xer(); |
334 |
+ |
EmulOp(&r68, gpr(24), emul_op); |
335 |
+ |
set_cr(saved_cr); |
336 |
+ |
set_xer(saved_xer); |
337 |
+ |
for (int i = 0; i < 8; i++) |
338 |
+ |
gpr(8 + i) = r68.d[i]; |
339 |
+ |
for (int i = 0; i < 7; i++) |
340 |
+ |
gpr(16 + i) = r68.a[i]; |
341 |
+ |
gpr(1) = r68.a[7]; |
342 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
343 |
+ |
} |
344 |
+ |
|
345 |
|
// Execute SheepShaver instruction |
346 |
|
void sheepshaver_cpu::execute_sheep(uint32 opcode) |
347 |
|
{ |
358 |
|
break; |
359 |
|
|
360 |
|
case 2: // EXEC_NATIVE |
361 |
< |
NativeOp(NATIVE_OP_field::extract(opcode)); |
361 |
> |
execute_native_op(NATIVE_OP_field::extract(opcode)); |
362 |
|
if (FN_field::test(opcode)) |
363 |
|
pc() = lr(); |
364 |
|
else |
365 |
|
pc() += 4; |
366 |
|
break; |
367 |
|
|
368 |
< |
default: { // EMUL_OP |
369 |
< |
M68kRegisters r68; |
220 |
< |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
221 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
222 |
< |
for (int i = 0; i < 8; i++) |
223 |
< |
r68.d[i] = gpr(8 + i); |
224 |
< |
for (int i = 0; i < 7; i++) |
225 |
< |
r68.a[i] = gpr(16 + i); |
226 |
< |
r68.a[7] = gpr(1); |
227 |
< |
EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3); |
228 |
< |
for (int i = 0; i < 8; i++) |
229 |
< |
gpr(8 + i) = r68.d[i]; |
230 |
< |
for (int i = 0; i < 7; i++) |
231 |
< |
gpr(16 + i) = r68.a[i]; |
232 |
< |
gpr(1) = r68.a[7]; |
233 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
368 |
> |
default: // EMUL_OP |
369 |
> |
execute_emul_op(EMUL_OP_field::extract(opcode) - 3); |
370 |
|
pc() += 4; |
371 |
|
break; |
372 |
|
} |
373 |
+ |
} |
374 |
+ |
|
375 |
+ |
// Compile one instruction |
376 |
+ |
int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
377 |
+ |
{ |
378 |
+ |
#if PPC_ENABLE_JIT |
379 |
+ |
const instr_info_t *ii = cg_context.instr_info; |
380 |
+ |
if (ii->mnemo != PPC_I(SHEEP)) |
381 |
+ |
return COMPILE_FAILURE; |
382 |
+ |
|
383 |
+ |
int status = COMPILE_FAILURE; |
384 |
+ |
powerpc_dyngen & dg = cg_context.codegen; |
385 |
+ |
uint32 opcode = cg_context.opcode; |
386 |
+ |
|
387 |
+ |
switch (opcode & 0x3f) { |
388 |
+ |
case 0: // EMUL_RETURN |
389 |
+ |
dg.gen_invoke(QuitEmulator); |
390 |
+ |
status = COMPILE_CODE_OK; |
391 |
+ |
break; |
392 |
+ |
|
393 |
+ |
case 1: // EXEC_RETURN |
394 |
+ |
dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN); |
395 |
+ |
// Don't check for pending interrupts, we do know we have to |
396 |
+ |
// get out of this block ASAP |
397 |
+ |
dg.gen_exec_return(); |
398 |
+ |
status = COMPILE_EPILOGUE_OK; |
399 |
+ |
break; |
400 |
+ |
|
401 |
+ |
case 2: { // EXEC_NATIVE |
402 |
+ |
uint32 selector = NATIVE_OP_field::extract(opcode); |
403 |
+ |
switch (selector) { |
404 |
+ |
#if !PPC_REENTRANT_JIT |
405 |
+ |
// Filter out functions that may invoke Execute68k() or |
406 |
+ |
// CallMacOS(), this would break reentrancy as they could |
407 |
+ |
// invalidate the translation cache and even overwrite |
408 |
+ |
// continuation code when we are done with them. |
409 |
+ |
case NATIVE_PATCH_NAME_REGISTRY: |
410 |
+ |
dg.gen_invoke(DoPatchNameRegistry); |
411 |
+ |
status = COMPILE_CODE_OK; |
412 |
+ |
break; |
413 |
+ |
case NATIVE_VIDEO_INSTALL_ACCEL: |
414 |
+ |
dg.gen_invoke(VideoInstallAccel); |
415 |
+ |
status = COMPILE_CODE_OK; |
416 |
+ |
break; |
417 |
+ |
case NATIVE_VIDEO_VBL: |
418 |
+ |
dg.gen_invoke(VideoVBL); |
419 |
+ |
status = COMPILE_CODE_OK; |
420 |
+ |
break; |
421 |
+ |
case NATIVE_GET_RESOURCE: |
422 |
+ |
case NATIVE_GET_1_RESOURCE: |
423 |
+ |
case NATIVE_GET_IND_RESOURCE: |
424 |
+ |
case NATIVE_GET_1_IND_RESOURCE: |
425 |
+ |
case NATIVE_R_GET_RESOURCE: { |
426 |
+ |
static const uint32 get_resource_ptr[] = { |
427 |
+ |
XLM_GET_RESOURCE, |
428 |
+ |
XLM_GET_1_RESOURCE, |
429 |
+ |
XLM_GET_IND_RESOURCE, |
430 |
+ |
XLM_GET_1_IND_RESOURCE, |
431 |
+ |
XLM_R_GET_RESOURCE |
432 |
+ |
}; |
433 |
+ |
uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]); |
434 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
435 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr(); |
436 |
+ |
dg.gen_invoke_CPU_im(func, old_get_resource); |
437 |
+ |
status = COMPILE_CODE_OK; |
438 |
+ |
break; |
439 |
+ |
} |
440 |
+ |
case NATIVE_CHECK_LOAD_INVOC: |
441 |
+ |
dg.gen_load_T0_GPR(3); |
442 |
+ |
dg.gen_load_T1_GPR(4); |
443 |
+ |
dg.gen_se_16_32_T1(); |
444 |
+ |
dg.gen_load_T2_GPR(5); |
445 |
+ |
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc); |
446 |
+ |
status = COMPILE_CODE_OK; |
447 |
+ |
break; |
448 |
+ |
#endif |
449 |
+ |
case NATIVE_DISABLE_INTERRUPT: |
450 |
+ |
dg.gen_invoke(DisableInterrupt); |
451 |
+ |
status = COMPILE_CODE_OK; |
452 |
+ |
break; |
453 |
+ |
case NATIVE_ENABLE_INTERRUPT: |
454 |
+ |
dg.gen_invoke(EnableInterrupt); |
455 |
+ |
status = COMPILE_CODE_OK; |
456 |
+ |
break; |
457 |
+ |
case NATIVE_BITBLT: |
458 |
+ |
dg.gen_load_T0_GPR(3); |
459 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
460 |
+ |
status = COMPILE_CODE_OK; |
461 |
+ |
break; |
462 |
+ |
case NATIVE_INVRECT: |
463 |
+ |
dg.gen_load_T0_GPR(3); |
464 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_invrect); |
465 |
+ |
status = COMPILE_CODE_OK; |
466 |
+ |
break; |
467 |
+ |
case NATIVE_FILLRECT: |
468 |
+ |
dg.gen_load_T0_GPR(3); |
469 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect); |
470 |
+ |
status = COMPILE_CODE_OK; |
471 |
+ |
break; |
472 |
+ |
} |
473 |
+ |
// Could we fully translate this NativeOp? |
474 |
+ |
if (status == COMPILE_CODE_OK) { |
475 |
+ |
if (!FN_field::test(opcode)) |
476 |
+ |
cg_context.done_compile = false; |
477 |
+ |
else { |
478 |
+ |
dg.gen_load_A0_LR(); |
479 |
+ |
dg.gen_set_PC_A0(); |
480 |
+ |
cg_context.done_compile = true; |
481 |
+ |
} |
482 |
+ |
break; |
483 |
+ |
} |
484 |
+ |
#if PPC_REENTRANT_JIT |
485 |
+ |
// Try to execute NativeOp trampoline |
486 |
+ |
if (!FN_field::test(opcode)) |
487 |
+ |
dg.gen_set_PC_im(cg_context.pc + 4); |
488 |
+ |
else { |
489 |
+ |
dg.gen_load_A0_LR(); |
490 |
+ |
dg.gen_set_PC_A0(); |
491 |
+ |
} |
492 |
+ |
dg.gen_mov_32_T0_im(selector); |
493 |
+ |
dg.gen_jmp(native_op_trampoline); |
494 |
+ |
cg_context.done_compile = true; |
495 |
+ |
status = COMPILE_EPILOGUE_OK; |
496 |
+ |
break; |
497 |
+ |
#endif |
498 |
+ |
// Invoke NativeOp handler |
499 |
+ |
if (!FN_field::test(opcode)) { |
500 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
501 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
502 |
+ |
dg.gen_invoke_CPU_im(func, selector); |
503 |
+ |
cg_context.done_compile = false; |
504 |
+ |
status = COMPILE_CODE_OK; |
505 |
+ |
} |
506 |
+ |
// Otherwise, let it generate a call to execute_sheep() which |
507 |
+ |
// will cause necessary updates to the program counter |
508 |
+ |
break; |
509 |
+ |
} |
510 |
+ |
|
511 |
+ |
default: { // EMUL_OP |
512 |
+ |
uint32 emul_op = EMUL_OP_field::extract(opcode) - 3; |
513 |
+ |
#if ENABLE_NATIVE_EMUL_OP |
514 |
+ |
typedef void (*emul_op_func_t)(dyngen_cpu_base); |
515 |
+ |
emul_op_func_t emul_op_func = 0; |
516 |
+ |
switch (emul_op) { |
517 |
+ |
case OP_MICROSECONDS: |
518 |
+ |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr(); |
519 |
+ |
break; |
520 |
+ |
case OP_IDLE_TIME: |
521 |
+ |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr(); |
522 |
+ |
break; |
523 |
+ |
case OP_IDLE_TIME_2: |
524 |
+ |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr(); |
525 |
+ |
break; |
526 |
+ |
} |
527 |
+ |
if (emul_op_func) { |
528 |
+ |
dg.gen_invoke_CPU(emul_op_func); |
529 |
+ |
cg_context.done_compile = false; |
530 |
+ |
status = COMPILE_CODE_OK; |
531 |
+ |
break; |
532 |
+ |
} |
533 |
+ |
#endif |
534 |
+ |
#if PPC_REENTRANT_JIT |
535 |
+ |
// Try to execute EmulOp trampoline |
536 |
+ |
dg.gen_set_PC_im(cg_context.pc + 4); |
537 |
+ |
dg.gen_mov_32_T0_im(emul_op); |
538 |
+ |
dg.gen_jmp(emul_op_trampoline); |
539 |
+ |
cg_context.done_compile = true; |
540 |
+ |
status = COMPILE_EPILOGUE_OK; |
541 |
+ |
break; |
542 |
+ |
#endif |
543 |
+ |
// Invoke EmulOp handler |
544 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
545 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
546 |
+ |
dg.gen_invoke_CPU_im(func, emul_op); |
547 |
+ |
cg_context.done_compile = false; |
548 |
+ |
status = COMPILE_CODE_OK; |
549 |
+ |
break; |
550 |
+ |
} |
551 |
|
} |
552 |
+ |
return status; |
553 |
+ |
#endif |
554 |
+ |
return COMPILE_FAILURE; |
555 |
|
} |
556 |
|
|
557 |
< |
// Execution loop |
558 |
< |
void sheepshaver_cpu::execute(uint32 entry, bool enable_cache) |
557 |
> |
// CPU context to preserve on interrupt |
558 |
> |
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
559 |
|
{ |
560 |
< |
powerpc_cpu::execute(entry, enable_cache); |
560 |
> |
#if SAFE_INTERRUPT_PPC >= 2 |
561 |
> |
cpu = _cpu; |
562 |
> |
where = _where; |
563 |
> |
|
564 |
> |
// Save interrupt context |
565 |
> |
memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
566 |
> |
pc = cpu->pc(); |
567 |
> |
lr = cpu->lr(); |
568 |
> |
ctr = cpu->ctr(); |
569 |
> |
cr = cpu->get_cr(); |
570 |
> |
xer = cpu->get_xer(); |
571 |
> |
#endif |
572 |
> |
} |
573 |
> |
|
574 |
> |
sheepshaver_cpu::interrupt_context::~interrupt_context() |
575 |
> |
{ |
576 |
> |
#if SAFE_INTERRUPT_PPC >= 2 |
577 |
> |
// Check whether CPU context was preserved by interrupt |
578 |
> |
if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
579 |
> |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
580 |
> |
for (int i = 0; i < 32; i++) |
581 |
> |
if (gpr[i] != cpu->gpr(i)) |
582 |
> |
printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
583 |
> |
} |
584 |
> |
if (pc != cpu->pc()) |
585 |
> |
printf("FATAL: %s: interrupt clobbers PC\n", where); |
586 |
> |
if (lr != cpu->lr()) |
587 |
> |
printf("FATAL: %s: interrupt clobbers LR\n", where); |
588 |
> |
if (ctr != cpu->ctr()) |
589 |
> |
printf("FATAL: %s: interrupt clobbers CTR\n", where); |
590 |
> |
if (cr != cpu->get_cr()) |
591 |
> |
printf("FATAL: %s: interrupt clobbers CR\n", where); |
592 |
> |
if (xer != cpu->get_xer()) |
593 |
> |
printf("FATAL: %s: interrupt clobbers XER\n", where); |
594 |
> |
#endif |
595 |
|
} |
596 |
|
|
597 |
|
// Handle MacOS interrupt |
598 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
599 |
|
{ |
600 |
|
#if EMUL_TIME_STATS |
601 |
< |
interrupt_count++; |
601 |
> |
ppc_interrupt_count++; |
602 |
|
const clock_t interrupt_start = clock(); |
603 |
|
#endif |
604 |
|
|
605 |
< |
#if !MULTICORE_CPU |
605 |
> |
#if SAFE_INTERRUPT_PPC |
606 |
> |
static int depth = 0; |
607 |
> |
if (depth != 0) |
608 |
> |
printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
609 |
> |
depth++; |
610 |
> |
#endif |
611 |
> |
|
612 |
|
// Save program counters and branch registers |
613 |
|
uint32 saved_pc = pc(); |
614 |
|
uint32 saved_lr = lr(); |
615 |
|
uint32 saved_ctr= ctr(); |
616 |
|
uint32 saved_sp = gpr(1); |
260 |
– |
#endif |
617 |
|
|
618 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
619 |
< |
gpr(1) = SheepStack1Base - 64; |
619 |
> |
gpr(1) = SignalStackBase() - 64; |
620 |
|
|
621 |
|
// Build trampoline to return from interrupt |
622 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
622 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
623 |
|
|
624 |
|
// Prepare registers for nanokernel interrupt routine |
625 |
|
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
638 |
|
gpr(1) = KernelDataAddr; |
639 |
|
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
640 |
|
gpr(8) = 0; |
641 |
< |
gpr(10) = (uint32)trampoline; |
642 |
< |
gpr(12) = (uint32)trampoline; |
641 |
> |
gpr(10) = trampoline.addr(); |
642 |
> |
gpr(12) = trampoline.addr(); |
643 |
|
gpr(13) = get_cr(); |
644 |
|
|
645 |
|
// rlwimi. r7,r7,8,0,0 |
653 |
|
// Enter nanokernel |
654 |
|
execute(entry); |
655 |
|
|
300 |
– |
#if !MULTICORE_CPU |
656 |
|
// Restore program counters and branch registers |
657 |
|
pc() = saved_pc; |
658 |
|
lr() = saved_lr; |
659 |
|
ctr()= saved_ctr; |
660 |
|
gpr(1) = saved_sp; |
306 |
– |
#endif |
661 |
|
|
662 |
|
#if EMUL_TIME_STATS |
663 |
|
interrupt_time += (clock() - interrupt_start); |
664 |
|
#endif |
665 |
+ |
|
666 |
+ |
#if SAFE_INTERRUPT_PPC |
667 |
+ |
depth--; |
668 |
+ |
#endif |
669 |
|
} |
670 |
|
|
671 |
|
// Execute 68k routine |
778 |
|
uint32 saved_ctr= ctr(); |
779 |
|
|
780 |
|
// Build trampoline with EXEC_RETURN |
781 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
782 |
< |
lr() = (uint32)trampoline; |
781 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
782 |
> |
lr() = trampoline.addr(); |
783 |
|
|
784 |
|
gpr(1) -= 64; // Create stack frame |
785 |
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
823 |
|
// Save branch registers |
824 |
|
uint32 saved_lr = lr(); |
825 |
|
|
826 |
< |
const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
827 |
< |
lr() = (uint32)trampoline; |
826 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
827 |
> |
WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN); |
828 |
> |
lr() = trampoline.addr(); |
829 |
|
|
830 |
|
execute(entry); |
831 |
|
|
834 |
|
} |
835 |
|
|
836 |
|
// Resource Manager thunk |
478 |
– |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
479 |
– |
|
837 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
838 |
|
{ |
839 |
|
uint32 type = gpr(3); |
859 |
|
* SheepShaver CPU engine interface |
860 |
|
**/ |
861 |
|
|
862 |
< |
static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow |
863 |
< |
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
507 |
< |
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
862 |
> |
// PowerPC CPU emulator |
863 |
> |
static sheepshaver_cpu *ppc_cpu = NULL; |
864 |
|
|
865 |
|
void FlushCodeCache(uintptr start, uintptr end) |
866 |
|
{ |
867 |
|
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
868 |
< |
main_cpu->invalidate_cache_range(start, end); |
513 |
< |
#if MULTICORE_CPU |
514 |
< |
interrupt_cpu->invalidate_cache_range(start, end); |
515 |
< |
#endif |
516 |
< |
} |
517 |
< |
|
518 |
< |
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
519 |
< |
{ |
520 |
< |
#if MULTICORE_CPU |
521 |
< |
current_cpu = new_cpu; |
522 |
< |
#endif |
523 |
< |
} |
524 |
< |
|
525 |
< |
static inline void cpu_pop() |
526 |
< |
{ |
527 |
< |
#if MULTICORE_CPU |
528 |
< |
current_cpu = main_cpu; |
529 |
< |
#endif |
868 |
> |
ppc_cpu->invalidate_cache_range(start, end); |
869 |
|
} |
870 |
|
|
871 |
|
// Dump PPC registers |
872 |
|
static void dump_registers(void) |
873 |
|
{ |
874 |
< |
current_cpu->dump_registers(); |
874 |
> |
ppc_cpu->dump_registers(); |
875 |
|
} |
876 |
|
|
877 |
|
// Dump log |
878 |
|
static void dump_log(void) |
879 |
|
{ |
880 |
< |
current_cpu->dump_log(); |
880 |
> |
ppc_cpu->dump_log(); |
881 |
|
} |
882 |
|
|
883 |
|
/* |
900 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
901 |
|
|
902 |
|
// Get program counter of target CPU |
903 |
< |
sheepshaver_cpu * const cpu = current_cpu; |
903 |
> |
sheepshaver_cpu * const cpu = ppc_cpu; |
904 |
|
const uint32 pc = cpu->pc(); |
905 |
|
|
906 |
|
// Fault in Mac ROM or RAM? |
907 |
< |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
907 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
908 |
|
if (mac_fault) { |
909 |
|
|
910 |
|
// "VM settings" during MacOS 8 installation |
924 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
925 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
926 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
927 |
+ |
|
928 |
+ |
// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM) |
929 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000)) |
930 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
931 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
932 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
933 |
+ |
|
934 |
+ |
// Ignore writes to the zero page |
935 |
+ |
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
936 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
937 |
|
|
938 |
|
// Ignore all other faults, if requested |
939 |
|
if (PrefsFindBool("ignoresegv")) |
946 |
|
printf("SIGSEGV\n"); |
947 |
|
printf(" pc %p\n", fault_instruction); |
948 |
|
printf(" ea %p\n", fault_address); |
600 |
– |
printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
949 |
|
dump_registers(); |
950 |
< |
current_cpu->dump_log(); |
950 |
> |
ppc_cpu->dump_log(); |
951 |
|
enter_mon(); |
952 |
|
QuitEmulator(); |
953 |
|
|
957 |
|
void init_emul_ppc(void) |
958 |
|
{ |
959 |
|
// Initialize main CPU emulator |
960 |
< |
main_cpu = new sheepshaver_cpu(); |
961 |
< |
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
960 |
> |
ppc_cpu = new sheepshaver_cpu(); |
961 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
962 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
963 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
964 |
|
|
616 |
– |
#if MULTICORE_CPU |
617 |
– |
// Initialize alternate CPU emulator to handle interrupts |
618 |
– |
interrupt_cpu = new sheepshaver_cpu(); |
619 |
– |
#endif |
620 |
– |
|
965 |
|
// Install the handler for SIGSEGV |
966 |
|
sigsegv_install_handler(sigsegv_handler); |
967 |
|
|
990 |
|
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
991 |
|
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
992 |
|
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
993 |
+ |
printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count, |
994 |
+ |
(double(ppc_interrupt_count) * 100.0) / double(interrupt_count)); |
995 |
|
|
996 |
|
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
997 |
|
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
1008 |
|
printf("\n"); |
1009 |
|
#endif |
1010 |
|
|
1011 |
< |
delete main_cpu; |
666 |
< |
#if MULTICORE_CPU |
667 |
< |
delete interrupt_cpu; |
668 |
< |
#endif |
1011 |
> |
delete ppc_cpu; |
1012 |
|
} |
1013 |
|
|
1014 |
+ |
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
1015 |
+ |
// Initialize EmulOp trampolines |
1016 |
+ |
void init_emul_op_trampolines(basic_dyngen & dg) |
1017 |
+ |
{ |
1018 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
1019 |
+ |
func_t func; |
1020 |
+ |
|
1021 |
+ |
// EmulOp |
1022 |
+ |
emul_op_trampoline = dg.gen_start(); |
1023 |
+ |
func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
1024 |
+ |
dg.gen_invoke_CPU_T0(func); |
1025 |
+ |
dg.gen_exec_return(); |
1026 |
+ |
dg.gen_end(); |
1027 |
+ |
|
1028 |
+ |
// NativeOp |
1029 |
+ |
native_op_trampoline = dg.gen_start(); |
1030 |
+ |
func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
1031 |
+ |
dg.gen_invoke_CPU_T0(func); |
1032 |
+ |
dg.gen_exec_return(); |
1033 |
+ |
dg.gen_end(); |
1034 |
+ |
|
1035 |
+ |
D(bug("EmulOp trampoline: %p\n", emul_op_trampoline)); |
1036 |
+ |
D(bug("NativeOp trampoline: %p\n", native_op_trampoline)); |
1037 |
+ |
} |
1038 |
+ |
#endif |
1039 |
+ |
|
1040 |
|
/* |
1041 |
|
* Emulation loop |
1042 |
|
*/ |
1043 |
|
|
1044 |
|
void emul_ppc(uint32 entry) |
1045 |
|
{ |
1046 |
< |
current_cpu = main_cpu; |
1047 |
< |
#if DEBUG |
679 |
< |
current_cpu->start_log(); |
1046 |
> |
#if 0 |
1047 |
> |
ppc_cpu->start_log(); |
1048 |
|
#endif |
1049 |
|
// start emulation loop and enable code translation or caching |
1050 |
< |
current_cpu->execute(entry, true); |
1050 |
> |
ppc_cpu->execute(entry); |
1051 |
|
} |
1052 |
|
|
1053 |
|
/* |
1054 |
|
* Handle PowerPC interrupt |
1055 |
|
*/ |
1056 |
|
|
689 |
– |
#if ASYNC_IRQ |
690 |
– |
void HandleInterrupt(void) |
691 |
– |
{ |
692 |
– |
main_cpu->handle_interrupt(); |
693 |
– |
} |
694 |
– |
#else |
1057 |
|
void TriggerInterrupt(void) |
1058 |
|
{ |
1059 |
|
#if 0 |
1060 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
1061 |
|
#else |
1062 |
|
// Trigger interrupt to main cpu only |
1063 |
< |
if (main_cpu) |
1064 |
< |
main_cpu->trigger_interrupt(); |
1063 |
> |
if (ppc_cpu) |
1064 |
> |
ppc_cpu->trigger_interrupt(); |
1065 |
|
#endif |
1066 |
|
} |
705 |
– |
#endif |
1067 |
|
|
1068 |
|
void sheepshaver_cpu::handle_interrupt(void) |
1069 |
|
{ |
1075 |
|
if (InterruptFlags == 0) |
1076 |
|
return; |
1077 |
|
|
1078 |
+ |
// Current interrupt nest level |
1079 |
+ |
static int interrupt_depth = 0; |
1080 |
+ |
++interrupt_depth; |
1081 |
+ |
#if EMUL_TIME_STATS |
1082 |
+ |
interrupt_count++; |
1083 |
+ |
#endif |
1084 |
+ |
|
1085 |
|
// Disable MacOS stack sniffer |
1086 |
|
WriteMacInt32(0x110, 0); |
1087 |
|
|
1089 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
1090 |
|
case MODE_68K: |
1091 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
724 |
– |
assert(current_cpu == main_cpu); |
1092 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1093 |
|
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
1094 |
|
break; |
1096 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
1097 |
|
case MODE_NATIVE: |
1098 |
|
// 68k emulator inactive, in nanokernel? |
1099 |
< |
assert(current_cpu == main_cpu); |
1100 |
< |
if (gpr(1) != KernelDataAddr) { |
1099 |
> |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
1100 |
> |
interrupt_context ctx(this, "PowerPC mode"); |
1101 |
> |
|
1102 |
|
// Prepare for 68k interrupt level 1 |
1103 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1104 |
|
WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc, |
1107 |
|
|
1108 |
|
// Execute nanokernel interrupt routine (this will activate the 68k emulator) |
1109 |
|
DisableInterrupt(); |
742 |
– |
cpu_push(interrupt_cpu); |
1110 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
1111 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c); |
1111 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312b1c); |
1112 |
|
else |
1113 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c); |
747 |
< |
cpu_pop(); |
1113 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312a3c); |
1114 |
|
} |
1115 |
|
break; |
1116 |
|
#endif |
1119 |
|
case MODE_EMUL_OP: |
1120 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
1121 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
1122 |
+ |
interrupt_context ctx(this, "68k mode"); |
1123 |
+ |
#if EMUL_TIME_STATS |
1124 |
+ |
const clock_t interrupt_start = clock(); |
1125 |
+ |
#endif |
1126 |
|
#if 1 |
1127 |
|
// Execute full 68k interrupt routine |
1128 |
|
M68kRegisters r; |
1144 |
|
if (InterruptFlags & INTFLAG_VIA) { |
1145 |
|
ClearInterruptFlag(INTFLAG_VIA); |
1146 |
|
ADBInterrupt(); |
1147 |
< |
ExecutePPC(VideoVBL); |
1147 |
> |
ExecuteNative(NATIVE_VIDEO_VBL); |
1148 |
|
} |
1149 |
|
} |
1150 |
|
#endif |
1151 |
+ |
#if EMUL_TIME_STATS |
1152 |
+ |
interrupt_time += (clock() - interrupt_start); |
1153 |
+ |
#endif |
1154 |
|
} |
1155 |
|
break; |
1156 |
|
#endif |
1157 |
|
} |
785 |
– |
} |
1158 |
|
|
1159 |
< |
/* |
1160 |
< |
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
1161 |
< |
*/ |
790 |
< |
|
791 |
< |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
792 |
< |
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
793 |
< |
|
794 |
< |
// FIXME: Make sure 32-bit relocations are used |
795 |
< |
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
796 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
797 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
798 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
799 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
800 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
801 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
802 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
803 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
804 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
805 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
806 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
807 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
808 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
809 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
810 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
811 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
812 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
813 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
814 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
815 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
816 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
817 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
818 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
819 |
< |
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
820 |
< |
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
821 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE), |
822 |
< |
}; |
1159 |
> |
// We are done with this interrupt |
1160 |
> |
--interrupt_depth; |
1161 |
> |
} |
1162 |
|
|
1163 |
|
static void get_resource(void); |
1164 |
|
static void get_1_resource(void); |
1166 |
|
static void get_1_ind_resource(void); |
1167 |
|
static void r_get_resource(void); |
1168 |
|
|
1169 |
< |
#define GPR(REG) current_cpu->gpr(REG) |
1170 |
< |
|
832 |
< |
static void NativeOp(int selector) |
1169 |
> |
// Execute NATIVE_OP routine |
1170 |
> |
void sheepshaver_cpu::execute_native_op(uint32 selector) |
1171 |
|
{ |
1172 |
|
#if EMUL_TIME_STATS |
1173 |
|
native_exec_count++; |
1185 |
|
VideoVBL(); |
1186 |
|
break; |
1187 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
1188 |
< |
GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4), |
1189 |
< |
(void *)GPR(5), GPR(6), GPR(7)); |
1188 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4), |
1189 |
> |
(void *)gpr(5), gpr(6), gpr(7)); |
1190 |
|
break; |
1191 |
|
#ifdef WORDS_BIGENDIAN |
1192 |
|
case NATIVE_ETHER_IRQ: |
1193 |
|
EtherIRQ(); |
1194 |
|
break; |
1195 |
|
case NATIVE_ETHER_INIT: |
1196 |
< |
GPR(3) = InitStreamModule((void *)GPR(3)); |
1196 |
> |
gpr(3) = InitStreamModule((void *)gpr(3)); |
1197 |
|
break; |
1198 |
|
case NATIVE_ETHER_TERM: |
1199 |
|
TerminateStreamModule(); |
1200 |
|
break; |
1201 |
|
case NATIVE_ETHER_OPEN: |
1202 |
< |
GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7)); |
1202 |
> |
gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7)); |
1203 |
|
break; |
1204 |
|
case NATIVE_ETHER_CLOSE: |
1205 |
< |
GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5)); |
1205 |
> |
gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5)); |
1206 |
|
break; |
1207 |
|
case NATIVE_ETHER_WPUT: |
1208 |
< |
GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4)); |
1208 |
> |
gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4)); |
1209 |
|
break; |
1210 |
|
case NATIVE_ETHER_RSRV: |
1211 |
< |
GPR(3) = ether_rsrv((queue_t *)GPR(3)); |
1211 |
> |
gpr(3) = ether_rsrv((queue_t *)gpr(3)); |
1212 |
|
break; |
1213 |
|
#else |
1214 |
|
case NATIVE_ETHER_INIT: |
1215 |
|
// FIXME: needs more complicated thunks |
1216 |
< |
GPR(3) = false; |
1216 |
> |
gpr(3) = false; |
1217 |
|
break; |
1218 |
|
#endif |
1219 |
+ |
case NATIVE_SYNC_HOOK: |
1220 |
+ |
gpr(3) = NQD_sync_hook(gpr(3)); |
1221 |
+ |
break; |
1222 |
+ |
case NATIVE_BITBLT_HOOK: |
1223 |
+ |
gpr(3) = NQD_bitblt_hook(gpr(3)); |
1224 |
+ |
break; |
1225 |
+ |
case NATIVE_BITBLT: |
1226 |
+ |
NQD_bitblt(gpr(3)); |
1227 |
+ |
break; |
1228 |
+ |
case NATIVE_FILLRECT_HOOK: |
1229 |
+ |
gpr(3) = NQD_fillrect_hook(gpr(3)); |
1230 |
+ |
break; |
1231 |
+ |
case NATIVE_INVRECT: |
1232 |
+ |
NQD_invrect(gpr(3)); |
1233 |
+ |
break; |
1234 |
+ |
case NATIVE_FILLRECT: |
1235 |
+ |
NQD_fillrect(gpr(3)); |
1236 |
+ |
break; |
1237 |
|
case NATIVE_SERIAL_NOTHING: |
1238 |
|
case NATIVE_SERIAL_OPEN: |
1239 |
|
case NATIVE_SERIAL_PRIME_IN: |
1251 |
|
SerialStatus, |
1252 |
|
SerialClose |
1253 |
|
}; |
1254 |
< |
GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4)); |
1254 |
> |
gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4)); |
1255 |
|
break; |
1256 |
|
} |
1257 |
|
case NATIVE_GET_RESOURCE: |
1261 |
|
case NATIVE_R_GET_RESOURCE: { |
1262 |
|
typedef void (*GetResourceCallback)(void); |
1263 |
|
static const GetResourceCallback get_resource_callbacks[] = { |
1264 |
< |
get_resource, |
1265 |
< |
get_1_resource, |
1266 |
< |
get_ind_resource, |
1267 |
< |
get_1_ind_resource, |
1268 |
< |
r_get_resource |
1264 |
> |
::get_resource, |
1265 |
> |
::get_1_resource, |
1266 |
> |
::get_ind_resource, |
1267 |
> |
::get_1_ind_resource, |
1268 |
> |
::r_get_resource |
1269 |
|
}; |
1270 |
|
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
1271 |
|
break; |
1277 |
|
EnableInterrupt(); |
1278 |
|
break; |
1279 |
|
case NATIVE_MAKE_EXECUTABLE: |
1280 |
< |
MakeExecutable(0, (void *)GPR(4), GPR(5)); |
1280 |
> |
MakeExecutable(0, (void *)gpr(4), gpr(5)); |
1281 |
> |
break; |
1282 |
> |
case NATIVE_CHECK_LOAD_INVOC: |
1283 |
> |
check_load_invoc(gpr(3), gpr(4), gpr(5)); |
1284 |
|
break; |
1285 |
|
default: |
1286 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
1294 |
|
} |
1295 |
|
|
1296 |
|
/* |
938 |
– |
* Execute native subroutine (LR must contain return address) |
939 |
– |
*/ |
940 |
– |
|
941 |
– |
void ExecuteNative(int selector) |
942 |
– |
{ |
943 |
– |
uint32 tvect[2]; |
944 |
– |
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
945 |
– |
tvect[1] = 0; // Fake TVECT |
946 |
– |
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
947 |
– |
M68kRegisters r; |
948 |
– |
Execute68k((uint32)&desc, &r); |
949 |
– |
} |
950 |
– |
|
951 |
– |
/* |
1297 |
|
* Execute 68k subroutine (must be ended with EXEC_RETURN) |
1298 |
|
* This must only be called by the emul_thread when in EMUL_OP mode |
1299 |
|
* r->a[7] is unused, the routine runs on the caller's stack |
1301 |
|
|
1302 |
|
void Execute68k(uint32 pc, M68kRegisters *r) |
1303 |
|
{ |
1304 |
< |
current_cpu->execute_68k(pc, r); |
1304 |
> |
ppc_cpu->execute_68k(pc, r); |
1305 |
|
} |
1306 |
|
|
1307 |
|
/* |
1311 |
|
|
1312 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
1313 |
|
{ |
1314 |
< |
uint16 proc[2]; |
1315 |
< |
proc[0] = htons(trap); |
1316 |
< |
proc[1] = htons(M68K_RTS); |
1317 |
< |
Execute68k((uint32)proc, r); |
1314 |
> |
SheepVar proc_var(4); |
1315 |
> |
uint32 proc = proc_var.addr(); |
1316 |
> |
WriteMacInt16(proc, trap); |
1317 |
> |
WriteMacInt16(proc + 2, M68K_RTS); |
1318 |
> |
Execute68k(proc, r); |
1319 |
|
} |
1320 |
|
|
1321 |
|
/* |
1324 |
|
|
1325 |
|
uint32 call_macos(uint32 tvect) |
1326 |
|
{ |
1327 |
< |
return current_cpu->execute_macos_code(tvect, 0, NULL); |
1327 |
> |
return ppc_cpu->execute_macos_code(tvect, 0, NULL); |
1328 |
|
} |
1329 |
|
|
1330 |
|
uint32 call_macos1(uint32 tvect, uint32 arg1) |
1331 |
|
{ |
1332 |
|
const uint32 args[] = { arg1 }; |
1333 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1333 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1334 |
|
} |
1335 |
|
|
1336 |
|
uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2) |
1337 |
|
{ |
1338 |
|
const uint32 args[] = { arg1, arg2 }; |
1339 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1339 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1340 |
|
} |
1341 |
|
|
1342 |
|
uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3) |
1343 |
|
{ |
1344 |
|
const uint32 args[] = { arg1, arg2, arg3 }; |
1345 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1345 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1346 |
|
} |
1347 |
|
|
1348 |
|
uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4) |
1349 |
|
{ |
1350 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4 }; |
1351 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1351 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1352 |
|
} |
1353 |
|
|
1354 |
|
uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5) |
1355 |
|
{ |
1356 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 }; |
1357 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1357 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1358 |
|
} |
1359 |
|
|
1360 |
|
uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6) |
1361 |
|
{ |
1362 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 }; |
1363 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1363 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1364 |
|
} |
1365 |
|
|
1366 |
|
uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7) |
1367 |
|
{ |
1368 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 }; |
1369 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1369 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1370 |
|
} |
1371 |
|
|
1372 |
|
/* |
1375 |
|
|
1376 |
|
void get_resource(void) |
1377 |
|
{ |
1378 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1378 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1379 |
|
} |
1380 |
|
|
1381 |
|
void get_1_resource(void) |
1382 |
|
{ |
1383 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1383 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1384 |
|
} |
1385 |
|
|
1386 |
|
void get_ind_resource(void) |
1387 |
|
{ |
1388 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1388 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1389 |
|
} |
1390 |
|
|
1391 |
|
void get_1_ind_resource(void) |
1392 |
|
{ |
1393 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1393 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1394 |
|
} |
1395 |
|
|
1396 |
|
void r_get_resource(void) |
1397 |
|
{ |
1398 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1398 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1399 |
|
} |