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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.17 by gbeauche, 2003-11-10T16:23:58Z vs.
Revision 1.30 by gbeauche, 2004-02-24T11:12:54Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 30 | Line 30
30		#include "sigsegv.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
#	Line 71 | Line 73 | static void enter_mon(void)
73		#endif
74		}
75
76	+	// From main_*.cpp
77	+	extern uintptr SignalStackBase();
78	+
79	+	// From rsrc_patches.cpp
80	+	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
81	+
82	+	// PowerPC EmulOp to exit from emulation looop
83	+	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
84	+
85		// Enable multicore (main/interrupts) cpu emulation?
86		#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87
#	Line 92 | Line 103 | static KernelData * const kernel_data =
103		// SIGSEGV handler
104		static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
105
106	+	// JIT Compiler enabled?
107	+	static inline bool enable_jit_p()
108	+	{
109	+	return PrefsFindBool("jit");
110	+	}
111	+
112
113		/**
114		*              PowerPC emulator glue with special 'sheep' opcodes
115		**/
116
117	+	enum {
118	+	PPC_I(SHEEP) = PPC_I(MAX),
119	+	PPC_I(SHEEP_MAX)
120	+	};
121	+
122		class sheepshaver_cpu
123		: public powerpc_cpu
124		{
#	Line 108 | Line 130 | public:
130		// Constructor
131		sheepshaver_cpu();
132
133	<	// Condition Register accessors
133	>	// CR & XER accessors
134		uint32 get_cr() const           { return cr().get(); }
135		void set_cr(uint32 v)           { cr().set(v); }
136	+	uint32 get_xer() const          { return xer().get(); }
137	+	void set_xer(uint32 v)          { xer().set(v); }
138
139	<	// Execution loop
140	<	void execute(uint32 entry, bool enable_cache = false);
139	>	// Execute EMUL_OP routine
140	>	void execute_emul_op(uint32 emul_op);
141
142		// Execute 68k routine
143		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 124 | Line 148 | public:
148		// Execute MacOS/PPC code
149		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
150
151	+	// Compile one instruction
152	+	virtual bool compile1(codegen_context_t & cg_context);
153	+
154		// Resource manager thunk
155		void get_resource(uint32 old_get_resource);
156
#	Line 131 | Line 158 | public:
158		void interrupt(uint32 entry);
159		void handle_interrupt();
160
134	–	// Lazy memory allocator (one item at a time)
135	–	void *operator new(size_t size)
136	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
137	–	void operator delete(void *p)
138	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
139	–	// FIXME: really make surre array allocation fail at link time?
140	–	void *operator new[](size_t);
141	–	void operator delete[](void *p);
142	–
161		// Make sure the SIGSEGV handler can access CPU registers
162		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
163		};
164
165	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
165	>	// Memory allocator returning areas aligned on 16-byte boundaries
166	>	void *operator new(size_t size)
167	>	{
168	>	void *p;
169	>
170	>	/* XXX: try different approaches */
171	>	if (posix_memalign(&p, 16, size) != 0)
172	>	throw std::bad_alloc();
173	>
174	>	return p;
175	>	}
176	>
177	>	void operator delete(void *p)
178	>	{
179	>	free(p);
180	>	}
181
182		sheepshaver_cpu::sheepshaver_cpu()
183	<	: powerpc_cpu()
183	>	: powerpc_cpu(enable_jit_p())
184		{
185		init_decoder();
186		}
187
188		void sheepshaver_cpu::init_decoder()
189		{
157	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
158	–	static bool initialized = false;
159	–	if (initialized)
160	–	return;
161	–	initialized = true;
162	–	#endif
163	–
190		static const instr_info_t sheep_ii_table[] = {
191		{ "sheep",
192		(execute_pmf)&sheepshaver_cpu::execute_sheep,
193		NULL,
194	+	PPC_I(SHEEP),
195		D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
196		}
197		};
#	Line 192 | Line 219 | typedef bit_field< 20, 20 > FN_field;
219		typedef bit_field< 21, 25 > NATIVE_OP_field;
220		typedef bit_field< 26, 31 > EMUL_OP_field;
221
222	+	// Execute EMUL_OP routine
223	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
224	+	{
225	+	M68kRegisters r68;
226	+	WriteMacInt32(XLM_68K_R25, gpr(25));
227	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
228	+	for (int i = 0; i < 8; i++)
229	+	r68.d[i] = gpr(8 + i);
230	+	for (int i = 0; i < 7; i++)
231	+	r68.a[i] = gpr(16 + i);
232	+	r68.a[7] = gpr(1);
233	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
234	+	uint32 saved_xer = get_xer();
235	+	EmulOp(&r68, gpr(24), emul_op);
236	+	set_cr(saved_cr);
237	+	set_xer(saved_xer);
238	+	for (int i = 0; i < 8; i++)
239	+	gpr(8 + i) = r68.d[i];
240	+	for (int i = 0; i < 7; i++)
241	+	gpr(16 + i) = r68.a[i];
242	+	gpr(1) = r68.a[7];
243	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
244	+	}
245	+
246		// Execute SheepShaver instruction
247		void sheepshaver_cpu::execute_sheep(uint32 opcode)
248		{
#	Line 215 | Line 266 | void sheepshaver_cpu::execute_sheep(uint
266		pc() += 4;
267		break;
268
269	<	default: {      // EMUL_OP
270	<	M68kRegisters r68;
220	<	WriteMacInt32(XLM_68K_R25, gpr(25));
221	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
222	<	for (int i = 0; i < 8; i++)
223	<	r68.d[i] = gpr(8 + i);
224	<	for (int i = 0; i < 7; i++)
225	<	r68.a[i] = gpr(16 + i);
226	<	r68.a[7] = gpr(1);
227	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
228	<	for (int i = 0; i < 8; i++)
229	<	gpr(8 + i) = r68.d[i];
230	<	for (int i = 0; i < 7; i++)
231	<	gpr(16 + i) = r68.a[i];
232	<	gpr(1) = r68.a[7];
233	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
269	>	default:        // EMUL_OP
270	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
271		pc() += 4;
272		break;
273		}
237	–	}
274		}
275
276	<	// Execution loop
277	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
276	>	// Compile one instruction
277	>	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
278		{
279	<	powerpc_cpu::execute(entry, enable_cache);
279	>	#if PPC_ENABLE_JIT
280	>	const instr_info_t *ii = cg_context.instr_info;
281	>	if (ii->mnemo != PPC_I(SHEEP))
282	>	return false;
283	>
284	>	bool compiled = false;
285	>	powerpc_dyngen & dg = cg_context.codegen;
286	>	uint32 opcode = cg_context.opcode;
287	>
288	>	switch (opcode & 0x3f) {
289	>	case 0:         // EMUL_RETURN
290	>	dg.gen_invoke(QuitEmulator);
291	>	compiled = true;
292	>	break;
293	>
294	>	case 1:         // EXEC_RETURN
295	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
296	>	compiled = true;
297	>	break;
298	>
299	>	case 2: {       // EXEC_NATIVE
300	>	uint32 selector = NATIVE_OP_field::extract(opcode);
301	>	switch (selector) {
302	>	case NATIVE_PATCH_NAME_REGISTRY:
303	>	dg.gen_invoke(DoPatchNameRegistry);
304	>	compiled = true;
305	>	break;
306	>	case NATIVE_VIDEO_INSTALL_ACCEL:
307	>	dg.gen_invoke(VideoInstallAccel);
308	>	compiled = true;
309	>	break;
310	>	case NATIVE_VIDEO_VBL:
311	>	dg.gen_invoke(VideoVBL);
312	>	compiled = true;
313	>	break;
314	>	case NATIVE_GET_RESOURCE:
315	>	case NATIVE_GET_1_RESOURCE:
316	>	case NATIVE_GET_IND_RESOURCE:
317	>	case NATIVE_GET_1_IND_RESOURCE:
318	>	case NATIVE_R_GET_RESOURCE: {
319	>	static const uint32 get_resource_ptr[] = {
320	>	XLM_GET_RESOURCE,
321	>	XLM_GET_1_RESOURCE,
322	>	XLM_GET_IND_RESOURCE,
323	>	XLM_GET_1_IND_RESOURCE,
324	>	XLM_R_GET_RESOURCE
325	>	};
326	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
327	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
328	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
329	>	dg.gen_invoke_CPU_im(func, old_get_resource);
330	>	compiled = true;
331	>	break;
332	>	}
333	>	case NATIVE_DISABLE_INTERRUPT:
334	>	dg.gen_invoke(DisableInterrupt);
335	>	compiled = true;
336	>	break;
337	>	case NATIVE_ENABLE_INTERRUPT:
338	>	dg.gen_invoke(EnableInterrupt);
339	>	compiled = true;
340	>	break;
341	>	case NATIVE_CHECK_LOAD_INVOC:
342	>	dg.gen_load_T0_GPR(3);
343	>	dg.gen_load_T1_GPR(4);
344	>	dg.gen_se_16_32_T1();
345	>	dg.gen_load_T2_GPR(5);
346	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
347	>	compiled = true;
348	>	break;
349	>	}
350	>	if (FN_field::test(opcode)) {
351	>	if (compiled) {
352	>	dg.gen_load_A0_LR();
353	>	dg.gen_set_PC_A0();
354	>	}
355	>	cg_context.done_compile = true;
356	>	}
357	>	else
358	>	cg_context.done_compile = false;
359	>	break;
360	>	}
361	>
362	>	default: {      // EMUL_OP
363	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
364	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
365	>	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
366	>	cg_context.done_compile = false;
367	>	compiled = true;
368	>	break;
369	>	}
370	>	}
371	>	return compiled;
372	>	#endif
373	>	return false;
374		}
375
376		// Handle MacOS interrupt
#	Line 260 | Line 390 | void sheepshaver_cpu::interrupt(uint32 e
390		#endif
391
392		// Initialize stack pointer to SheepShaver alternate stack base
393	<	gpr(1) = SheepStack1Base - 64;
393	>	gpr(1) = SignalStackBase() - 64;
394
395		// Build trampoline to return from interrupt
396	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
396	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
397
398		// Prepare registers for nanokernel interrupt routine
399		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 282 | Line 412 | void sheepshaver_cpu::interrupt(uint32 e
412		gpr(1)  = KernelDataAddr;
413		gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
414		gpr(8)  = 0;
415	<	gpr(10) = (uint32)trampoline;
416	<	gpr(12) = (uint32)trampoline;
415	>	gpr(10) = trampoline.addr();
416	>	gpr(12) = trampoline.addr();
417		gpr(13) = get_cr();
418
419		// rlwimi. r7,r7,8,0,0
#	Line 420 | Line 550 | uint32 sheepshaver_cpu::execute_macos_co
550		uint32 saved_ctr= ctr();
551
552		// Build trampoline with EXEC_RETURN
553	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
554	<	lr() = (uint32)trampoline;
553	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
554	>	lr() = trampoline.addr();
555
556		gpr(1) -= 64;                                                           // Create stack frame
557		uint32 proc = ReadMacInt32(tvect);                      // Get routine address
#	Line 465 | Line 595 | inline void sheepshaver_cpu::execute_ppc
595		// Save branch registers
596		uint32 saved_lr = lr();
597
598	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
599	<	lr() = (uint32)trampoline;
598	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
599	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
600	>	lr() = trampoline.addr();
601
602		execute(entry);
603
#	Line 475 | Line 606 | inline void sheepshaver_cpu::execute_ppc
606		}
607
608		// Resource Manager thunk
478	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
479	–
609		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
610		{
611		uint32 type = gpr(3);
#	Line 586 | Line 715 | static sigsegv_return_t sigsegv_handler(
715		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
716		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
717
718	+	// Ignore writes to the zero page
719	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
720	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
721	+
722		// Ignore all other faults, if requested
723		if (PrefsFindBool("ignoresegv"))
724		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
#	Line 611 | Line 744 | void init_emul_ppc(void)
744		// Initialize main CPU emulator
745		main_cpu = new sheepshaver_cpu();
746		main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
747	+	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
748		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
749
750		#if MULTICORE_CPU
#	Line 675 | Line 809 | void exit_emul_ppc(void)
809		void emul_ppc(uint32 entry)
810		{
811		current_cpu = main_cpu;
812	<	#if DEBUG
812	>	#if 0
813		current_cpu->start_log();
814		#endif
815		// start emulation loop and enable code translation or caching
816	<	current_cpu->execute(entry, true);
816	>	current_cpu->execute(entry);
817		}
818
819		/*
#	Line 774 | Line 908 | void sheepshaver_cpu::handle_interrupt(v
908		if (InterruptFlags & INTFLAG_VIA) {
909		ClearInterruptFlag(INTFLAG_VIA);
910		ADBInterrupt();
911	<	ExecutePPC(VideoVBL);
911	>	ExecuteNative(NATIVE_VIDEO_VBL);
912		}
913		}
914		#endif
#	Line 784 | Line 918 | void sheepshaver_cpu::handle_interrupt(v
918		}
919		}
920
787	–	/*
788	–	*  Execute NATIVE_OP opcode (called by PowerPC emulator)
789	–	*/
790	–
791	–	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
792	–	tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
793	–
794	–	// FIXME: Make sure 32-bit relocations are used
795	–	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
796	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
797	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
798	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
799	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
800	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
801	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
802	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
803	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
804	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
805	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
806	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
807	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
808	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
809	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
810	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
811	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
812	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
813	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
814	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
815	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
816	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
817	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
818	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
819	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
820	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
821	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
822	–	};
823	–
921		static void get_resource(void);
922		static void get_1_resource(void);
923		static void get_ind_resource(void);
#	Line 923 | Line 1020 | static void NativeOp(int selector)
1020		case NATIVE_MAKE_EXECUTABLE:
1021		MakeExecutable(0, (void *)GPR(4), GPR(5));
1022		break;
1023	+	case NATIVE_CHECK_LOAD_INVOC:
1024	+	check_load_invoc(GPR(3), GPR(4), GPR(5));
1025	+	break;
1026		default:
1027		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1028		QuitEmulator();
#	Line 935 | Line 1035 | static void NativeOp(int selector)
1035		}
1036
1037		/*
938	–	*  Execute native subroutine (LR must contain return address)
939	–	*/
940	–
941	–	void ExecuteNative(int selector)
942	–	{
943	–	uint32 tvect[2];
944	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
945	–	tvect[1] = 0; // Fake TVECT
946	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
947	–	M68kRegisters r;
948	–	Execute68k((uint32)&desc, &r);
949	–	}
950	–
951	–	/*
1038		*  Execute 68k subroutine (must be ended with EXEC_RETURN)
1039		*  This must only be called by the emul_thread when in EMUL_OP mode
1040		*  r->a[7] is unused, the routine runs on the caller's stack
#	Line 966 | Line 1052 | void Execute68k(uint32 pc, M68kRegisters
1052
1053		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1054		{
1055	<	uint16 proc[2];
1056	<	proc[0] = htons(trap);
1057	<	proc[1] = htons(M68K_RTS);
1058	<	Execute68k((uint32)proc, r);
1055	>	SheepVar proc_var(4);
1056	>	uint32 proc = proc_var.addr();
1057	>	WriteMacInt16(proc, trap);
1058	>	WriteMacInt16(proc + 2, M68K_RTS);
1059	>	Execute68k(proc, r);
1060		}
1061
1062		/*

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