1 |
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/* |
2 |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
3 |
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* |
4 |
< |
* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
4 |
> |
* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
5 |
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* |
6 |
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* This program is free software; you can redistribute it and/or modify |
7 |
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* it under the terms of the GNU General Public License as published by |
30 |
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#include "sigsegv.h" |
31 |
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#include "cpu/ppc/ppc-cpu.hpp" |
32 |
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#include "cpu/ppc/ppc-operations.hpp" |
33 |
+ |
#include "cpu/ppc/ppc-instructions.hpp" |
34 |
+ |
#include "thunks.h" |
35 |
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|
36 |
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// Used for NativeOp trampolines |
37 |
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#include "video.h" |
73 |
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#endif |
74 |
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} |
75 |
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|
76 |
+ |
// From main_*.cpp |
77 |
+ |
extern uintptr SignalStackBase(); |
78 |
+ |
|
79 |
+ |
// From rsrc_patches.cpp |
80 |
+ |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
81 |
+ |
|
82 |
+ |
// PowerPC EmulOp to exit from emulation looop |
83 |
+ |
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
84 |
+ |
|
85 |
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// Enable multicore (main/interrupts) cpu emulation? |
86 |
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#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
87 |
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|
103 |
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// SIGSEGV handler |
104 |
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static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
105 |
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|
106 |
+ |
// JIT Compiler enabled? |
107 |
+ |
static inline bool enable_jit_p() |
108 |
+ |
{ |
109 |
+ |
return PrefsFindBool("jit"); |
110 |
+ |
} |
111 |
+ |
|
112 |
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|
113 |
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/** |
114 |
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* PowerPC emulator glue with special 'sheep' opcodes |
115 |
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**/ |
116 |
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|
117 |
+ |
enum { |
118 |
+ |
PPC_I(SHEEP) = PPC_I(MAX), |
119 |
+ |
PPC_I(SHEEP_MAX) |
120 |
+ |
}; |
121 |
+ |
|
122 |
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class sheepshaver_cpu |
123 |
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: public powerpc_cpu |
124 |
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{ |
130 |
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// Constructor |
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sheepshaver_cpu(); |
132 |
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|
133 |
< |
// Condition Register accessors |
133 |
> |
// CR & XER accessors |
134 |
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uint32 get_cr() const { return cr().get(); } |
135 |
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void set_cr(uint32 v) { cr().set(v); } |
136 |
+ |
uint32 get_xer() const { return xer().get(); } |
137 |
+ |
void set_xer(uint32 v) { xer().set(v); } |
138 |
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|
139 |
< |
// Execution loop |
140 |
< |
void execute(uint32 entry, bool enable_cache = false); |
139 |
> |
// Execute EMUL_OP routine |
140 |
> |
void execute_emul_op(uint32 emul_op); |
141 |
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|
142 |
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// Execute 68k routine |
143 |
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void execute_68k(uint32 entry, M68kRegisters *r); |
148 |
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// Execute MacOS/PPC code |
149 |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
150 |
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|
151 |
+ |
// Compile one instruction |
152 |
+ |
virtual bool compile1(codegen_context_t & cg_context); |
153 |
+ |
|
154 |
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// Resource manager thunk |
155 |
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void get_resource(uint32 old_get_resource); |
156 |
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|
171 |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
172 |
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}; |
173 |
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|
174 |
< |
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
174 |
> |
// FIXME: this specialization doesn't work with GCC |
175 |
> |
// template<> lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
176 |
> |
template< class data_type, template< class > class allocator_type > |
177 |
> |
allocator_type< data_type > allocator_helper< data_type, allocator_type >::allocator; |
178 |
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|
179 |
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sheepshaver_cpu::sheepshaver_cpu() |
180 |
< |
: powerpc_cpu() |
180 |
> |
: powerpc_cpu(enable_jit_p()) |
181 |
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{ |
182 |
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init_decoder(); |
183 |
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} |
184 |
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|
185 |
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void sheepshaver_cpu::init_decoder() |
186 |
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{ |
157 |
– |
#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
158 |
– |
static bool initialized = false; |
159 |
– |
if (initialized) |
160 |
– |
return; |
161 |
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initialized = true; |
162 |
– |
#endif |
163 |
– |
|
187 |
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static const instr_info_t sheep_ii_table[] = { |
188 |
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{ "sheep", |
189 |
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(execute_pmf)&sheepshaver_cpu::execute_sheep, |
190 |
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NULL, |
191 |
+ |
PPC_I(SHEEP), |
192 |
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D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
193 |
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} |
194 |
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}; |
216 |
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typedef bit_field< 21, 25 > NATIVE_OP_field; |
217 |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
218 |
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|
219 |
+ |
// Execute EMUL_OP routine |
220 |
+ |
void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
221 |
+ |
{ |
222 |
+ |
M68kRegisters r68; |
223 |
+ |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
224 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
225 |
+ |
for (int i = 0; i < 8; i++) |
226 |
+ |
r68.d[i] = gpr(8 + i); |
227 |
+ |
for (int i = 0; i < 7; i++) |
228 |
+ |
r68.a[i] = gpr(16 + i); |
229 |
+ |
r68.a[7] = gpr(1); |
230 |
+ |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
231 |
+ |
uint32 saved_xer = get_xer(); |
232 |
+ |
EmulOp(&r68, gpr(24), emul_op); |
233 |
+ |
set_cr(saved_cr); |
234 |
+ |
set_xer(saved_xer); |
235 |
+ |
for (int i = 0; i < 8; i++) |
236 |
+ |
gpr(8 + i) = r68.d[i]; |
237 |
+ |
for (int i = 0; i < 7; i++) |
238 |
+ |
gpr(16 + i) = r68.a[i]; |
239 |
+ |
gpr(1) = r68.a[7]; |
240 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
241 |
+ |
} |
242 |
+ |
|
243 |
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// Execute SheepShaver instruction |
244 |
|
void sheepshaver_cpu::execute_sheep(uint32 opcode) |
245 |
|
{ |
263 |
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pc() += 4; |
264 |
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break; |
265 |
|
|
266 |
< |
default: { // EMUL_OP |
267 |
< |
M68kRegisters r68; |
220 |
< |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
221 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
222 |
< |
for (int i = 0; i < 8; i++) |
223 |
< |
r68.d[i] = gpr(8 + i); |
224 |
< |
for (int i = 0; i < 7; i++) |
225 |
< |
r68.a[i] = gpr(16 + i); |
226 |
< |
r68.a[7] = gpr(1); |
227 |
< |
EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3); |
228 |
< |
for (int i = 0; i < 8; i++) |
229 |
< |
gpr(8 + i) = r68.d[i]; |
230 |
< |
for (int i = 0; i < 7; i++) |
231 |
< |
gpr(16 + i) = r68.a[i]; |
232 |
< |
gpr(1) = r68.a[7]; |
233 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
266 |
> |
default: // EMUL_OP |
267 |
> |
execute_emul_op(EMUL_OP_field::extract(opcode) - 3); |
268 |
|
pc() += 4; |
269 |
|
break; |
270 |
|
} |
237 |
– |
} |
271 |
|
} |
272 |
|
|
273 |
< |
// Execution loop |
274 |
< |
void sheepshaver_cpu::execute(uint32 entry, bool enable_cache) |
273 |
> |
// Compile one instruction |
274 |
> |
bool sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
275 |
|
{ |
276 |
< |
powerpc_cpu::execute(entry, enable_cache); |
276 |
> |
#if PPC_ENABLE_JIT |
277 |
> |
const instr_info_t *ii = cg_context.instr_info; |
278 |
> |
if (ii->mnemo != PPC_I(SHEEP)) |
279 |
> |
return false; |
280 |
> |
|
281 |
> |
bool compiled = false; |
282 |
> |
powerpc_dyngen & dg = cg_context.codegen; |
283 |
> |
uint32 opcode = cg_context.opcode; |
284 |
> |
|
285 |
> |
switch (opcode & 0x3f) { |
286 |
> |
case 0: // EMUL_RETURN |
287 |
> |
dg.gen_invoke(QuitEmulator); |
288 |
> |
compiled = true; |
289 |
> |
break; |
290 |
> |
|
291 |
> |
case 1: // EXEC_RETURN |
292 |
> |
dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN); |
293 |
> |
compiled = true; |
294 |
> |
break; |
295 |
> |
|
296 |
> |
case 2: { // EXEC_NATIVE |
297 |
> |
uint32 selector = NATIVE_OP_field::extract(opcode); |
298 |
> |
switch (selector) { |
299 |
> |
case NATIVE_PATCH_NAME_REGISTRY: |
300 |
> |
dg.gen_invoke(DoPatchNameRegistry); |
301 |
> |
compiled = true; |
302 |
> |
break; |
303 |
> |
case NATIVE_VIDEO_INSTALL_ACCEL: |
304 |
> |
dg.gen_invoke(VideoInstallAccel); |
305 |
> |
compiled = true; |
306 |
> |
break; |
307 |
> |
case NATIVE_VIDEO_VBL: |
308 |
> |
dg.gen_invoke(VideoVBL); |
309 |
> |
compiled = true; |
310 |
> |
break; |
311 |
> |
case NATIVE_GET_RESOURCE: |
312 |
> |
case NATIVE_GET_1_RESOURCE: |
313 |
> |
case NATIVE_GET_IND_RESOURCE: |
314 |
> |
case NATIVE_GET_1_IND_RESOURCE: |
315 |
> |
case NATIVE_R_GET_RESOURCE: { |
316 |
> |
static const uint32 get_resource_ptr[] = { |
317 |
> |
XLM_GET_RESOURCE, |
318 |
> |
XLM_GET_1_RESOURCE, |
319 |
> |
XLM_GET_IND_RESOURCE, |
320 |
> |
XLM_GET_1_IND_RESOURCE, |
321 |
> |
XLM_R_GET_RESOURCE |
322 |
> |
}; |
323 |
> |
uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]); |
324 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
325 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr(); |
326 |
> |
dg.gen_invoke_CPU_im(func, old_get_resource); |
327 |
> |
compiled = true; |
328 |
> |
break; |
329 |
> |
} |
330 |
> |
case NATIVE_DISABLE_INTERRUPT: |
331 |
> |
dg.gen_invoke(DisableInterrupt); |
332 |
> |
compiled = true; |
333 |
> |
break; |
334 |
> |
case NATIVE_ENABLE_INTERRUPT: |
335 |
> |
dg.gen_invoke(EnableInterrupt); |
336 |
> |
compiled = true; |
337 |
> |
break; |
338 |
> |
case NATIVE_CHECK_LOAD_INVOC: |
339 |
> |
dg.gen_load_T0_GPR(3); |
340 |
> |
dg.gen_load_T1_GPR(4); |
341 |
> |
dg.gen_se_16_32_T1(); |
342 |
> |
dg.gen_load_T2_GPR(5); |
343 |
> |
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc); |
344 |
> |
compiled = true; |
345 |
> |
break; |
346 |
> |
} |
347 |
> |
if (FN_field::test(opcode)) { |
348 |
> |
if (compiled) { |
349 |
> |
dg.gen_load_A0_LR(); |
350 |
> |
dg.gen_set_PC_A0(); |
351 |
> |
} |
352 |
> |
cg_context.done_compile = true; |
353 |
> |
} |
354 |
> |
else |
355 |
> |
cg_context.done_compile = false; |
356 |
> |
break; |
357 |
> |
} |
358 |
> |
|
359 |
> |
default: { // EMUL_OP |
360 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
361 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
362 |
> |
dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3); |
363 |
> |
cg_context.done_compile = false; |
364 |
> |
compiled = true; |
365 |
> |
break; |
366 |
> |
} |
367 |
> |
} |
368 |
> |
return compiled; |
369 |
> |
#endif |
370 |
> |
return false; |
371 |
|
} |
372 |
|
|
373 |
|
// Handle MacOS interrupt |
387 |
|
#endif |
388 |
|
|
389 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
390 |
< |
gpr(1) = SheepStack1Base - 64; |
390 |
> |
gpr(1) = SignalStackBase() - 64; |
391 |
|
|
392 |
|
// Build trampoline to return from interrupt |
393 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
393 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
394 |
|
|
395 |
|
// Prepare registers for nanokernel interrupt routine |
396 |
|
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
409 |
|
gpr(1) = KernelDataAddr; |
410 |
|
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
411 |
|
gpr(8) = 0; |
412 |
< |
gpr(10) = (uint32)trampoline; |
413 |
< |
gpr(12) = (uint32)trampoline; |
412 |
> |
gpr(10) = trampoline.addr(); |
413 |
> |
gpr(12) = trampoline.addr(); |
414 |
|
gpr(13) = get_cr(); |
415 |
|
|
416 |
|
// rlwimi. r7,r7,8,0,0 |
547 |
|
uint32 saved_ctr= ctr(); |
548 |
|
|
549 |
|
// Build trampoline with EXEC_RETURN |
550 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
551 |
< |
lr() = (uint32)trampoline; |
550 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
551 |
> |
lr() = trampoline.addr(); |
552 |
|
|
553 |
|
gpr(1) -= 64; // Create stack frame |
554 |
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
592 |
|
// Save branch registers |
593 |
|
uint32 saved_lr = lr(); |
594 |
|
|
595 |
< |
const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
596 |
< |
lr() = (uint32)trampoline; |
595 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
596 |
> |
WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN); |
597 |
> |
lr() = trampoline.addr(); |
598 |
|
|
599 |
|
execute(entry); |
600 |
|
|
603 |
|
} |
604 |
|
|
605 |
|
// Resource Manager thunk |
478 |
– |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
479 |
– |
|
606 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
607 |
|
{ |
608 |
|
uint32 type = gpr(3); |
737 |
|
// Initialize main CPU emulator |
738 |
|
main_cpu = new sheepshaver_cpu(); |
739 |
|
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
740 |
+ |
main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
741 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
742 |
|
|
743 |
|
#if MULTICORE_CPU |
802 |
|
void emul_ppc(uint32 entry) |
803 |
|
{ |
804 |
|
current_cpu = main_cpu; |
805 |
< |
#if DEBUG |
805 |
> |
#if 0 |
806 |
|
current_cpu->start_log(); |
807 |
|
#endif |
808 |
|
// start emulation loop and enable code translation or caching |
809 |
< |
current_cpu->execute(entry, true); |
809 |
> |
current_cpu->execute(entry); |
810 |
|
} |
811 |
|
|
812 |
|
/* |
901 |
|
if (InterruptFlags & INTFLAG_VIA) { |
902 |
|
ClearInterruptFlag(INTFLAG_VIA); |
903 |
|
ADBInterrupt(); |
904 |
< |
ExecutePPC(VideoVBL); |
904 |
> |
ExecuteNative(NATIVE_VIDEO_VBL); |
905 |
|
} |
906 |
|
} |
907 |
|
#endif |
911 |
|
} |
912 |
|
} |
913 |
|
|
787 |
– |
/* |
788 |
– |
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
789 |
– |
*/ |
790 |
– |
|
791 |
– |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
792 |
– |
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
793 |
– |
|
794 |
– |
// FIXME: Make sure 32-bit relocations are used |
795 |
– |
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
796 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
797 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
798 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
799 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
800 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
801 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
802 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
803 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
804 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
805 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
806 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
807 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
808 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
809 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
810 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
811 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
812 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
813 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
814 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
815 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
816 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
817 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
818 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
819 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
820 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
821 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE), |
822 |
– |
}; |
823 |
– |
|
914 |
|
static void get_resource(void); |
915 |
|
static void get_1_resource(void); |
916 |
|
static void get_ind_resource(void); |
1013 |
|
case NATIVE_MAKE_EXECUTABLE: |
1014 |
|
MakeExecutable(0, (void *)GPR(4), GPR(5)); |
1015 |
|
break; |
1016 |
+ |
case NATIVE_CHECK_LOAD_INVOC: |
1017 |
+ |
check_load_invoc(GPR(3), GPR(4), GPR(5)); |
1018 |
+ |
break; |
1019 |
|
default: |
1020 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
1021 |
|
QuitEmulator(); |
1028 |
|
} |
1029 |
|
|
1030 |
|
/* |
938 |
– |
* Execute native subroutine (LR must contain return address) |
939 |
– |
*/ |
940 |
– |
|
941 |
– |
void ExecuteNative(int selector) |
942 |
– |
{ |
943 |
– |
uint32 tvect[2]; |
944 |
– |
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
945 |
– |
tvect[1] = 0; // Fake TVECT |
946 |
– |
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
947 |
– |
M68kRegisters r; |
948 |
– |
Execute68k((uint32)&desc, &r); |
949 |
– |
} |
950 |
– |
|
951 |
– |
/* |
1031 |
|
* Execute 68k subroutine (must be ended with EXEC_RETURN) |
1032 |
|
* This must only be called by the emul_thread when in EMUL_OP mode |
1033 |
|
* r->a[7] is unused, the routine runs on the caller's stack |
1045 |
|
|
1046 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
1047 |
|
{ |
1048 |
< |
uint16 proc[2]; |
1049 |
< |
proc[0] = htons(trap); |
1050 |
< |
proc[1] = htons(M68K_RTS); |
1051 |
< |
Execute68k((uint32)proc, r); |
1048 |
> |
SheepVar proc_var(4); |
1049 |
> |
uint32 proc = proc_var.addr(); |
1050 |
> |
WriteMacInt16(proc, trap); |
1051 |
> |
WriteMacInt16(proc + 2, M68K_RTS); |
1052 |
> |
Execute68k(proc, r); |
1053 |
|
} |
1054 |
|
|
1055 |
|
/* |