[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.70 by gbeauche, 2006-05-14T07:21:10Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 30 \| Line 30
30		#include "sigsegv.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 47 \| Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 70 \| Line 84 \| static void enter_mon(void)
84		#endif
85		}
86
87	<	// Enable multicore (main/interrupts) cpu emulation?
88	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87	>	// From main_*.cpp
88	>	extern uintptr SignalStackBase();
89	>
90	>	// From rsrc_patches.cpp
91	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	>	extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h);
93	>
94	>	// PowerPC EmulOp to exit from emulation looop
95	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
96
97		// Enable Execute68k() safety checks?
98		#define SAFE_EXEC_68K 1
#	Line 86 \| Line 107 \| static void enter_mon(void)
107		#define INTERRUPTS_IN_NATIVE_MODE 1
108
109		// Pointer to Kernel Data
110	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110	>	static KernelData * kernel_data;
111	>
112	>	// SIGSEGV handler
113	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
114	>
115	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
116	>	// Special trampolines for EmulOp and NativeOp
117	>	static uint8 *emul_op_trampoline;
118	>	static uint8 *native_op_trampoline;
119	>	#endif
120	>
121	>	// JIT Compiler enabled?
122	>	static inline bool enable_jit_p()
123	>	{
124	>	return PrefsFindBool("jit");
125	>	}
126
127
128		/**
129		* PowerPC emulator glue with special 'sheep' opcodes
130		**/
131
132	+	enum {
133	+	PPC_I(SHEEP) = PPC_I(MAX),
134	+	PPC_I(SHEEP_MAX)
135	+	};
136	+
137		class sheepshaver_cpu
138		: public powerpc_cpu
139		{
#	Line 104 \| Line 145 \| public:
145		// Constructor
146		sheepshaver_cpu();
147
148	<	// Condition Register accessors
148	>	// CR & XER accessors
149		uint32 get_cr() const { return cr().get(); }
150		void set_cr(uint32 v) { cr().set(v); }
151	+	uint32 get_xer() const { return xer().get(); }
152	+	void set_xer(uint32 v) { xer().set(v); }
153	+
154	+	// Execute NATIVE_OP routine
155	+	void execute_native_op(uint32 native_op);
156
157	<	// Execution loop
158	<	void execute(uint32 entry, bool enable_cache = false);
157	>	// Execute EMUL_OP routine
158	>	void execute_emul_op(uint32 emul_op);
159
160		// Execute 68k routine
161		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 120 \| Line 166 \| public:
166		// Execute MacOS/PPC code
167		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
168
169	+	#if PPC_ENABLE_JIT
170	+	// Compile one instruction
171	+	virtual int compile1(codegen_context_t & cg_context);
172	+	#endif
173		// Resource manager thunk
174		void get_resource(uint32 old_get_resource);
175
176		// Handle MacOS interrupt
177		void interrupt(uint32 entry);
128	–	void handle_interrupt();
178
179	<	// Lazy memory allocator (one item at a time)
180	<	void *operator new(size_t size)
132	<	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
133	<	void operator delete(void *p)
134	<	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
135	<	// FIXME: really make surre array allocation fail at link time?
136	<	void *operator new[](size_t);
137	<	void operator delete[](void *p);
179	>	// Make sure the SIGSEGV handler can access CPU registers
180	>	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
181		};
182
140	–	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
141	–
183		sheepshaver_cpu::sheepshaver_cpu()
184	<	: powerpc_cpu()
184	>	: powerpc_cpu(enable_jit_p())
185		{
186		init_decoder();
187		}
188
189		void sheepshaver_cpu::init_decoder()
190		{
150	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
151	–	static bool initialized = false;
152	–	if (initialized)
153	–	return;
154	–	initialized = true;
155	–	#endif
156	–
191		static const instr_info_t sheep_ii_table[] = {
192		{ "sheep",
193		(execute_pmf)&sheepshaver_cpu::execute_sheep,
194		NULL,
195	+	PPC_I(SHEEP),
196		D_form, 6, 0, CFLOW_JUMP \| CFLOW_TRAP
197		}
198		};
#	Line 171 \| Line 206 \| void sheepshaver_cpu::init_decoder()
206		}
207		}
208
174	–	// Forward declaration for native opcode handler
175	–	static void NativeOp(int selector);
176	–
209		/* NativeOp instruction format:
210	<	+------------+--------------------------+--+----------+------------+
211	<	\| 6 \| \|FN\| OP \| 2 \|
212	<	+------------+--------------------------+--+----------+------------+
213	<	0 5 \|6 19 20 21 25 26 31
210	>	+------------+-------------------------+--+-----------+------------+
211	>	\| 6 \| \|FN\| OP \| 2 \|
212	>	+------------+-------------------------+--+-----------+------------+
213	>	0 5 \|6 18 19 20 25 26 31
214		*/
215
216	<	typedef bit_field< 20, 20 > FN_field;
217	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
216	>	typedef bit_field< 19, 19 > FN_field;
217	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
218		typedef bit_field< 26, 31 > EMUL_OP_field;
219
220	+	// Execute EMUL_OP routine
221	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
222	+	{
223	+	M68kRegisters r68;
224	+	WriteMacInt32(XLM_68K_R25, gpr(25));
225	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
226	+	for (int i = 0; i < 8; i++)
227	+	r68.d[i] = gpr(8 + i);
228	+	for (int i = 0; i < 7; i++)
229	+	r68.a[i] = gpr(16 + i);
230	+	r68.a[7] = gpr(1);
231	+	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
232	+	uint32 saved_xer = get_xer();
233	+	EmulOp(&r68, gpr(24), emul_op);
234	+	set_cr(saved_cr);
235	+	set_xer(saved_xer);
236	+	for (int i = 0; i < 8; i++)
237	+	gpr(8 + i) = r68.d[i];
238	+	for (int i = 0; i < 7; i++)
239	+	gpr(16 + i) = r68.a[i];
240	+	gpr(1) = r68.a[7];
241	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
242	+	}
243	+
244		// Execute SheepShaver instruction
245		void sheepshaver_cpu::execute_sheep(uint32 opcode)
246		{
#	Line 201 \| Line 257 \| void sheepshaver_cpu::execute_sheep(uint
257		break;
258
259		case 2: // EXEC_NATIVE
260	<	NativeOp(NATIVE_OP_field::extract(opcode));
260	>	execute_native_op(NATIVE_OP_field::extract(opcode));
261		if (FN_field::test(opcode))
262		pc() = lr();
263		else
264		pc() += 4;
265		break;
266
267	<	default: { // EMUL_OP
268	<	M68kRegisters r68;
213	<	WriteMacInt32(XLM_68K_R25, gpr(25));
214	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
215	<	for (int i = 0; i < 8; i++)
216	<	r68.d[i] = gpr(8 + i);
217	<	for (int i = 0; i < 7; i++)
218	<	r68.a[i] = gpr(16 + i);
219	<	r68.a[7] = gpr(1);
220	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
221	<	for (int i = 0; i < 8; i++)
222	<	gpr(8 + i) = r68.d[i];
223	<	for (int i = 0; i < 7; i++)
224	<	gpr(16 + i) = r68.a[i];
225	<	gpr(1) = r68.a[7];
226	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
267	>	default: // EMUL_OP
268	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
269		pc() += 4;
270		break;
271		}
230	–	}
272		}
273
274	<	// Execution loop
275	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
276	<	{
277	<	powerpc_cpu::execute(entry, enable_cache);
274	>	// Compile one instruction
275	>	#if PPC_ENABLE_JIT
276	>	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
277	>	{
278	>	const instr_info_t *ii = cg_context.instr_info;
279	>	if (ii->mnemo != PPC_I(SHEEP))
280	>	return COMPILE_FAILURE;
281	>
282	>	int status = COMPILE_FAILURE;
283	>	powerpc_dyngen & dg = cg_context.codegen;
284	>	uint32 opcode = cg_context.opcode;
285	>
286	>	switch (opcode & 0x3f) {
287	>	case 0: // EMUL_RETURN
288	>	dg.gen_invoke(QuitEmulator);
289	>	status = COMPILE_CODE_OK;
290	>	break;
291	>
292	>	case 1: // EXEC_RETURN
293	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
294	>	// Don't check for pending interrupts, we do know we have to
295	>	// get out of this block ASAP
296	>	dg.gen_exec_return();
297	>	status = COMPILE_EPILOGUE_OK;
298	>	break;
299	>
300	>	case 2: { // EXEC_NATIVE
301	>	uint32 selector = NATIVE_OP_field::extract(opcode);
302	>	switch (selector) {
303	>	#if !PPC_REENTRANT_JIT
304	>	// Filter out functions that may invoke Execute68k() or
305	>	// CallMacOS(), this would break reentrancy as they could
306	>	// invalidate the translation cache and even overwrite
307	>	// continuation code when we are done with them.
308	>	case NATIVE_PATCH_NAME_REGISTRY:
309	>	dg.gen_invoke(DoPatchNameRegistry);
310	>	status = COMPILE_CODE_OK;
311	>	break;
312	>	case NATIVE_VIDEO_INSTALL_ACCEL:
313	>	dg.gen_invoke(VideoInstallAccel);
314	>	status = COMPILE_CODE_OK;
315	>	break;
316	>	case NATIVE_VIDEO_VBL:
317	>	dg.gen_invoke(VideoVBL);
318	>	status = COMPILE_CODE_OK;
319	>	break;
320	>	case NATIVE_GET_RESOURCE:
321	>	case NATIVE_GET_1_RESOURCE:
322	>	case NATIVE_GET_IND_RESOURCE:
323	>	case NATIVE_GET_1_IND_RESOURCE:
324	>	case NATIVE_R_GET_RESOURCE: {
325	>	static const uint32 get_resource_ptr[] = {
326	>	XLM_GET_RESOURCE,
327	>	XLM_GET_1_RESOURCE,
328	>	XLM_GET_IND_RESOURCE,
329	>	XLM_GET_1_IND_RESOURCE,
330	>	XLM_R_GET_RESOURCE
331	>	};
332	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
333	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
334	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
335	>	dg.gen_invoke_CPU_im(func, old_get_resource);
336	>	status = COMPILE_CODE_OK;
337	>	break;
338	>	}
339	>	#endif
340	>	case NATIVE_CHECK_LOAD_INVOC:
341	>	dg.gen_load_T0_GPR(3);
342	>	dg.gen_load_T1_GPR(4);
343	>	dg.gen_se_16_32_T1();
344	>	dg.gen_load_T2_GPR(5);
345	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
346	>	status = COMPILE_CODE_OK;
347	>	break;
348	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
349	>	dg.gen_load_T0_GPR(3);
350	>	dg.gen_load_T1_GPR(4);
351	>	dg.gen_load_T2_GPR(5);
352	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
353	>	status = COMPILE_CODE_OK;
354	>	break;
355	>	case NATIVE_NQD_SYNC_HOOK:
356	>	dg.gen_load_T0_GPR(3);
357	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_sync_hook);
358	>	dg.gen_store_T0_GPR(3);
359	>	status = COMPILE_CODE_OK;
360	>	break;
361	>	case NATIVE_NQD_BITBLT_HOOK:
362	>	dg.gen_load_T0_GPR(3);
363	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_bitblt_hook);
364	>	dg.gen_store_T0_GPR(3);
365	>	status = COMPILE_CODE_OK;
366	>	break;
367	>	case NATIVE_NQD_FILLRECT_HOOK:
368	>	dg.gen_load_T0_GPR(3);
369	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_fillrect_hook);
370	>	dg.gen_store_T0_GPR(3);
371	>	status = COMPILE_CODE_OK;
372	>	break;
373	>	case NATIVE_NQD_UNKNOWN_HOOK:
374	>	dg.gen_load_T0_GPR(3);
375	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_unknown_hook);
376	>	dg.gen_store_T0_GPR(3);
377	>	status = COMPILE_CODE_OK;
378	>	break;
379	>	case NATIVE_NQD_BITBLT:
380	>	dg.gen_load_T0_GPR(3);
381	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
382	>	status = COMPILE_CODE_OK;
383	>	break;
384	>	case NATIVE_NQD_INVRECT:
385	>	dg.gen_load_T0_GPR(3);
386	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
387	>	status = COMPILE_CODE_OK;
388	>	break;
389	>	case NATIVE_NQD_FILLRECT:
390	>	dg.gen_load_T0_GPR(3);
391	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
392	>	status = COMPILE_CODE_OK;
393	>	break;
394	>	}
395	>	// Could we fully translate this NativeOp?
396	>	if (status == COMPILE_CODE_OK) {
397	>	if (!FN_field::test(opcode))
398	>	cg_context.done_compile = false;
399	>	else {
400	>	dg.gen_load_A0_LR();
401	>	dg.gen_set_PC_A0();
402	>	cg_context.done_compile = true;
403	>	}
404	>	break;
405	>	}
406	>	#if PPC_REENTRANT_JIT
407	>	// Try to execute NativeOp trampoline
408	>	if (!FN_field::test(opcode))
409	>	dg.gen_set_PC_im(cg_context.pc + 4);
410	>	else {
411	>	dg.gen_load_A0_LR();
412	>	dg.gen_set_PC_A0();
413	>	}
414	>	dg.gen_mov_32_T0_im(selector);
415	>	dg.gen_jmp(native_op_trampoline);
416	>	cg_context.done_compile = true;
417	>	status = COMPILE_EPILOGUE_OK;
418	>	break;
419	>	#endif
420	>	// Invoke NativeOp handler
421	>	if (!FN_field::test(opcode)) {
422	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
423	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
424	>	dg.gen_invoke_CPU_im(func, selector);
425	>	cg_context.done_compile = false;
426	>	status = COMPILE_CODE_OK;
427	>	}
428	>	// Otherwise, let it generate a call to execute_sheep() which
429	>	// will cause necessary updates to the program counter
430	>	break;
431	>	}
432	>
433	>	default: { // EMUL_OP
434	>	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
435	>	#if PPC_REENTRANT_JIT
436	>	// Try to execute EmulOp trampoline
437	>	dg.gen_set_PC_im(cg_context.pc + 4);
438	>	dg.gen_mov_32_T0_im(emul_op);
439	>	dg.gen_jmp(emul_op_trampoline);
440	>	cg_context.done_compile = true;
441	>	status = COMPILE_EPILOGUE_OK;
442	>	break;
443	>	#endif
444	>	// Invoke EmulOp handler
445	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
446	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
447	>	dg.gen_invoke_CPU_im(func, emul_op);
448	>	cg_context.done_compile = false;
449	>	status = COMPILE_CODE_OK;
450	>	break;
451	>	}
452	>	}
453	>	return status;
454		}
455	+	#endif
456
457		// Handle MacOS interrupt
458		void sheepshaver_cpu::interrupt(uint32 entry)
459		{
460		#if EMUL_TIME_STATS
461	<	interrupt_count++;
461	>	ppc_interrupt_count++;
462		const clock_t interrupt_start = clock();
463		#endif
464
247	–	#if !MULTICORE_CPU
465		// Save program counters and branch registers
466		uint32 saved_pc = pc();
467		uint32 saved_lr = lr();
468		uint32 saved_ctr= ctr();
469		uint32 saved_sp = gpr(1);
253	–	#endif
470
471		// Initialize stack pointer to SheepShaver alternate stack base
472	<	gpr(1) = SheepStack1Base - 64;
472	>	gpr(1) = SignalStackBase() - 64;
473
474		// Build trampoline to return from interrupt
475	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
475	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
476
477		// Prepare registers for nanokernel interrupt routine
478		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 275 \| Line 491 \| void sheepshaver_cpu::interrupt(uint32 e
491		gpr(1) = KernelDataAddr;
492		gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
493		gpr(8) = 0;
494	<	gpr(10) = (uint32)trampoline;
495	<	gpr(12) = (uint32)trampoline;
494	>	gpr(10) = trampoline.addr();
495	>	gpr(12) = trampoline.addr();
496		gpr(13) = get_cr();
497
498		// rlwimi. r7,r7,8,0,0
#	Line 290 \| Line 506 \| void sheepshaver_cpu::interrupt(uint32 e
506		// Enter nanokernel
507		execute(entry);
508
293	–	#if !MULTICORE_CPU
509		// Restore program counters and branch registers
510		pc() = saved_pc;
511		lr() = saved_lr;
512		ctr()= saved_ctr;
513		gpr(1) = saved_sp;
299	–	#endif
514
515		#if EMUL_TIME_STATS
516		interrupt_time += (clock() - interrupt_start);
#	Line 413 \| Line 627 \| uint32 sheepshaver_cpu::execute_macos_co
627		uint32 saved_ctr= ctr();
628
629		// Build trampoline with EXEC_RETURN
630	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
631	<	lr() = (uint32)trampoline;
630	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
631	>	lr() = trampoline.addr();
632
633		gpr(1) -= 64; // Create stack frame
634		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 458 \| Line 672 \| inline void sheepshaver_cpu::execute_ppc
672		// Save branch registers
673		uint32 saved_lr = lr();
674
675	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
676	<	lr() = (uint32)trampoline;
675	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
676	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
677	>	lr() = trampoline.addr();
678
679		execute(entry);
680
#	Line 468 \| Line 683 \| inline void sheepshaver_cpu::execute_ppc
683		}
684
685		// Resource Manager thunk
471	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
472	–
686		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
687		{
688		uint32 type = gpr(3);
#	Line 495 \| Line 708 \| inline void sheepshaver_cpu::get_resourc
708		* SheepShaver CPU engine interface
709		**/
710
711	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
712	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
500	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
711	>	// PowerPC CPU emulator
712	>	static sheepshaver_cpu *ppc_cpu = NULL;
713
714		void FlushCodeCache(uintptr start, uintptr end)
715		{
716		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
717	<	main_cpu->invalidate_cache_range(start, end);
506	<	#if MULTICORE_CPU
507	<	interrupt_cpu->invalidate_cache_range(start, end);
508	<	#endif
509	<	}
510	<
511	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
512	<	{
513	<	#if MULTICORE_CPU
514	<	current_cpu = new_cpu;
515	<	#endif
516	<	}
517	<
518	<	static inline void cpu_pop()
519	<	{
520	<	#if MULTICORE_CPU
521	<	current_cpu = main_cpu;
522	<	#endif
717	>	ppc_cpu->invalidate_cache_range(start, end);
718		}
719
720		// Dump PPC registers
721		static void dump_registers(void)
722		{
723	<	current_cpu->dump_registers();
723	>	ppc_cpu->dump_registers();
724		}
725
726		// Dump log
727		static void dump_log(void)
728		{
729	<	current_cpu->dump_log();
729	>	ppc_cpu->dump_log();
730		}
731
732		/*
733		* Initialize CPU emulation
734		*/
735
736	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
736	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
737		{
738		#if ENABLE_VOSF
739		// Handle screen fault
#	Line 550 \| Line 745 \| static sigsegv_return_t sigsegv_handler(
745		const uintptr addr = (uintptr)fault_address;
746		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
747		// Ignore writes to ROM
748	<	if ((addr - ROM_BASE) < ROM_SIZE)
748	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
749		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
750
751	<	// Ignore all other faults, if requested
752	<	if (PrefsFindBool("ignoresegv"))
753	<	return SIGSEGV_RETURN_FAILURE;
751	>	// Get program counter of target CPU
752	>	sheepshaver_cpu * const cpu = ppc_cpu;
753	>	const uint32 pc = cpu->pc();
754	>
755	>	// Fault in Mac ROM or RAM?
756	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
757	>	if (mac_fault) {
758	>
759	>	// "VM settings" during MacOS 8 installation
760	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
761	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
762	>
763	>	// MacOS 8.5 installation
764	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
765	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
766	>
767	>	// MacOS 8 serial drivers on startup
768	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 \|\| cpu->gpr(8) == 0xf3012000))
769	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
770	>
771	>	// MacOS 8.1 serial drivers on startup
772	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
773	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
774	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
775	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
776	>
777	>	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
778	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
779	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
780	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
781	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
782	>
783	>	// Ignore writes to the zero page
784	>	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
785	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
786	>
787	>	// Ignore all other faults, if requested
788	>	if (PrefsFindBool("ignoresegv"))
789	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
790	>	}
791		#else
792		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
793		#endif
794
795	<	printf("SIGSEGV\n");
796	<	printf(" pc %p\n", fault_instruction);
797	<	printf(" ea %p\n", fault_address);
566	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
795	>	fprintf(stderr, "SIGSEGV\n");
796	>	fprintf(stderr, " pc %p\n", fault_instruction);
797	>	fprintf(stderr, " ea %p\n", fault_address);
798		dump_registers();
799	<	current_cpu->dump_log();
799	>	ppc_cpu->dump_log();
800		enter_mon();
801		QuitEmulator();
802
#	Line 574 \| Line 805 \| static sigsegv_return_t sigsegv_handler(
805
806		void init_emul_ppc(void)
807		{
808	+	// Get pointer to KernelData in host address space
809	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
810	+
811		// Initialize main CPU emulator
812	<	main_cpu = new sheepshaver_cpu();
813	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
812	>	ppc_cpu = new sheepshaver_cpu();
813	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
814	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
815		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
816
582	–	#if MULTICORE_CPU
583	–	// Initialize alternate CPU emulator to handle interrupts
584	–	interrupt_cpu = new sheepshaver_cpu();
585	–	#endif
586	–
587	–	// Install the handler for SIGSEGV
588	–	sigsegv_install_handler(sigsegv_handler);
589	–
817		#if ENABLE_MON
818		// Install "regs" command in cxmon
819		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 612 \| Line 839 \| void exit_emul_ppc(void)
839		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
840		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
841		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
842	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
843	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
844
845		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
846		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 628 \| Line 857 \| void exit_emul_ppc(void)
857		printf("\n");
858		#endif
859
860	<	delete main_cpu;
861	<	#if MULTICORE_CPU
633	<	delete interrupt_cpu;
634	<	#endif
860	>	delete ppc_cpu;
861	>	ppc_cpu = NULL;
862		}
863
864	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
865	+	// Initialize EmulOp trampolines
866	+	void init_emul_op_trampolines(basic_dyngen & dg)
867	+	{
868	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
869	+	func_t func;
870	+
871	+	// EmulOp
872	+	emul_op_trampoline = dg.gen_start();
873	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
874	+	dg.gen_invoke_CPU_T0(func);
875	+	dg.gen_exec_return();
876	+	dg.gen_end();
877	+
878	+	// NativeOp
879	+	native_op_trampoline = dg.gen_start();
880	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
881	+	dg.gen_invoke_CPU_T0(func);
882	+	dg.gen_exec_return();
883	+	dg.gen_end();
884	+
885	+	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
886	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
887	+	}
888	+	#endif
889	+
890		/*
891		* Emulation loop
892		*/
893
894		void emul_ppc(uint32 entry)
895		{
896	<	current_cpu = main_cpu;
897	<	#if DEBUG
645	<	current_cpu->start_log();
896	>	#if 0
897	>	ppc_cpu->start_log();
898		#endif
899		// start emulation loop and enable code translation or caching
900	<	current_cpu->execute(entry, true);
900	>	ppc_cpu->execute(entry);
901		}
902
903		/*
904		* Handle PowerPC interrupt
905		*/
906
655	–	#if ASYNC_IRQ
656	–	void HandleInterrupt(void)
657	–	{
658	–	main_cpu->handle_interrupt();
659	–	}
660	–	#else
907		void TriggerInterrupt(void)
908		{
909	+	idle_resume();
910		#if 0
911		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
912		#else
913		// Trigger interrupt to main cpu only
914	<	if (main_cpu)
915	<	main_cpu->trigger_interrupt();
914	>	if (ppc_cpu)
915	>	ppc_cpu->trigger_interrupt();
916		#endif
917		}
671	–	#endif
918
919	<	void sheepshaver_cpu::handle_interrupt(void)
919	>	void HandleInterrupt(powerpc_registers *r)
920		{
921	+	#ifdef USE_SDL_VIDEO
922	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
923	+	SDL_PumpEvents();
924	+	#endif
925	+
926		// Do nothing if interrupts are disabled
927		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
928		return;
929
930	<	// Do nothing if there is no interrupt pending
931	<	if (InterruptFlags == 0)
932	<	return;
933	<
683	<	// Disable MacOS stack sniffer
684	<	WriteMacInt32(0x110, 0);
930	>	// Update interrupt count
931	>	#if EMUL_TIME_STATS
932	>	interrupt_count++;
933	>	#endif
934
935		// Interrupt action depends on current run mode
936		switch (ReadMacInt32(XLM_RUN_MODE)) {
937		case MODE_68K:
938		// 68k emulator active, trigger 68k interrupt level 1
690	–	assert(current_cpu == main_cpu);
939		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
940	<	set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
940	>	r->cr.set(r->cr.get() \| tswap32(kernel_data->v[0x674 >> 2]));
941		break;
942
943		#if INTERRUPTS_IN_NATIVE_MODE
944		case MODE_NATIVE:
945		// 68k emulator inactive, in nanokernel?
946	<	assert(current_cpu == main_cpu);
947	<	if (gpr(1) != KernelDataAddr) {
946	>	if (r->gpr[1] != KernelDataAddr) {
947	>
948		// Prepare for 68k interrupt level 1
949		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
950		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 705 \| Line 953 \| void sheepshaver_cpu::handle_interrupt(v
953
954		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
955		DisableInterrupt();
708	–	cpu_push(interrupt_cpu);
956		if (ROMType == ROMTYPE_NEWWORLD)
957	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
957	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
958		else
959	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
713	<	cpu_pop();
959	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
960		}
961		break;
962		#endif
#	Line 719 \| Line 965 \| void sheepshaver_cpu::handle_interrupt(v
965		case MODE_EMUL_OP:
966		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
967		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
968	+	#if EMUL_TIME_STATS
969	+	const clock_t interrupt_start = clock();
970	+	#endif
971		#if 1
972		// Execute full 68k interrupt routine
973		M68kRegisters r;
974		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
975		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
976	<	static const uint8 proc[] = {
976	>	static const uint8 proc_template[] = {
977		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
978		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
979		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 732 \| Line 981 \| void sheepshaver_cpu::handle_interrupt(v
981		0x4e, 0xd0, // jmp (a0)
982		M68K_RTS >> 8, M68K_RTS & 0xff // @1
983		};
984	<	Execute68k((uint32)proc, &r);
984	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
985	>	Execute68k(proc, &r);
986		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
987		#else
988		// Only update cursor
#	Line 740 \| Line 990 \| void sheepshaver_cpu::handle_interrupt(v
990		if (InterruptFlags & INTFLAG_VIA) {
991		ClearInterruptFlag(INTFLAG_VIA);
992		ADBInterrupt();
993	<	ExecutePPC(VideoVBL);
993	>	ExecuteNative(NATIVE_VIDEO_VBL);
994		}
995		}
996		#endif
997	+	#if EMUL_TIME_STATS
998	+	interrupt_time += (clock() - interrupt_start);
999	+	#endif
1000		}
1001		break;
1002		#endif
1003		}
1004		}
1005
1006	<	/*
1007	<	* Execute NATIVE_OP opcode (called by PowerPC emulator)
755	<	*/
756	<
757	<	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
758	<	tswap32(POWERPC_EMUL_OP \| ((LR) << 11) \| (((uint32)OP) << 6) \| 2)
759	<
760	<	// FIXME: Make sure 32-bit relocations are used
761	<	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
762	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
763	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
764	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
765	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
766	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
767	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
768	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
769	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
770	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
771	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
772	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
773	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
774	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
775	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
776	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
777	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
778	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
779	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
780	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
781	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
782	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
783	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
784	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
785	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
786	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
787	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
788	<	};
789	<
790	<	static void get_resource(void);
791	<	static void get_1_resource(void);
792	<	static void get_ind_resource(void);
793	<	static void get_1_ind_resource(void);
794	<	static void r_get_resource(void);
795	<
796	<	#define GPR(REG) current_cpu->gpr(REG)
797	<
798	<	static void NativeOp(int selector)
1006	>	// Execute NATIVE_OP routine
1007	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1008		{
1009		#if EMUL_TIME_STATS
1010		native_exec_count++;
#	Line 813 \| Line 1022 \| static void NativeOp(int selector)
1022		VideoVBL();
1023		break;
1024		case NATIVE_VIDEO_DO_DRIVER_IO:
1025	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
817	<	(void *)GPR(5), GPR(6), GPR(7));
1025	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1026		break;
1027	<	case NATIVE_GET_RESOURCE:
1028	<	get_resource();
1027	>	case NATIVE_ETHER_AO_GET_HWADDR:
1028	>	AO_get_ethernet_address(gpr(3));
1029		break;
1030	<	case NATIVE_GET_1_RESOURCE:
1031	<	get_1_resource();
1030	>	case NATIVE_ETHER_AO_ADD_MULTI:
1031	>	AO_enable_multicast(gpr(3));
1032		break;
1033	<	case NATIVE_GET_IND_RESOURCE:
1034	<	get_ind_resource();
1033	>	case NATIVE_ETHER_AO_DEL_MULTI:
1034	>	AO_disable_multicast(gpr(3));
1035		break;
1036	<	case NATIVE_GET_1_IND_RESOURCE:
1037	<	get_1_ind_resource();
1036	>	case NATIVE_ETHER_AO_SEND_PACKET:
1037	>	AO_transmit_packet(gpr(3));
1038		break;
1039	<	case NATIVE_R_GET_RESOURCE:
1040	<	r_get_resource();
1039	>	case NATIVE_ETHER_IRQ:
1040	>	EtherIRQ();
1041	>	break;
1042	>	case NATIVE_ETHER_INIT:
1043	>	gpr(3) = InitStreamModule((void *)gpr(3));
1044	>	break;
1045	>	case NATIVE_ETHER_TERM:
1046	>	TerminateStreamModule();
1047	>	break;
1048	>	case NATIVE_ETHER_OPEN:
1049	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1050	>	break;
1051	>	case NATIVE_ETHER_CLOSE:
1052	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1053	>	break;
1054	>	case NATIVE_ETHER_WPUT:
1055	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1056	>	break;
1057	>	case NATIVE_ETHER_RSRV:
1058	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1059	>	break;
1060	>	case NATIVE_NQD_SYNC_HOOK:
1061	>	gpr(3) = NQD_sync_hook(gpr(3));
1062	>	break;
1063	>	case NATIVE_NQD_UNKNOWN_HOOK:
1064	>	gpr(3) = NQD_unknown_hook(gpr(3));
1065	>	break;
1066	>	case NATIVE_NQD_BITBLT_HOOK:
1067	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1068	>	break;
1069	>	case NATIVE_NQD_BITBLT:
1070	>	NQD_bitblt(gpr(3));
1071	>	break;
1072	>	case NATIVE_NQD_FILLRECT_HOOK:
1073	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1074	>	break;
1075	>	case NATIVE_NQD_INVRECT:
1076	>	NQD_invrect(gpr(3));
1077	>	break;
1078	>	case NATIVE_NQD_FILLRECT:
1079	>	NQD_fillrect(gpr(3));
1080		break;
1081		case NATIVE_SERIAL_NOTHING:
1082		case NATIVE_SERIAL_OPEN:
#	Line 848 \| Line 1095 \| static void NativeOp(int selector)
1095		SerialStatus,
1096		SerialClose
1097		};
1098	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1098	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1099		break;
1100		}
1101	<	case NATIVE_DISABLE_INTERRUPT:
1102	<	DisableInterrupt();
1101	>	case NATIVE_GET_RESOURCE:
1102	>	get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1103	>	break;
1104	>	case NATIVE_GET_1_RESOURCE:
1105	>	get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1106	>	break;
1107	>	case NATIVE_GET_IND_RESOURCE:
1108	>	get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1109		break;
1110	<	case NATIVE_ENABLE_INTERRUPT:
1111	<	EnableInterrupt();
1110	>	case NATIVE_GET_1_IND_RESOURCE:
1111	>	get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1112	>	break;
1113	>	case NATIVE_R_GET_RESOURCE:
1114	>	get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1115		break;
1116		case NATIVE_MAKE_EXECUTABLE:
1117	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1117	>	MakeExecutable(0, gpr(4), gpr(5));
1118	>	break;
1119	>	case NATIVE_CHECK_LOAD_INVOC:
1120	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1121	>	break;
1122	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
1123	>	named_check_load_invoc(gpr(3), gpr(4), gpr(5));
1124		break;
1125		default:
1126		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 872 \| Line 1134 \| static void NativeOp(int selector)
1134		}
1135
1136		/*
875	–	* Execute native subroutine (LR must contain return address)
876	–	*/
877	–
878	–	void ExecuteNative(int selector)
879	–	{
880	–	uint32 tvect[2];
881	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
882	–	tvect[1] = 0; // Fake TVECT
883	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
884	–	M68kRegisters r;
885	–	Execute68k((uint32)&desc, &r);
886	–	}
887	–
888	–	/*
1137		* Execute 68k subroutine (must be ended with EXEC_RETURN)
1138		* This must only be called by the emul_thread when in EMUL_OP mode
1139		* r->a[7] is unused, the routine runs on the caller's stack
#	Line 893 \| Line 1141 \| void ExecuteNative(int selector)
1141
1142		void Execute68k(uint32 pc, M68kRegisters *r)
1143		{
1144	<	current_cpu->execute_68k(pc, r);
1144	>	ppc_cpu->execute_68k(pc, r);
1145		}
1146
1147		/*
#	Line 903 \| Line 1151 \| void Execute68k(uint32 pc, M68kRegisters
1151
1152		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1153		{
1154	<	uint16 proc[2];
1155	<	proc[0] = htons(trap);
1156	<	proc[1] = htons(M68K_RTS);
1157	<	Execute68k((uint32)proc, r);
1154	>	SheepVar proc_var(4);
1155	>	uint32 proc = proc_var.addr();
1156	>	WriteMacInt16(proc, trap);
1157	>	WriteMacInt16(proc + 2, M68K_RTS);
1158	>	Execute68k(proc, r);
1159		}
1160
1161		/*
#	Line 915 \| Line 1164 \| void Execute68kTrap(uint16 trap, M68kReg
1164
1165		uint32 call_macos(uint32 tvect)
1166		{
1167	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1167	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1168		}
1169
1170		uint32 call_macos1(uint32 tvect, uint32 arg1)
1171		{
1172		const uint32 args[] = { arg1 };
1173	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1173	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1174		}
1175
1176		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1177		{
1178		const uint32 args[] = { arg1, arg2 };
1179	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1179	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1180		}
1181
1182		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1183		{
1184		const uint32 args[] = { arg1, arg2, arg3 };
1185	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1185	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1186		}
1187
1188		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1189		{
1190		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1191	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1191	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1192		}
1193
1194		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1195		{
1196		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1197	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1197	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1198		}
1199
1200		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1201		{
1202		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1203	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1203	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1204		}
1205
1206		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1207		{
1208		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1209	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
961	<	}
962	<
963	<	/*
964	<	* Resource Manager thunks
965	<	*/
966	<
967	<	void get_resource(void)
968	<	{
969	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
970	<	}
971	<
972	<	void get_1_resource(void)
973	<	{
974	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
975	<	}
976	<
977	<	void get_ind_resource(void)
978	<	{
979	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
980	<	}
981	<
982	<	void get_1_ind_resource(void)
983	<	{
984	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
985	<	}
986	<
987	<	void r_get_resource(void)
988	<	{
989	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1209	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1210		}

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs. Revision 1.70 by gbeauche, 2006-05-14T07:21:10Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.70 by gbeauche, 2006-05-14T07:21:10Z