[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.65 by gbeauche, 2005-07-03T22:02:01Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 30 \| Line 30
30		#include "sigsegv.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 47 \| Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 70 \| Line 84 \| static void enter_mon(void)
84		#endif
85		}
86
87	<	// Enable multicore (main/interrupts) cpu emulation?
88	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87	>	// From main_*.cpp
88	>	extern uintptr SignalStackBase();
89	>
90	>	// From rsrc_patches.cpp
91	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	>
93	>	// PowerPC EmulOp to exit from emulation looop
94	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
95
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
#	Line 86 \| Line 106 \| static void enter_mon(void)
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
108		// Pointer to Kernel Data
109	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109	>	static KernelData * kernel_data;
110	>
111	>	// SIGSEGV handler
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>
114	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115	>	// Special trampolines for EmulOp and NativeOp
116	>	static uint8 *emul_op_trampoline;
117	>	static uint8 *native_op_trampoline;
118	>	#endif
119	>
120	>	// JIT Compiler enabled?
121	>	static inline bool enable_jit_p()
122	>	{
123	>	return PrefsFindBool("jit");
124	>	}
125
126
127		/**
128		* PowerPC emulator glue with special 'sheep' opcodes
129		**/
130
131	+	enum {
132	+	PPC_I(SHEEP) = PPC_I(MAX),
133	+	PPC_I(SHEEP_MAX)
134	+	};
135	+
136		class sheepshaver_cpu
137		: public powerpc_cpu
138		{
#	Line 104 \| Line 144 \| public:
144		// Constructor
145		sheepshaver_cpu();
146
147	<	// Condition Register accessors
147	>	// CR & XER accessors
148		uint32 get_cr() const { return cr().get(); }
149		void set_cr(uint32 v) { cr().set(v); }
150	+	uint32 get_xer() const { return xer().get(); }
151	+	void set_xer(uint32 v) { xer().set(v); }
152	+
153	+	// Execute NATIVE_OP routine
154	+	void execute_native_op(uint32 native_op);
155
156	<	// Execution loop
157	<	void execute(uint32 entry, bool enable_cache = false);
156	>	// Execute EMUL_OP routine
157	>	void execute_emul_op(uint32 emul_op);
158
159		// Execute 68k routine
160		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 120 \| Line 165 \| public:
165		// Execute MacOS/PPC code
166		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167
168	+	#if PPC_ENABLE_JIT
169	+	// Compile one instruction
170	+	virtual int compile1(codegen_context_t & cg_context);
171	+	#endif
172		// Resource manager thunk
173		void get_resource(uint32 old_get_resource);
174
175		// Handle MacOS interrupt
176		void interrupt(uint32 entry);
128	–	void handle_interrupt();
177
178	<	// Lazy memory allocator (one item at a time)
179	<	void *operator new(size_t size)
180	<	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
181	<	void operator delete(void *p)
182	<	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
183	<	// FIXME: really make surre array allocation fail at link time?
136	<	void *operator new[](size_t);
137	<	void operator delete[](void *p);
178	>	// Make sure the SIGSEGV handler can access CPU registers
179	>	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180	>
181	>	// Memory allocator returning areas aligned on 16-byte boundaries
182	>	void *operator new(size_t size);
183	>	void operator delete(void *p);
184		};
185
186	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
186	>	// Memory allocator returning sheepshaver_cpu objects aligned on 16-byte boundaries
187	>	// FORMAT: [ alignment ] magic identifier, offset to malloc'ed data, sheepshaver_cpu data
188	>	void *sheepshaver_cpu::operator new(size_t size)
189	>	{
190	>	const int ALIGN = 16;
191	>
192	>	// Allocate enough space for sheepshaver_cpu data + signature + align pad
193	>	uint8 ptr = (uint8 )malloc(size + ALIGN * 2);
194	>	if (ptr == NULL)
195	>	throw std::bad_alloc();
196	>
197	>	// Align memory
198	>	int ofs = 0;
199	>	while ((((uintptr)ptr) % ALIGN) != 0)
200	>	ofs++, ptr++;
201	>
202	>	// Insert signature and offset
203	>	struct aligned_block_t {
204	>	uint32 pad[(ALIGN - 8) / 4];
205	>	uint32 signature;
206	>	uint32 offset;
207	>	uint8 data[sizeof(sheepshaver_cpu)];
208	>	};
209	>	aligned_block_t blk = (aligned_block_t )ptr;
210	>	blk->signature = FOURCC('S','C','P','U');
211	>	blk->offset = ofs + (&blk->data[0] - (uint8 *)blk);
212	>	assert((((uintptr)&blk->data) % ALIGN) == 0);
213	>	return &blk->data[0];
214	>	}
215	>
216	>	void sheepshaver_cpu::operator delete(void *p)
217	>	{
218	>	uint32 blk = (uint32 )p;
219	>	assert(blk[-2] == FOURCC('S','C','P','U'));
220	>	void ptr = (void )(((uintptr)p) - blk[-1]);
221	>	free(ptr);
222	>	}
223
224		sheepshaver_cpu::sheepshaver_cpu()
225	<	: powerpc_cpu()
225	>	: powerpc_cpu(enable_jit_p())
226		{
227		init_decoder();
228		}
229
230		void sheepshaver_cpu::init_decoder()
231		{
150	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
151	–	static bool initialized = false;
152	–	if (initialized)
153	–	return;
154	–	initialized = true;
155	–	#endif
156	–
232		static const instr_info_t sheep_ii_table[] = {
233		{ "sheep",
234		(execute_pmf)&sheepshaver_cpu::execute_sheep,
235		NULL,
236	+	PPC_I(SHEEP),
237		D_form, 6, 0, CFLOW_JUMP \| CFLOW_TRAP
238		}
239		};
#	Line 171 \| Line 247 \| void sheepshaver_cpu::init_decoder()
247		}
248		}
249
174	–	// Forward declaration for native opcode handler
175	–	static void NativeOp(int selector);
176	–
250		/* NativeOp instruction format:
251	<	+------------+--------------------------+--+----------+------------+
252	<	\| 6 \| \|FN\| OP \| 2 \|
253	<	+------------+--------------------------+--+----------+------------+
254	<	0 5 \|6 19 20 21 25 26 31
251	>	+------------+-------------------------+--+-----------+------------+
252	>	\| 6 \| \|FN\| OP \| 2 \|
253	>	+------------+-------------------------+--+-----------+------------+
254	>	0 5 \|6 18 19 20 25 26 31
255		*/
256
257	<	typedef bit_field< 20, 20 > FN_field;
258	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
257	>	typedef bit_field< 19, 19 > FN_field;
258	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
259		typedef bit_field< 26, 31 > EMUL_OP_field;
260
261	+	// Execute EMUL_OP routine
262	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
263	+	{
264	+	M68kRegisters r68;
265	+	WriteMacInt32(XLM_68K_R25, gpr(25));
266	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
267	+	for (int i = 0; i < 8; i++)
268	+	r68.d[i] = gpr(8 + i);
269	+	for (int i = 0; i < 7; i++)
270	+	r68.a[i] = gpr(16 + i);
271	+	r68.a[7] = gpr(1);
272	+	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
273	+	uint32 saved_xer = get_xer();
274	+	EmulOp(&r68, gpr(24), emul_op);
275	+	set_cr(saved_cr);
276	+	set_xer(saved_xer);
277	+	for (int i = 0; i < 8; i++)
278	+	gpr(8 + i) = r68.d[i];
279	+	for (int i = 0; i < 7; i++)
280	+	gpr(16 + i) = r68.a[i];
281	+	gpr(1) = r68.a[7];
282	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
283	+	}
284	+
285		// Execute SheepShaver instruction
286		void sheepshaver_cpu::execute_sheep(uint32 opcode)
287		{
#	Line 201 \| Line 298 \| void sheepshaver_cpu::execute_sheep(uint
298		break;
299
300		case 2: // EXEC_NATIVE
301	<	NativeOp(NATIVE_OP_field::extract(opcode));
301	>	execute_native_op(NATIVE_OP_field::extract(opcode));
302		if (FN_field::test(opcode))
303		pc() = lr();
304		else
305		pc() += 4;
306		break;
307
308	<	default: { // EMUL_OP
309	<	M68kRegisters r68;
213	<	WriteMacInt32(XLM_68K_R25, gpr(25));
214	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
215	<	for (int i = 0; i < 8; i++)
216	<	r68.d[i] = gpr(8 + i);
217	<	for (int i = 0; i < 7; i++)
218	<	r68.a[i] = gpr(16 + i);
219	<	r68.a[7] = gpr(1);
220	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
221	<	for (int i = 0; i < 8; i++)
222	<	gpr(8 + i) = r68.d[i];
223	<	for (int i = 0; i < 7; i++)
224	<	gpr(16 + i) = r68.a[i];
225	<	gpr(1) = r68.a[7];
226	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
308	>	default: // EMUL_OP
309	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
310		pc() += 4;
311		break;
312		}
230	–	}
313		}
314
315	<	// Execution loop
316	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
317	<	{
318	<	powerpc_cpu::execute(entry, enable_cache);
315	>	// Compile one instruction
316	>	#if PPC_ENABLE_JIT
317	>	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
318	>	{
319	>	const instr_info_t *ii = cg_context.instr_info;
320	>	if (ii->mnemo != PPC_I(SHEEP))
321	>	return COMPILE_FAILURE;
322	>
323	>	int status = COMPILE_FAILURE;
324	>	powerpc_dyngen & dg = cg_context.codegen;
325	>	uint32 opcode = cg_context.opcode;
326	>
327	>	switch (opcode & 0x3f) {
328	>	case 0: // EMUL_RETURN
329	>	dg.gen_invoke(QuitEmulator);
330	>	status = COMPILE_CODE_OK;
331	>	break;
332	>
333	>	case 1: // EXEC_RETURN
334	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
335	>	// Don't check for pending interrupts, we do know we have to
336	>	// get out of this block ASAP
337	>	dg.gen_exec_return();
338	>	status = COMPILE_EPILOGUE_OK;
339	>	break;
340	>
341	>	case 2: { // EXEC_NATIVE
342	>	uint32 selector = NATIVE_OP_field::extract(opcode);
343	>	switch (selector) {
344	>	#if !PPC_REENTRANT_JIT
345	>	// Filter out functions that may invoke Execute68k() or
346	>	// CallMacOS(), this would break reentrancy as they could
347	>	// invalidate the translation cache and even overwrite
348	>	// continuation code when we are done with them.
349	>	case NATIVE_PATCH_NAME_REGISTRY:
350	>	dg.gen_invoke(DoPatchNameRegistry);
351	>	status = COMPILE_CODE_OK;
352	>	break;
353	>	case NATIVE_VIDEO_INSTALL_ACCEL:
354	>	dg.gen_invoke(VideoInstallAccel);
355	>	status = COMPILE_CODE_OK;
356	>	break;
357	>	case NATIVE_VIDEO_VBL:
358	>	dg.gen_invoke(VideoVBL);
359	>	status = COMPILE_CODE_OK;
360	>	break;
361	>	case NATIVE_GET_RESOURCE:
362	>	case NATIVE_GET_1_RESOURCE:
363	>	case NATIVE_GET_IND_RESOURCE:
364	>	case NATIVE_GET_1_IND_RESOURCE:
365	>	case NATIVE_R_GET_RESOURCE: {
366	>	static const uint32 get_resource_ptr[] = {
367	>	XLM_GET_RESOURCE,
368	>	XLM_GET_1_RESOURCE,
369	>	XLM_GET_IND_RESOURCE,
370	>	XLM_GET_1_IND_RESOURCE,
371	>	XLM_R_GET_RESOURCE
372	>	};
373	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
374	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
375	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
376	>	dg.gen_invoke_CPU_im(func, old_get_resource);
377	>	status = COMPILE_CODE_OK;
378	>	break;
379	>	}
380	>	case NATIVE_CHECK_LOAD_INVOC:
381	>	dg.gen_load_T0_GPR(3);
382	>	dg.gen_load_T1_GPR(4);
383	>	dg.gen_se_16_32_T1();
384	>	dg.gen_load_T2_GPR(5);
385	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
386	>	status = COMPILE_CODE_OK;
387	>	break;
388	>	#endif
389	>	case NATIVE_BITBLT:
390	>	dg.gen_load_T0_GPR(3);
391	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
392	>	status = COMPILE_CODE_OK;
393	>	break;
394	>	case NATIVE_INVRECT:
395	>	dg.gen_load_T0_GPR(3);
396	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
397	>	status = COMPILE_CODE_OK;
398	>	break;
399	>	case NATIVE_FILLRECT:
400	>	dg.gen_load_T0_GPR(3);
401	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
402	>	status = COMPILE_CODE_OK;
403	>	break;
404	>	}
405	>	// Could we fully translate this NativeOp?
406	>	if (status == COMPILE_CODE_OK) {
407	>	if (!FN_field::test(opcode))
408	>	cg_context.done_compile = false;
409	>	else {
410	>	dg.gen_load_A0_LR();
411	>	dg.gen_set_PC_A0();
412	>	cg_context.done_compile = true;
413	>	}
414	>	break;
415	>	}
416	>	#if PPC_REENTRANT_JIT
417	>	// Try to execute NativeOp trampoline
418	>	if (!FN_field::test(opcode))
419	>	dg.gen_set_PC_im(cg_context.pc + 4);
420	>	else {
421	>	dg.gen_load_A0_LR();
422	>	dg.gen_set_PC_A0();
423	>	}
424	>	dg.gen_mov_32_T0_im(selector);
425	>	dg.gen_jmp(native_op_trampoline);
426	>	cg_context.done_compile = true;
427	>	status = COMPILE_EPILOGUE_OK;
428	>	break;
429	>	#endif
430	>	// Invoke NativeOp handler
431	>	if (!FN_field::test(opcode)) {
432	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
433	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
434	>	dg.gen_invoke_CPU_im(func, selector);
435	>	cg_context.done_compile = false;
436	>	status = COMPILE_CODE_OK;
437	>	}
438	>	// Otherwise, let it generate a call to execute_sheep() which
439	>	// will cause necessary updates to the program counter
440	>	break;
441	>	}
442	>
443	>	default: { // EMUL_OP
444	>	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
445	>	#if PPC_REENTRANT_JIT
446	>	// Try to execute EmulOp trampoline
447	>	dg.gen_set_PC_im(cg_context.pc + 4);
448	>	dg.gen_mov_32_T0_im(emul_op);
449	>	dg.gen_jmp(emul_op_trampoline);
450	>	cg_context.done_compile = true;
451	>	status = COMPILE_EPILOGUE_OK;
452	>	break;
453	>	#endif
454	>	// Invoke EmulOp handler
455	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
456	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
457	>	dg.gen_invoke_CPU_im(func, emul_op);
458	>	cg_context.done_compile = false;
459	>	status = COMPILE_CODE_OK;
460	>	break;
461	>	}
462	>	}
463	>	return status;
464		}
465	+	#endif
466
467		// Handle MacOS interrupt
468		void sheepshaver_cpu::interrupt(uint32 entry)
469		{
470		#if EMUL_TIME_STATS
471	<	interrupt_count++;
471	>	ppc_interrupt_count++;
472		const clock_t interrupt_start = clock();
473		#endif
474
247	–	#if !MULTICORE_CPU
475		// Save program counters and branch registers
476		uint32 saved_pc = pc();
477		uint32 saved_lr = lr();
478		uint32 saved_ctr= ctr();
479		uint32 saved_sp = gpr(1);
253	–	#endif
480
481		// Initialize stack pointer to SheepShaver alternate stack base
482	<	gpr(1) = SheepStack1Base - 64;
482	>	gpr(1) = SignalStackBase() - 64;
483
484		// Build trampoline to return from interrupt
485	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
485	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
486
487		// Prepare registers for nanokernel interrupt routine
488		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 275 \| Line 501 \| void sheepshaver_cpu::interrupt(uint32 e
501		gpr(1) = KernelDataAddr;
502		gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
503		gpr(8) = 0;
504	<	gpr(10) = (uint32)trampoline;
505	<	gpr(12) = (uint32)trampoline;
504	>	gpr(10) = trampoline.addr();
505	>	gpr(12) = trampoline.addr();
506		gpr(13) = get_cr();
507
508		// rlwimi. r7,r7,8,0,0
#	Line 290 \| Line 516 \| void sheepshaver_cpu::interrupt(uint32 e
516		// Enter nanokernel
517		execute(entry);
518
293	–	#if !MULTICORE_CPU
519		// Restore program counters and branch registers
520		pc() = saved_pc;
521		lr() = saved_lr;
522		ctr()= saved_ctr;
523		gpr(1) = saved_sp;
299	–	#endif
524
525		#if EMUL_TIME_STATS
526		interrupt_time += (clock() - interrupt_start);
#	Line 413 \| Line 637 \| uint32 sheepshaver_cpu::execute_macos_co
637		uint32 saved_ctr= ctr();
638
639		// Build trampoline with EXEC_RETURN
640	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
641	<	lr() = (uint32)trampoline;
640	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
641	>	lr() = trampoline.addr();
642
643		gpr(1) -= 64; // Create stack frame
644		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 458 \| Line 682 \| inline void sheepshaver_cpu::execute_ppc
682		// Save branch registers
683		uint32 saved_lr = lr();
684
685	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
686	<	lr() = (uint32)trampoline;
685	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
686	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
687	>	lr() = trampoline.addr();
688
689		execute(entry);
690
#	Line 468 \| Line 693 \| inline void sheepshaver_cpu::execute_ppc
693		}
694
695		// Resource Manager thunk
471	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
472	–
696		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
697		{
698		uint32 type = gpr(3);
#	Line 495 \| Line 718 \| inline void sheepshaver_cpu::get_resourc
718		* SheepShaver CPU engine interface
719		**/
720
721	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
722	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
500	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
721	>	// PowerPC CPU emulator
722	>	static sheepshaver_cpu *ppc_cpu = NULL;
723
724		void FlushCodeCache(uintptr start, uintptr end)
725		{
726		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
727	<	main_cpu->invalidate_cache_range(start, end);
506	<	#if MULTICORE_CPU
507	<	interrupt_cpu->invalidate_cache_range(start, end);
508	<	#endif
509	<	}
510	<
511	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
512	<	{
513	<	#if MULTICORE_CPU
514	<	current_cpu = new_cpu;
515	<	#endif
516	<	}
517	<
518	<	static inline void cpu_pop()
519	<	{
520	<	#if MULTICORE_CPU
521	<	current_cpu = main_cpu;
522	<	#endif
727	>	ppc_cpu->invalidate_cache_range(start, end);
728		}
729
730		// Dump PPC registers
731		static void dump_registers(void)
732		{
733	<	current_cpu->dump_registers();
733	>	ppc_cpu->dump_registers();
734		}
735
736		// Dump log
737		static void dump_log(void)
738		{
739	<	current_cpu->dump_log();
739	>	ppc_cpu->dump_log();
740		}
741
742		/*
743		* Initialize CPU emulation
744		*/
745
746	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
746	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
747		{
748		#if ENABLE_VOSF
749		// Handle screen fault
#	Line 550 \| Line 755 \| static sigsegv_return_t sigsegv_handler(
755		const uintptr addr = (uintptr)fault_address;
756		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
757		// Ignore writes to ROM
758	<	if ((addr - ROM_BASE) < ROM_SIZE)
758	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
759		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
760
761	<	// Ignore all other faults, if requested
762	<	if (PrefsFindBool("ignoresegv"))
763	<	return SIGSEGV_RETURN_FAILURE;
761	>	// Get program counter of target CPU
762	>	sheepshaver_cpu * const cpu = ppc_cpu;
763	>	const uint32 pc = cpu->pc();
764	>
765	>	// Fault in Mac ROM or RAM?
766	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
767	>	if (mac_fault) {
768	>
769	>	// "VM settings" during MacOS 8 installation
770	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
771	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
772	>
773	>	// MacOS 8.5 installation
774	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
775	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
776	>
777	>	// MacOS 8 serial drivers on startup
778	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 \|\| cpu->gpr(8) == 0xf3012000))
779	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
780	>
781	>	// MacOS 8.1 serial drivers on startup
782	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
783	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
784	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
785	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
786	>
787	>	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
788	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
789	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
790	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
791	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
792	>
793	>	// Ignore writes to the zero page
794	>	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
795	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
796	>
797	>	// Ignore all other faults, if requested
798	>	if (PrefsFindBool("ignoresegv"))
799	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
800	>	}
801		#else
802		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
803		#endif
804
805	<	printf("SIGSEGV\n");
806	<	printf(" pc %p\n", fault_instruction);
807	<	printf(" ea %p\n", fault_address);
566	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
805	>	fprintf(stderr, "SIGSEGV\n");
806	>	fprintf(stderr, " pc %p\n", fault_instruction);
807	>	fprintf(stderr, " ea %p\n", fault_address);
808		dump_registers();
809	<	current_cpu->dump_log();
809	>	ppc_cpu->dump_log();
810		enter_mon();
811		QuitEmulator();
812
#	Line 574 \| Line 815 \| static sigsegv_return_t sigsegv_handler(
815
816		void init_emul_ppc(void)
817		{
818	+	// Get pointer to KernelData in host address space
819	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
820	+
821		// Initialize main CPU emulator
822	<	main_cpu = new sheepshaver_cpu();
823	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
822	>	ppc_cpu = new sheepshaver_cpu();
823	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
824	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
825		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
826
582	–	#if MULTICORE_CPU
583	–	// Initialize alternate CPU emulator to handle interrupts
584	–	interrupt_cpu = new sheepshaver_cpu();
585	–	#endif
586	–
587	–	// Install the handler for SIGSEGV
588	–	sigsegv_install_handler(sigsegv_handler);
589	–
827		#if ENABLE_MON
828		// Install "regs" command in cxmon
829		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 612 \| Line 849 \| void exit_emul_ppc(void)
849		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
850		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
851		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
852	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
853	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
854
855		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
856		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 628 \| Line 867 \| void exit_emul_ppc(void)
867		printf("\n");
868		#endif
869
870	<	delete main_cpu;
632	<	#if MULTICORE_CPU
633	<	delete interrupt_cpu;
634	<	#endif
870	>	delete ppc_cpu;
871		}
872
873	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
874	+	// Initialize EmulOp trampolines
875	+	void init_emul_op_trampolines(basic_dyngen & dg)
876	+	{
877	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
878	+	func_t func;
879	+
880	+	// EmulOp
881	+	emul_op_trampoline = dg.gen_start();
882	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
883	+	dg.gen_invoke_CPU_T0(func);
884	+	dg.gen_exec_return();
885	+	dg.gen_end();
886	+
887	+	// NativeOp
888	+	native_op_trampoline = dg.gen_start();
889	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
890	+	dg.gen_invoke_CPU_T0(func);
891	+	dg.gen_exec_return();
892	+	dg.gen_end();
893	+
894	+	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
895	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
896	+	}
897	+	#endif
898	+
899		/*
900		* Emulation loop
901		*/
902
903		void emul_ppc(uint32 entry)
904		{
905	<	current_cpu = main_cpu;
906	<	#if DEBUG
645	<	current_cpu->start_log();
905	>	#if 0
906	>	ppc_cpu->start_log();
907		#endif
908		// start emulation loop and enable code translation or caching
909	<	current_cpu->execute(entry, true);
909	>	ppc_cpu->execute(entry);
910		}
911
912		/*
913		* Handle PowerPC interrupt
914		*/
915
655	–	#if ASYNC_IRQ
656	–	void HandleInterrupt(void)
657	–	{
658	–	main_cpu->handle_interrupt();
659	–	}
660	–	#else
916		void TriggerInterrupt(void)
917		{
918	+	idle_resume();
919		#if 0
920		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
921		#else
922		// Trigger interrupt to main cpu only
923	<	if (main_cpu)
924	<	main_cpu->trigger_interrupt();
923	>	if (ppc_cpu)
924	>	ppc_cpu->trigger_interrupt();
925		#endif
926		}
671	–	#endif
927
928	<	void sheepshaver_cpu::handle_interrupt(void)
928	>	void HandleInterrupt(powerpc_registers *r)
929		{
930	+	#ifdef USE_SDL_VIDEO
931	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
932	+	SDL_PumpEvents();
933	+	#endif
934	+
935		// Do nothing if interrupts are disabled
936		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
937		return;
938
939	<	// Do nothing if there is no interrupt pending
940	<	if (InterruptFlags == 0)
941	<	return;
942	<
683	<	// Disable MacOS stack sniffer
684	<	WriteMacInt32(0x110, 0);
939	>	// Update interrupt count
940	>	#if EMUL_TIME_STATS
941	>	interrupt_count++;
942	>	#endif
943
944		// Interrupt action depends on current run mode
945		switch (ReadMacInt32(XLM_RUN_MODE)) {
946		case MODE_68K:
947		// 68k emulator active, trigger 68k interrupt level 1
690	–	assert(current_cpu == main_cpu);
948		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
949	<	set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
949	>	r->cr.set(r->cr.get() \| tswap32(kernel_data->v[0x674 >> 2]));
950		break;
951
952		#if INTERRUPTS_IN_NATIVE_MODE
953		case MODE_NATIVE:
954		// 68k emulator inactive, in nanokernel?
955	<	assert(current_cpu == main_cpu);
956	<	if (gpr(1) != KernelDataAddr) {
955	>	if (r->gpr[1] != KernelDataAddr) {
956	>
957		// Prepare for 68k interrupt level 1
958		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
959		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 705 \| Line 962 \| void sheepshaver_cpu::handle_interrupt(v
962
963		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
964		DisableInterrupt();
708	–	cpu_push(interrupt_cpu);
965		if (ROMType == ROMTYPE_NEWWORLD)
966	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
966	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
967		else
968	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
713	<	cpu_pop();
968	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
969		}
970		break;
971		#endif
#	Line 719 \| Line 974 \| void sheepshaver_cpu::handle_interrupt(v
974		case MODE_EMUL_OP:
975		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
976		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
977	+	#if EMUL_TIME_STATS
978	+	const clock_t interrupt_start = clock();
979	+	#endif
980		#if 1
981		// Execute full 68k interrupt routine
982		M68kRegisters r;
983		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
984		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
985	<	static const uint8 proc[] = {
985	>	static const uint8 proc_template[] = {
986		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
987		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
988		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 732 \| Line 990 \| void sheepshaver_cpu::handle_interrupt(v
990		0x4e, 0xd0, // jmp (a0)
991		M68K_RTS >> 8, M68K_RTS & 0xff // @1
992		};
993	<	Execute68k((uint32)proc, &r);
993	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
994	>	Execute68k(proc, &r);
995		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
996		#else
997		// Only update cursor
#	Line 740 \| Line 999 \| void sheepshaver_cpu::handle_interrupt(v
999		if (InterruptFlags & INTFLAG_VIA) {
1000		ClearInterruptFlag(INTFLAG_VIA);
1001		ADBInterrupt();
1002	<	ExecutePPC(VideoVBL);
1002	>	ExecuteNative(NATIVE_VIDEO_VBL);
1003		}
1004		}
1005		#endif
1006	+	#if EMUL_TIME_STATS
1007	+	interrupt_time += (clock() - interrupt_start);
1008	+	#endif
1009		}
1010		break;
1011		#endif
1012		}
1013		}
1014
753	–	/*
754	–	* Execute NATIVE_OP opcode (called by PowerPC emulator)
755	–	*/
756	–
757	–	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
758	–	tswap32(POWERPC_EMUL_OP \| ((LR) << 11) \| (((uint32)OP) << 6) \| 2)
759	–
760	–	// FIXME: Make sure 32-bit relocations are used
761	–	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
762	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
763	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
764	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
765	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
766	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
767	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
768	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
769	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
770	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
771	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
772	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
773	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
774	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
775	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
776	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
777	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
778	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
779	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
780	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
781	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
782	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
783	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
784	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
785	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
786	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
787	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
788	–	};
789	–
1015		static void get_resource(void);
1016		static void get_1_resource(void);
1017		static void get_ind_resource(void);
1018		static void get_1_ind_resource(void);
1019		static void r_get_resource(void);
1020
1021	<	#define GPR(REG) current_cpu->gpr(REG)
1022	<
798	<	static void NativeOp(int selector)
1021	>	// Execute NATIVE_OP routine
1022	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1023		{
1024		#if EMUL_TIME_STATS
1025		native_exec_count++;
#	Line 813 \| Line 1037 \| static void NativeOp(int selector)
1037		VideoVBL();
1038		break;
1039		case NATIVE_VIDEO_DO_DRIVER_IO:
1040	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
817	<	(void *)GPR(5), GPR(6), GPR(7));
1040	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1041		break;
1042	<	case NATIVE_GET_RESOURCE:
1043	<	get_resource();
1042	>	case NATIVE_ETHER_AO_GET_HWADDR:
1043	>	AO_get_ethernet_address(gpr(3));
1044		break;
1045	<	case NATIVE_GET_1_RESOURCE:
1046	<	get_1_resource();
1045	>	case NATIVE_ETHER_AO_ADD_MULTI:
1046	>	AO_enable_multicast(gpr(3));
1047		break;
1048	<	case NATIVE_GET_IND_RESOURCE:
1049	<	get_ind_resource();
1048	>	case NATIVE_ETHER_AO_DEL_MULTI:
1049	>	AO_disable_multicast(gpr(3));
1050		break;
1051	<	case NATIVE_GET_1_IND_RESOURCE:
1052	<	get_1_ind_resource();
1051	>	case NATIVE_ETHER_AO_SEND_PACKET:
1052	>	AO_transmit_packet(gpr(3));
1053	>	break;
1054	>	case NATIVE_ETHER_IRQ:
1055	>	EtherIRQ();
1056	>	break;
1057	>	case NATIVE_ETHER_INIT:
1058	>	gpr(3) = InitStreamModule((void *)gpr(3));
1059	>	break;
1060	>	case NATIVE_ETHER_TERM:
1061	>	TerminateStreamModule();
1062	>	break;
1063	>	case NATIVE_ETHER_OPEN:
1064	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1065	>	break;
1066	>	case NATIVE_ETHER_CLOSE:
1067	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1068	>	break;
1069	>	case NATIVE_ETHER_WPUT:
1070	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1071	>	break;
1072	>	case NATIVE_ETHER_RSRV:
1073	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1074	>	break;
1075	>	case NATIVE_SYNC_HOOK:
1076	>	gpr(3) = NQD_sync_hook(gpr(3));
1077	>	break;
1078	>	case NATIVE_BITBLT_HOOK:
1079	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1080		break;
1081	<	case NATIVE_R_GET_RESOURCE:
1082	<	r_get_resource();
1081	>	case NATIVE_BITBLT:
1082	>	NQD_bitblt(gpr(3));
1083	>	break;
1084	>	case NATIVE_FILLRECT_HOOK:
1085	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1086	>	break;
1087	>	case NATIVE_INVRECT:
1088	>	NQD_invrect(gpr(3));
1089	>	break;
1090	>	case NATIVE_FILLRECT:
1091	>	NQD_fillrect(gpr(3));
1092		break;
1093		case NATIVE_SERIAL_NOTHING:
1094		case NATIVE_SERIAL_OPEN:
#	Line 848 \| Line 1107 \| static void NativeOp(int selector)
1107		SerialStatus,
1108		SerialClose
1109		};
1110	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1110	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1111		break;
1112		}
1113	<	case NATIVE_DISABLE_INTERRUPT:
1114	<	DisableInterrupt();
1115	<	break;
1116	<	case NATIVE_ENABLE_INTERRUPT:
1117	<	EnableInterrupt();
1113	>	case NATIVE_GET_RESOURCE:
1114	>	case NATIVE_GET_1_RESOURCE:
1115	>	case NATIVE_GET_IND_RESOURCE:
1116	>	case NATIVE_GET_1_IND_RESOURCE:
1117	>	case NATIVE_R_GET_RESOURCE: {
1118	>	typedef void (*GetResourceCallback)(void);
1119	>	static const GetResourceCallback get_resource_callbacks[] = {
1120	>	::get_resource,
1121	>	::get_1_resource,
1122	>	::get_ind_resource,
1123	>	::get_1_ind_resource,
1124	>	::r_get_resource
1125	>	};
1126	>	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1127		break;
1128	+	}
1129		case NATIVE_MAKE_EXECUTABLE:
1130	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1130	>	MakeExecutable(0, gpr(4), gpr(5));
1131	>	break;
1132	>	case NATIVE_CHECK_LOAD_INVOC:
1133	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1134		break;
1135		default:
1136		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 872 \| Line 1144 \| static void NativeOp(int selector)
1144		}
1145
1146		/*
875	–	* Execute native subroutine (LR must contain return address)
876	–	*/
877	–
878	–	void ExecuteNative(int selector)
879	–	{
880	–	uint32 tvect[2];
881	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
882	–	tvect[1] = 0; // Fake TVECT
883	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
884	–	M68kRegisters r;
885	–	Execute68k((uint32)&desc, &r);
886	–	}
887	–
888	–	/*
1147		* Execute 68k subroutine (must be ended with EXEC_RETURN)
1148		* This must only be called by the emul_thread when in EMUL_OP mode
1149		* r->a[7] is unused, the routine runs on the caller's stack
#	Line 893 \| Line 1151 \| void ExecuteNative(int selector)
1151
1152		void Execute68k(uint32 pc, M68kRegisters *r)
1153		{
1154	<	current_cpu->execute_68k(pc, r);
1154	>	ppc_cpu->execute_68k(pc, r);
1155		}
1156
1157		/*
#	Line 903 \| Line 1161 \| void Execute68k(uint32 pc, M68kRegisters
1161
1162		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1163		{
1164	<	uint16 proc[2];
1165	<	proc[0] = htons(trap);
1166	<	proc[1] = htons(M68K_RTS);
1167	<	Execute68k((uint32)proc, r);
1164	>	SheepVar proc_var(4);
1165	>	uint32 proc = proc_var.addr();
1166	>	WriteMacInt16(proc, trap);
1167	>	WriteMacInt16(proc + 2, M68K_RTS);
1168	>	Execute68k(proc, r);
1169		}
1170
1171		/*
#	Line 915 \| Line 1174 \| void Execute68kTrap(uint16 trap, M68kReg
1174
1175		uint32 call_macos(uint32 tvect)
1176		{
1177	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1177	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1178		}
1179
1180		uint32 call_macos1(uint32 tvect, uint32 arg1)
1181		{
1182		const uint32 args[] = { arg1 };
1183	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1183	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1184		}
1185
1186		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1187		{
1188		const uint32 args[] = { arg1, arg2 };
1189	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1189	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1190		}
1191
1192		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1193		{
1194		const uint32 args[] = { arg1, arg2, arg3 };
1195	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1195	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1196		}
1197
1198		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1199		{
1200		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1201	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1201	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1202		}
1203
1204		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1205		{
1206		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1207	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1207	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1208		}
1209
1210		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1211		{
1212		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1213	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1213	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1214		}
1215
1216		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1217		{
1218		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1219	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1219	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1220		}
1221
1222		/*
#	Line 966 \| Line 1225 \| uint32 call_macos7(uint32 tvect, uint32
1225
1226		void get_resource(void)
1227		{
1228	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1228	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1229		}
1230
1231		void get_1_resource(void)
1232		{
1233	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1233	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1234		}
1235
1236		void get_ind_resource(void)
1237		{
1238	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1238	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1239		}
1240
1241		void get_1_ind_resource(void)
1242		{
1243	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1243	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1244		}
1245
1246		void r_get_resource(void)
1247		{
1248	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1248	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1249		}

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs. Revision 1.65 by gbeauche, 2005-07-03T22:02:01Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.65 by gbeauche, 2005-07-03T22:02:01Z