[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.54 by gbeauche, 2004-11-25T00:21:09Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 30 \| Line 30
30		#include "sigsegv.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 47 \| Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 70 \| Line 84 \| static void enter_mon(void)
84		#endif
85		}
86
87	<	// Enable multicore (main/interrupts) cpu emulation?
88	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87	>	// From main_*.cpp
88	>	extern uintptr SignalStackBase();
89	>
90	>	// From rsrc_patches.cpp
91	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	>
93	>	// PowerPC EmulOp to exit from emulation looop
94	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
95	>
96	>	// Enable interrupt routine safety checks?
97	>	#define SAFE_INTERRUPT_PPC 1
98
99		// Enable Execute68k() safety checks?
100		#define SAFE_EXEC_68K 1
#	Line 86 \| Line 109 \| static void enter_mon(void)
109		#define INTERRUPTS_IN_NATIVE_MODE 1
110
111		// Pointer to Kernel Data
112	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
112	>	static KernelData * kernel_data;
113	>
114	>	// SIGSEGV handler
115	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
116	>
117	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
118	>	// Special trampolines for EmulOp and NativeOp
119	>	static uint8 *emul_op_trampoline;
120	>	static uint8 *native_op_trampoline;
121	>	#endif
122	>
123	>	// JIT Compiler enabled?
124	>	static inline bool enable_jit_p()
125	>	{
126	>	return PrefsFindBool("jit");
127	>	}
128
129
130		/**
131		* PowerPC emulator glue with special 'sheep' opcodes
132		**/
133
134	+	enum {
135	+	PPC_I(SHEEP) = PPC_I(MAX),
136	+	PPC_I(SHEEP_MAX)
137	+	};
138	+
139		class sheepshaver_cpu
140		: public powerpc_cpu
141		{
142		void init_decoder();
143		void execute_sheep(uint32 opcode);
144
145	+	// CPU context to preserve on interrupt
146	+	class interrupt_context {
147	+	uint32 gpr[32];
148	+	uint32 pc;
149	+	uint32 lr;
150	+	uint32 ctr;
151	+	uint32 cr;
152	+	uint32 xer;
153	+	sheepshaver_cpu *cpu;
154	+	const char *where;
155	+	public:
156	+	interrupt_context(sheepshaver_cpu _cpu, const char _where);
157	+	~interrupt_context();
158	+	};
159	+
160		public:
161
162		// Constructor
163		sheepshaver_cpu();
164
165	<	// Condition Register accessors
165	>	// CR & XER accessors
166		uint32 get_cr() const { return cr().get(); }
167		void set_cr(uint32 v) { cr().set(v); }
168	+	uint32 get_xer() const { return xer().get(); }
169	+	void set_xer(uint32 v) { xer().set(v); }
170	+
171	+	// Execute NATIVE_OP routine
172	+	void execute_native_op(uint32 native_op);
173
174	<	// Execution loop
175	<	void execute(uint32 entry, bool enable_cache = false);
174	>	// Execute EMUL_OP routine
175	>	void execute_emul_op(uint32 emul_op);
176
177		// Execute 68k routine
178		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 120 \| Line 183 \| public:
183		// Execute MacOS/PPC code
184		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
185
186	+	#if PPC_ENABLE_JIT
187	+	// Compile one instruction
188	+	virtual int compile1(codegen_context_t & cg_context);
189	+	#endif
190		// Resource manager thunk
191		void get_resource(uint32 old_get_resource);
192
#	Line 127 \| Line 194 \| public:
194		void interrupt(uint32 entry);
195		void handle_interrupt();
196
197	<	// Lazy memory allocator (one item at a time)
198	<	void *operator new(size_t size)
199	<	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
200	<	void operator delete(void *p)
201	<	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
202	<	// FIXME: really make surre array allocation fail at link time?
136	<	void *operator new[](size_t);
137	<	void operator delete[](void *p);
197	>	// Make sure the SIGSEGV handler can access CPU registers
198	>	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
199	>
200	>	// Memory allocator returning areas aligned on 16-byte boundaries
201	>	void *operator new(size_t size);
202	>	void operator delete(void *p);
203		};
204
205	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
205	>	// Memory allocator returning areas aligned on 16-byte boundaries
206	>	void *sheepshaver_cpu::operator new(size_t size)
207	>	{
208	>	void *p;
209	>
210	>	#if defined(HAVE_POSIX_MEMALIGN)
211	>	if (posix_memalign(&p, 16, size) != 0)
212	>	throw std::bad_alloc();
213	>	#elif defined(HAVE_MEMALIGN)
214	>	p = memalign(16, size);
215	>	#elif defined(HAVE_VALLOC)
216	>	p = valloc(size); // page-aligned!
217	>	#else
218	>	/* XXX: handle padding ourselves */
219	>	p = malloc(size);
220	>	#endif
221	>
222	>	return p;
223	>	}
224	>
225	>	void sheepshaver_cpu::operator delete(void *p)
226	>	{
227	>	#if defined(HAVE_MEMALIGN) \|\| defined(HAVE_VALLOC)
228	>	#if defined(__GLIBC__)
229	>	// this is known to work only with GNU libc
230	>	free(p);
231	>	#endif
232	>	#else
233	>	free(p);
234	>	#endif
235	>	}
236
237		sheepshaver_cpu::sheepshaver_cpu()
238	<	: powerpc_cpu()
238	>	: powerpc_cpu(enable_jit_p())
239		{
240		init_decoder();
241		}
242
243		void sheepshaver_cpu::init_decoder()
244		{
150	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
151	–	static bool initialized = false;
152	–	if (initialized)
153	–	return;
154	–	initialized = true;
155	–	#endif
156	–
245		static const instr_info_t sheep_ii_table[] = {
246		{ "sheep",
247		(execute_pmf)&sheepshaver_cpu::execute_sheep,
248		NULL,
249	+	PPC_I(SHEEP),
250		D_form, 6, 0, CFLOW_JUMP \| CFLOW_TRAP
251		}
252		};
#	Line 171 \| Line 260 \| void sheepshaver_cpu::init_decoder()
260		}
261		}
262
174	–	// Forward declaration for native opcode handler
175	–	static void NativeOp(int selector);
176	–
263		/* NativeOp instruction format:
264	<	+------------+--------------------------+--+----------+------------+
265	<	\| 6 \| \|FN\| OP \| 2 \|
266	<	+------------+--------------------------+--+----------+------------+
267	<	0 5 \|6 19 20 21 25 26 31
264	>	+------------+-------------------------+--+-----------+------------+
265	>	\| 6 \| \|FN\| OP \| 2 \|
266	>	+------------+-------------------------+--+-----------+------------+
267	>	0 5 \|6 18 19 20 25 26 31
268		*/
269
270	<	typedef bit_field< 20, 20 > FN_field;
271	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
270	>	typedef bit_field< 19, 19 > FN_field;
271	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
272		typedef bit_field< 26, 31 > EMUL_OP_field;
273
274	+	// Execute EMUL_OP routine
275	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
276	+	{
277	+	M68kRegisters r68;
278	+	WriteMacInt32(XLM_68K_R25, gpr(25));
279	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
280	+	for (int i = 0; i < 8; i++)
281	+	r68.d[i] = gpr(8 + i);
282	+	for (int i = 0; i < 7; i++)
283	+	r68.a[i] = gpr(16 + i);
284	+	r68.a[7] = gpr(1);
285	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
286	+	uint32 saved_xer = get_xer();
287	+	EmulOp(&r68, gpr(24), emul_op);
288	+	set_cr(saved_cr);
289	+	set_xer(saved_xer);
290	+	for (int i = 0; i < 8; i++)
291	+	gpr(8 + i) = r68.d[i];
292	+	for (int i = 0; i < 7; i++)
293	+	gpr(16 + i) = r68.a[i];
294	+	gpr(1) = r68.a[7];
295	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
296	+	}
297	+
298		// Execute SheepShaver instruction
299		void sheepshaver_cpu::execute_sheep(uint32 opcode)
300		{
#	Line 201 \| Line 311 \| void sheepshaver_cpu::execute_sheep(uint
311		break;
312
313		case 2: // EXEC_NATIVE
314	<	NativeOp(NATIVE_OP_field::extract(opcode));
314	>	execute_native_op(NATIVE_OP_field::extract(opcode));
315		if (FN_field::test(opcode))
316		pc() = lr();
317		else
318		pc() += 4;
319		break;
320
321	<	default: { // EMUL_OP
322	<	M68kRegisters r68;
213	<	WriteMacInt32(XLM_68K_R25, gpr(25));
214	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
215	<	for (int i = 0; i < 8; i++)
216	<	r68.d[i] = gpr(8 + i);
217	<	for (int i = 0; i < 7; i++)
218	<	r68.a[i] = gpr(16 + i);
219	<	r68.a[7] = gpr(1);
220	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
221	<	for (int i = 0; i < 8; i++)
222	<	gpr(8 + i) = r68.d[i];
223	<	for (int i = 0; i < 7; i++)
224	<	gpr(16 + i) = r68.a[i];
225	<	gpr(1) = r68.a[7];
226	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
321	>	default: // EMUL_OP
322	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
323		pc() += 4;
324		break;
325		}
326	+	}
327	+
328	+	// Compile one instruction
329	+	#if PPC_ENABLE_JIT
330	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
331	+	{
332	+	const instr_info_t *ii = cg_context.instr_info;
333	+	if (ii->mnemo != PPC_I(SHEEP))
334	+	return COMPILE_FAILURE;
335	+
336	+	int status = COMPILE_FAILURE;
337	+	powerpc_dyngen & dg = cg_context.codegen;
338	+	uint32 opcode = cg_context.opcode;
339	+
340	+	switch (opcode & 0x3f) {
341	+	case 0: // EMUL_RETURN
342	+	dg.gen_invoke(QuitEmulator);
343	+	status = COMPILE_CODE_OK;
344	+	break;
345	+
346	+	case 1: // EXEC_RETURN
347	+	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
348	+	// Don't check for pending interrupts, we do know we have to
349	+	// get out of this block ASAP
350	+	dg.gen_exec_return();
351	+	status = COMPILE_EPILOGUE_OK;
352	+	break;
353	+
354	+	case 2: { // EXEC_NATIVE
355	+	uint32 selector = NATIVE_OP_field::extract(opcode);
356	+	switch (selector) {
357	+	#if !PPC_REENTRANT_JIT
358	+	// Filter out functions that may invoke Execute68k() or
359	+	// CallMacOS(), this would break reentrancy as they could
360	+	// invalidate the translation cache and even overwrite
361	+	// continuation code when we are done with them.
362	+	case NATIVE_PATCH_NAME_REGISTRY:
363	+	dg.gen_invoke(DoPatchNameRegistry);
364	+	status = COMPILE_CODE_OK;
365	+	break;
366	+	case NATIVE_VIDEO_INSTALL_ACCEL:
367	+	dg.gen_invoke(VideoInstallAccel);
368	+	status = COMPILE_CODE_OK;
369	+	break;
370	+	case NATIVE_VIDEO_VBL:
371	+	dg.gen_invoke(VideoVBL);
372	+	status = COMPILE_CODE_OK;
373	+	break;
374	+	case NATIVE_GET_RESOURCE:
375	+	case NATIVE_GET_1_RESOURCE:
376	+	case NATIVE_GET_IND_RESOURCE:
377	+	case NATIVE_GET_1_IND_RESOURCE:
378	+	case NATIVE_R_GET_RESOURCE: {
379	+	static const uint32 get_resource_ptr[] = {
380	+	XLM_GET_RESOURCE,
381	+	XLM_GET_1_RESOURCE,
382	+	XLM_GET_IND_RESOURCE,
383	+	XLM_GET_1_IND_RESOURCE,
384	+	XLM_R_GET_RESOURCE
385	+	};
386	+	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
387	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
388	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
389	+	dg.gen_invoke_CPU_im(func, old_get_resource);
390	+	status = COMPILE_CODE_OK;
391	+	break;
392	+	}
393	+	case NATIVE_CHECK_LOAD_INVOC:
394	+	dg.gen_load_T0_GPR(3);
395	+	dg.gen_load_T1_GPR(4);
396	+	dg.gen_se_16_32_T1();
397	+	dg.gen_load_T2_GPR(5);
398	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
399	+	status = COMPILE_CODE_OK;
400	+	break;
401	+	#endif
402	+	case NATIVE_BITBLT:
403	+	dg.gen_load_T0_GPR(3);
404	+	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
405	+	status = COMPILE_CODE_OK;
406	+	break;
407	+	case NATIVE_INVRECT:
408	+	dg.gen_load_T0_GPR(3);
409	+	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
410	+	status = COMPILE_CODE_OK;
411	+	break;
412	+	case NATIVE_FILLRECT:
413	+	dg.gen_load_T0_GPR(3);
414	+	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
415	+	status = COMPILE_CODE_OK;
416	+	break;
417	+	}
418	+	// Could we fully translate this NativeOp?
419	+	if (status == COMPILE_CODE_OK) {
420	+	if (!FN_field::test(opcode))
421	+	cg_context.done_compile = false;
422	+	else {
423	+	dg.gen_load_A0_LR();
424	+	dg.gen_set_PC_A0();
425	+	cg_context.done_compile = true;
426	+	}
427	+	break;
428	+	}
429	+	#if PPC_REENTRANT_JIT
430	+	// Try to execute NativeOp trampoline
431	+	if (!FN_field::test(opcode))
432	+	dg.gen_set_PC_im(cg_context.pc + 4);
433	+	else {
434	+	dg.gen_load_A0_LR();
435	+	dg.gen_set_PC_A0();
436	+	}
437	+	dg.gen_mov_32_T0_im(selector);
438	+	dg.gen_jmp(native_op_trampoline);
439	+	cg_context.done_compile = true;
440	+	status = COMPILE_EPILOGUE_OK;
441	+	break;
442	+	#endif
443	+	// Invoke NativeOp handler
444	+	if (!FN_field::test(opcode)) {
445	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
446	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
447	+	dg.gen_invoke_CPU_im(func, selector);
448	+	cg_context.done_compile = false;
449	+	status = COMPILE_CODE_OK;
450	+	}
451	+	// Otherwise, let it generate a call to execute_sheep() which
452	+	// will cause necessary updates to the program counter
453	+	break;
454	+	}
455	+
456	+	default: { // EMUL_OP
457	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
458	+	#if PPC_REENTRANT_JIT
459	+	// Try to execute EmulOp trampoline
460	+	dg.gen_set_PC_im(cg_context.pc + 4);
461	+	dg.gen_mov_32_T0_im(emul_op);
462	+	dg.gen_jmp(emul_op_trampoline);
463	+	cg_context.done_compile = true;
464	+	status = COMPILE_EPILOGUE_OK;
465	+	break;
466	+	#endif
467	+	// Invoke EmulOp handler
468	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
469	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
470	+	dg.gen_invoke_CPU_im(func, emul_op);
471	+	cg_context.done_compile = false;
472	+	status = COMPILE_CODE_OK;
473	+	break;
474	+	}
475		}
476	+	return status;
477	+	}
478	+	#endif
479	+
480	+	// CPU context to preserve on interrupt
481	+	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu _cpu, const char _where)
482	+	{
483	+	#if SAFE_INTERRUPT_PPC >= 2
484	+	cpu = _cpu;
485	+	where = _where;
486	+
487	+	// Save interrupt context
488	+	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
489	+	pc = cpu->pc();
490	+	lr = cpu->lr();
491	+	ctr = cpu->ctr();
492	+	cr = cpu->get_cr();
493	+	xer = cpu->get_xer();
494	+	#endif
495		}
496
497	<	// Execution loop
234	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
497	>	sheepshaver_cpu::interrupt_context::~interrupt_context()
498		{
499	<	powerpc_cpu::execute(entry, enable_cache);
499	>	#if SAFE_INTERRUPT_PPC >= 2
500	>	// Check whether CPU context was preserved by interrupt
501	>	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
502	>	printf("FATAL: %s: interrupt clobbers registers\n", where);
503	>	for (int i = 0; i < 32; i++)
504	>	if (gpr[i] != cpu->gpr(i))
505	>	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
506	>	}
507	>	if (pc != cpu->pc())
508	>	printf("FATAL: %s: interrupt clobbers PC\n", where);
509	>	if (lr != cpu->lr())
510	>	printf("FATAL: %s: interrupt clobbers LR\n", where);
511	>	if (ctr != cpu->ctr())
512	>	printf("FATAL: %s: interrupt clobbers CTR\n", where);
513	>	if (cr != cpu->get_cr())
514	>	printf("FATAL: %s: interrupt clobbers CR\n", where);
515	>	if (xer != cpu->get_xer())
516	>	printf("FATAL: %s: interrupt clobbers XER\n", where);
517	>	#endif
518		}
519
520		// Handle MacOS interrupt
521		void sheepshaver_cpu::interrupt(uint32 entry)
522		{
523		#if EMUL_TIME_STATS
524	<	interrupt_count++;
524	>	ppc_interrupt_count++;
525		const clock_t interrupt_start = clock();
526		#endif
527
528	<	#if !MULTICORE_CPU
528	>	#if SAFE_INTERRUPT_PPC
529	>	static int depth = 0;
530	>	if (depth != 0)
531	>	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
532	>	depth++;
533	>	#endif
534	>
535		// Save program counters and branch registers
536		uint32 saved_pc = pc();
537		uint32 saved_lr = lr();
538		uint32 saved_ctr= ctr();
539		uint32 saved_sp = gpr(1);
253	–	#endif
540
541		// Initialize stack pointer to SheepShaver alternate stack base
542	<	gpr(1) = SheepStack1Base - 64;
542	>	gpr(1) = SignalStackBase() - 64;
543
544		// Build trampoline to return from interrupt
545	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
545	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
546
547		// Prepare registers for nanokernel interrupt routine
548		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 275 \| Line 561 \| void sheepshaver_cpu::interrupt(uint32 e
561		gpr(1) = KernelDataAddr;
562		gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
563		gpr(8) = 0;
564	<	gpr(10) = (uint32)trampoline;
565	<	gpr(12) = (uint32)trampoline;
564	>	gpr(10) = trampoline.addr();
565	>	gpr(12) = trampoline.addr();
566		gpr(13) = get_cr();
567
568		// rlwimi. r7,r7,8,0,0
#	Line 290 \| Line 576 \| void sheepshaver_cpu::interrupt(uint32 e
576		// Enter nanokernel
577		execute(entry);
578
293	–	#if !MULTICORE_CPU
579		// Restore program counters and branch registers
580		pc() = saved_pc;
581		lr() = saved_lr;
582		ctr()= saved_ctr;
583		gpr(1) = saved_sp;
299	–	#endif
584
585		#if EMUL_TIME_STATS
586		interrupt_time += (clock() - interrupt_start);
587		#endif
588	+
589	+	#if SAFE_INTERRUPT_PPC
590	+	depth--;
591	+	#endif
592		}
593
594		// Execute 68k routine
#	Line 413 \| Line 701 \| uint32 sheepshaver_cpu::execute_macos_co
701		uint32 saved_ctr= ctr();
702
703		// Build trampoline with EXEC_RETURN
704	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
705	<	lr() = (uint32)trampoline;
704	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
705	>	lr() = trampoline.addr();
706
707		gpr(1) -= 64; // Create stack frame
708		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 458 \| Line 746 \| inline void sheepshaver_cpu::execute_ppc
746		// Save branch registers
747		uint32 saved_lr = lr();
748
749	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
750	<	lr() = (uint32)trampoline;
749	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
750	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
751	>	lr() = trampoline.addr();
752
753		execute(entry);
754
#	Line 468 \| Line 757 \| inline void sheepshaver_cpu::execute_ppc
757		}
758
759		// Resource Manager thunk
471	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
472	–
760		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
761		{
762		uint32 type = gpr(3);
#	Line 495 \| Line 782 \| inline void sheepshaver_cpu::get_resourc
782		* SheepShaver CPU engine interface
783		**/
784
785	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
786	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
500	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
785	>	// PowerPC CPU emulator
786	>	static sheepshaver_cpu *ppc_cpu = NULL;
787
788		void FlushCodeCache(uintptr start, uintptr end)
789		{
790		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
791	<	main_cpu->invalidate_cache_range(start, end);
506	<	#if MULTICORE_CPU
507	<	interrupt_cpu->invalidate_cache_range(start, end);
508	<	#endif
509	<	}
510	<
511	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
512	<	{
513	<	#if MULTICORE_CPU
514	<	current_cpu = new_cpu;
515	<	#endif
516	<	}
517	<
518	<	static inline void cpu_pop()
519	<	{
520	<	#if MULTICORE_CPU
521	<	current_cpu = main_cpu;
522	<	#endif
791	>	ppc_cpu->invalidate_cache_range(start, end);
792		}
793
794		// Dump PPC registers
795		static void dump_registers(void)
796		{
797	<	current_cpu->dump_registers();
797	>	ppc_cpu->dump_registers();
798		}
799
800		// Dump log
801		static void dump_log(void)
802		{
803	<	current_cpu->dump_log();
803	>	ppc_cpu->dump_log();
804		}
805
806		/*
807		* Initialize CPU emulation
808		*/
809
810	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
810	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
811		{
812		#if ENABLE_VOSF
813		// Handle screen fault
#	Line 550 \| Line 819 \| static sigsegv_return_t sigsegv_handler(
819		const uintptr addr = (uintptr)fault_address;
820		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
821		// Ignore writes to ROM
822	<	if ((addr - ROM_BASE) < ROM_SIZE)
822	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
823		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
824
825	<	// Ignore all other faults, if requested
826	<	if (PrefsFindBool("ignoresegv"))
827	<	return SIGSEGV_RETURN_FAILURE;
825	>	// Get program counter of target CPU
826	>	sheepshaver_cpu * const cpu = ppc_cpu;
827	>	const uint32 pc = cpu->pc();
828	>
829	>	// Fault in Mac ROM or RAM?
830	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
831	>	if (mac_fault) {
832	>
833	>	// "VM settings" during MacOS 8 installation
834	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
835	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
836	>
837	>	// MacOS 8.5 installation
838	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
839	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
840	>
841	>	// MacOS 8 serial drivers on startup
842	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 \|\| cpu->gpr(8) == 0xf3012000))
843	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
844	>
845	>	// MacOS 8.1 serial drivers on startup
846	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
847	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
848	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
849	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
850	>
851	>	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
852	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
853	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
854	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
855	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
856	>
857	>	// Ignore writes to the zero page
858	>	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
859	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
860	>
861	>	// Ignore all other faults, if requested
862	>	if (PrefsFindBool("ignoresegv"))
863	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
864	>	}
865		#else
866		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
867		#endif
#	Line 563 \| Line 869 \| static sigsegv_return_t sigsegv_handler(
869		printf("SIGSEGV\n");
870		printf(" pc %p\n", fault_instruction);
871		printf(" ea %p\n", fault_address);
566	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
872		dump_registers();
873	<	current_cpu->dump_log();
873	>	ppc_cpu->dump_log();
874		enter_mon();
875		QuitEmulator();
876
#	Line 574 \| Line 879 \| static sigsegv_return_t sigsegv_handler(
879
880		void init_emul_ppc(void)
881		{
882	+	// Get pointer to KernelData in host address space
883	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
884	+
885		// Initialize main CPU emulator
886	<	main_cpu = new sheepshaver_cpu();
887	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
886	>	ppc_cpu = new sheepshaver_cpu();
887	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
888	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
889		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
890
582	–	#if MULTICORE_CPU
583	–	// Initialize alternate CPU emulator to handle interrupts
584	–	interrupt_cpu = new sheepshaver_cpu();
585	–	#endif
586	–
587	–	// Install the handler for SIGSEGV
588	–	sigsegv_install_handler(sigsegv_handler);
589	–
891		#if ENABLE_MON
892		// Install "regs" command in cxmon
893		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 612 \| Line 913 \| void exit_emul_ppc(void)
913		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
914		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
915		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
916	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
917	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
918
919		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
920		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 628 \| Line 931 \| void exit_emul_ppc(void)
931		printf("\n");
932		#endif
933
934	<	delete main_cpu;
935	<	#if MULTICORE_CPU
936	<	delete interrupt_cpu;
937	<	#endif
934	>	delete ppc_cpu;
935	>	}
936	>
937	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
938	>	// Initialize EmulOp trampolines
939	>	void init_emul_op_trampolines(basic_dyngen & dg)
940	>	{
941	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
942	>	func_t func;
943	>
944	>	// EmulOp
945	>	emul_op_trampoline = dg.gen_start();
946	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
947	>	dg.gen_invoke_CPU_T0(func);
948	>	dg.gen_exec_return();
949	>	dg.gen_end();
950	>
951	>	// NativeOp
952	>	native_op_trampoline = dg.gen_start();
953	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
954	>	dg.gen_invoke_CPU_T0(func);
955	>	dg.gen_exec_return();
956	>	dg.gen_end();
957	>
958	>	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
959	>	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
960		}
961	+	#endif
962
963		/*
964		* Emulation loop
#	Line 640 \| Line 966 \| void exit_emul_ppc(void)
966
967		void emul_ppc(uint32 entry)
968		{
969	<	current_cpu = main_cpu;
970	<	#if DEBUG
645	<	current_cpu->start_log();
969	>	#if 0
970	>	ppc_cpu->start_log();
971		#endif
972		// start emulation loop and enable code translation or caching
973	<	current_cpu->execute(entry, true);
973	>	ppc_cpu->execute(entry);
974		}
975
976		/*
977		* Handle PowerPC interrupt
978		*/
979
655	–	#if ASYNC_IRQ
656	–	void HandleInterrupt(void)
657	–	{
658	–	main_cpu->handle_interrupt();
659	–	}
660	–	#else
980		void TriggerInterrupt(void)
981		{
982		#if 0
983		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
984		#else
985		// Trigger interrupt to main cpu only
986	<	if (main_cpu)
987	<	main_cpu->trigger_interrupt();
986	>	if (ppc_cpu)
987	>	ppc_cpu->trigger_interrupt();
988		#endif
989		}
671	–	#endif
990
991		void sheepshaver_cpu::handle_interrupt(void)
992		{
993	+	#ifdef USE_SDL_VIDEO
994	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
995	+	SDL_PumpEvents();
996	+	#endif
997	+
998		// Do nothing if interrupts are disabled
999		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
1000		return;
1001
1002	<	// Do nothing if there is no interrupt pending
1003	<	if (InterruptFlags == 0)
1004	<	return;
1002	>	// Current interrupt nest level
1003	>	static int interrupt_depth = 0;
1004	>	++interrupt_depth;
1005	>	#if EMUL_TIME_STATS
1006	>	interrupt_count++;
1007	>	#endif
1008
1009		// Disable MacOS stack sniffer
1010		WriteMacInt32(0x110, 0);
#	Line 687 \| Line 1013 \| void sheepshaver_cpu::handle_interrupt(v
1013		switch (ReadMacInt32(XLM_RUN_MODE)) {
1014		case MODE_68K:
1015		// 68k emulator active, trigger 68k interrupt level 1
690	–	assert(current_cpu == main_cpu);
1016		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1017		set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
1018		break;
#	Line 695 \| Line 1020 \| void sheepshaver_cpu::handle_interrupt(v
1020		#if INTERRUPTS_IN_NATIVE_MODE
1021		case MODE_NATIVE:
1022		// 68k emulator inactive, in nanokernel?
1023	<	assert(current_cpu == main_cpu);
1024	<	if (gpr(1) != KernelDataAddr) {
1023	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1024	>	interrupt_context ctx(this, "PowerPC mode");
1025	>
1026		// Prepare for 68k interrupt level 1
1027		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1028		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 705 \| Line 1031 \| void sheepshaver_cpu::handle_interrupt(v
1031
1032		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1033		DisableInterrupt();
708	–	cpu_push(interrupt_cpu);
1034		if (ROMType == ROMTYPE_NEWWORLD)
1035	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
1035	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1036		else
1037	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
713	<	cpu_pop();
1037	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1038		}
1039		break;
1040		#endif
#	Line 719 \| Line 1043 \| void sheepshaver_cpu::handle_interrupt(v
1043		case MODE_EMUL_OP:
1044		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1045		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1046	+	interrupt_context ctx(this, "68k mode");
1047	+	#if EMUL_TIME_STATS
1048	+	const clock_t interrupt_start = clock();
1049	+	#endif
1050		#if 1
1051		// Execute full 68k interrupt routine
1052		M68kRegisters r;
1053		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
1054		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
1055	<	static const uint8 proc[] = {
1055	>	static const uint8 proc_template[] = {
1056		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
1057		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
1058		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 732 \| Line 1060 \| void sheepshaver_cpu::handle_interrupt(v
1060		0x4e, 0xd0, // jmp (a0)
1061		M68K_RTS >> 8, M68K_RTS & 0xff // @1
1062		};
1063	<	Execute68k((uint32)proc, &r);
1063	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
1064	>	Execute68k(proc, &r);
1065		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
1066		#else
1067		// Only update cursor
#	Line 740 \| Line 1069 \| void sheepshaver_cpu::handle_interrupt(v
1069		if (InterruptFlags & INTFLAG_VIA) {
1070		ClearInterruptFlag(INTFLAG_VIA);
1071		ADBInterrupt();
1072	<	ExecutePPC(VideoVBL);
1072	>	ExecuteNative(NATIVE_VIDEO_VBL);
1073		}
1074		}
1075		#endif
1076	+	#if EMUL_TIME_STATS
1077	+	interrupt_time += (clock() - interrupt_start);
1078	+	#endif
1079		}
1080		break;
1081		#endif
1082		}
751	–	}
752	–
753	–	/*
754	–	* Execute NATIVE_OP opcode (called by PowerPC emulator)
755	–	*/
756	–
757	–	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
758	–	tswap32(POWERPC_EMUL_OP \| ((LR) << 11) \| (((uint32)OP) << 6) \| 2)
1083
1084	<	// FIXME: Make sure 32-bit relocations are used
1085	<	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
1086	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
763	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
764	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
765	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
766	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
767	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
768	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
769	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
770	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
771	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
772	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
773	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
774	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
775	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
776	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
777	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
778	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
779	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
780	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
781	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
782	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
783	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
784	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
785	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
786	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
787	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
788	<	};
1084	>	// We are done with this interrupt
1085	>	--interrupt_depth;
1086	>	}
1087
1088		static void get_resource(void);
1089		static void get_1_resource(void);
#	Line 793 \| Line 1091 \| static void get_ind_resource(void);
1091		static void get_1_ind_resource(void);
1092		static void r_get_resource(void);
1093
1094	<	#define GPR(REG) current_cpu->gpr(REG)
1095	<
798	<	static void NativeOp(int selector)
1094	>	// Execute NATIVE_OP routine
1095	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1096		{
1097		#if EMUL_TIME_STATS
1098		native_exec_count++;
#	Line 813 \| Line 1110 \| static void NativeOp(int selector)
1110		VideoVBL();
1111		break;
1112		case NATIVE_VIDEO_DO_DRIVER_IO:
1113	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
817	<	(void *)GPR(5), GPR(6), GPR(7));
1113	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1114		break;
1115	<	case NATIVE_GET_RESOURCE:
1116	<	get_resource();
1115	>	#ifdef WORDS_BIGENDIAN
1116	>	case NATIVE_ETHER_IRQ:
1117	>	EtherIRQ();
1118		break;
1119	<	case NATIVE_GET_1_RESOURCE:
1120	<	get_1_resource();
1119	>	case NATIVE_ETHER_INIT:
1120	>	gpr(3) = InitStreamModule((void *)gpr(3));
1121		break;
1122	<	case NATIVE_GET_IND_RESOURCE:
1123	<	get_ind_resource();
1122	>	case NATIVE_ETHER_TERM:
1123	>	TerminateStreamModule();
1124		break;
1125	<	case NATIVE_GET_1_IND_RESOURCE:
1126	<	get_1_ind_resource();
1125	>	case NATIVE_ETHER_OPEN:
1126	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1127	>	break;
1128	>	case NATIVE_ETHER_CLOSE:
1129	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1130	>	break;
1131	>	case NATIVE_ETHER_WPUT:
1132	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1133	>	break;
1134	>	case NATIVE_ETHER_RSRV:
1135	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1136	>	break;
1137	>	#else
1138	>	case NATIVE_ETHER_INIT:
1139	>	// FIXME: needs more complicated thunks
1140	>	gpr(3) = false;
1141		break;
1142	<	case NATIVE_R_GET_RESOURCE:
1143	<	r_get_resource();
1142	>	#endif
1143	>	case NATIVE_SYNC_HOOK:
1144	>	gpr(3) = NQD_sync_hook(gpr(3));
1145	>	break;
1146	>	case NATIVE_BITBLT_HOOK:
1147	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1148	>	break;
1149	>	case NATIVE_BITBLT:
1150	>	NQD_bitblt(gpr(3));
1151	>	break;
1152	>	case NATIVE_FILLRECT_HOOK:
1153	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1154	>	break;
1155	>	case NATIVE_INVRECT:
1156	>	NQD_invrect(gpr(3));
1157	>	break;
1158	>	case NATIVE_FILLRECT:
1159	>	NQD_fillrect(gpr(3));
1160		break;
1161		case NATIVE_SERIAL_NOTHING:
1162		case NATIVE_SERIAL_OPEN:
#	Line 848 \| Line 1175 \| static void NativeOp(int selector)
1175		SerialStatus,
1176		SerialClose
1177		};
1178	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1178	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1179		break;
1180		}
1181	<	case NATIVE_DISABLE_INTERRUPT:
1182	<	DisableInterrupt();
1183	<	break;
1184	<	case NATIVE_ENABLE_INTERRUPT:
1185	<	EnableInterrupt();
1181	>	case NATIVE_GET_RESOURCE:
1182	>	case NATIVE_GET_1_RESOURCE:
1183	>	case NATIVE_GET_IND_RESOURCE:
1184	>	case NATIVE_GET_1_IND_RESOURCE:
1185	>	case NATIVE_R_GET_RESOURCE: {
1186	>	typedef void (*GetResourceCallback)(void);
1187	>	static const GetResourceCallback get_resource_callbacks[] = {
1188	>	::get_resource,
1189	>	::get_1_resource,
1190	>	::get_ind_resource,
1191	>	::get_1_ind_resource,
1192	>	::r_get_resource
1193	>	};
1194	>	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1195		break;
1196	+	}
1197		case NATIVE_MAKE_EXECUTABLE:
1198	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1198	>	MakeExecutable(0, gpr(4), gpr(5));
1199	>	break;
1200	>	case NATIVE_CHECK_LOAD_INVOC:
1201	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1202		break;
1203		default:
1204		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 872 \| Line 1212 \| static void NativeOp(int selector)
1212		}
1213
1214		/*
875	–	* Execute native subroutine (LR must contain return address)
876	–	*/
877	–
878	–	void ExecuteNative(int selector)
879	–	{
880	–	uint32 tvect[2];
881	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
882	–	tvect[1] = 0; // Fake TVECT
883	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
884	–	M68kRegisters r;
885	–	Execute68k((uint32)&desc, &r);
886	–	}
887	–
888	–	/*
1215		* Execute 68k subroutine (must be ended with EXEC_RETURN)
1216		* This must only be called by the emul_thread when in EMUL_OP mode
1217		* r->a[7] is unused, the routine runs on the caller's stack
#	Line 893 \| Line 1219 \| void ExecuteNative(int selector)
1219
1220		void Execute68k(uint32 pc, M68kRegisters *r)
1221		{
1222	<	current_cpu->execute_68k(pc, r);
1222	>	ppc_cpu->execute_68k(pc, r);
1223		}
1224
1225		/*
#	Line 903 \| Line 1229 \| void Execute68k(uint32 pc, M68kRegisters
1229
1230		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1231		{
1232	<	uint16 proc[2];
1233	<	proc[0] = htons(trap);
1234	<	proc[1] = htons(M68K_RTS);
1235	<	Execute68k((uint32)proc, r);
1232	>	SheepVar proc_var(4);
1233	>	uint32 proc = proc_var.addr();
1234	>	WriteMacInt16(proc, trap);
1235	>	WriteMacInt16(proc + 2, M68K_RTS);
1236	>	Execute68k(proc, r);
1237		}
1238
1239		/*
#	Line 915 \| Line 1242 \| void Execute68kTrap(uint16 trap, M68kReg
1242
1243		uint32 call_macos(uint32 tvect)
1244		{
1245	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1245	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1246		}
1247
1248		uint32 call_macos1(uint32 tvect, uint32 arg1)
1249		{
1250		const uint32 args[] = { arg1 };
1251	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1251	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1252		}
1253
1254		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1255		{
1256		const uint32 args[] = { arg1, arg2 };
1257	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1257	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1258		}
1259
1260		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1261		{
1262		const uint32 args[] = { arg1, arg2, arg3 };
1263	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1263	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1264		}
1265
1266		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1267		{
1268		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1269	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1269	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1270		}
1271
1272		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1273		{
1274		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1275	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1275	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1276		}
1277
1278		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1279		{
1280		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1281	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1281	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1282		}
1283
1284		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1285		{
1286		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1287	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1287	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1288		}
1289
1290		/*
#	Line 966 \| Line 1293 \| uint32 call_macos7(uint32 tvect, uint32
1293
1294		void get_resource(void)
1295		{
1296	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1296	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1297		}
1298
1299		void get_1_resource(void)
1300		{
1301	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1301	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1302		}
1303
1304		void get_ind_resource(void)
1305		{
1306	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1306	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1307		}
1308
1309		void get_1_ind_resource(void)
1310		{
1311	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1311	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1312		}
1313
1314		void r_get_resource(void)
1315		{
1316	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1316	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1317		}

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs. Revision 1.54 by gbeauche, 2004-11-25T00:21:09Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.54 by gbeauche, 2004-11-25T00:21:09Z