[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.47 by gbeauche, 2004-06-24T15:37:26Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 30 \| Line 30
30		#include "sigsegv.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+
46	+	#ifdef USE_SDL_VIDEO
47	+	#include <SDL_events.h>
48	+	#endif
49
50		#if ENABLE_MON
51		#include "mon.h"
#	Line 47 \| Line 56
56		#include "debug.h"
57
58		// Emulation time statistics
59	<	#define EMUL_TIME_STATS 1
59	>	#ifndef EMUL_TIME_STATS
60	>	#define EMUL_TIME_STATS 0
61	>	#endif
62
63		#if EMUL_TIME_STATS
64		static clock_t emul_start_time;
65	<	static uint32 interrupt_count = 0;
65	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
66		static clock_t interrupt_time = 0;
67		static uint32 exec68k_count = 0;
68		static clock_t exec68k_time = 0;
#	Line 70 \| Line 81 \| static void enter_mon(void)
81		#endif
82		}
83
84	<	// Enable multicore (main/interrupts) cpu emulation?
85	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
84	>	// From main_*.cpp
85	>	extern uintptr SignalStackBase();
86	>
87	>	// From rsrc_patches.cpp
88	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
89	>
90	>	// PowerPC EmulOp to exit from emulation looop
91	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
92	>
93	>	// Enable interrupt routine safety checks?
94	>	#define SAFE_INTERRUPT_PPC 1
95
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
#	Line 85 \| Line 105 \| static void enter_mon(void)
105		// Interrupts in native mode?
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
108	+	// Enable native EMUL_OPs to be run without a mode switch
109	+	#define ENABLE_NATIVE_EMUL_OP 1
110	+
111		// Pointer to Kernel Data
112		static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
113
114	+	// SIGSEGV handler
115	+	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
116	+
117	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
118	+	// Special trampolines for EmulOp and NativeOp
119	+	static uint8 *emul_op_trampoline;
120	+	static uint8 *native_op_trampoline;
121	+	#endif
122	+
123	+	// JIT Compiler enabled?
124	+	static inline bool enable_jit_p()
125	+	{
126	+	return PrefsFindBool("jit");
127	+	}
128	+
129
130		/**
131		* PowerPC emulator glue with special 'sheep' opcodes
132		**/
133
134	+	enum {
135	+	PPC_I(SHEEP) = PPC_I(MAX),
136	+	PPC_I(SHEEP_MAX)
137	+	};
138	+
139		class sheepshaver_cpu
140		: public powerpc_cpu
141		{
142		void init_decoder();
143		void execute_sheep(uint32 opcode);
144
145	+	// Filter out EMUL_OP routines that only call native code
146	+	bool filter_execute_emul_op(uint32 emul_op);
147	+
148	+	// "Native" EMUL_OP routines
149	+	void execute_emul_op_microseconds();
150	+	void execute_emul_op_idle_time_1();
151	+	void execute_emul_op_idle_time_2();
152	+
153	+	// CPU context to preserve on interrupt
154	+	class interrupt_context {
155	+	uint32 gpr[32];
156	+	uint32 pc;
157	+	uint32 lr;
158	+	uint32 ctr;
159	+	uint32 cr;
160	+	uint32 xer;
161	+	sheepshaver_cpu *cpu;
162	+	const char *where;
163	+	public:
164	+	interrupt_context(sheepshaver_cpu _cpu, const char _where);
165	+	~interrupt_context();
166	+	};
167	+
168		public:
169
170		// Constructor
171		sheepshaver_cpu();
172
173	<	// Condition Register accessors
173	>	// CR & XER accessors
174		uint32 get_cr() const { return cr().get(); }
175		void set_cr(uint32 v) { cr().set(v); }
176	+	uint32 get_xer() const { return xer().get(); }
177	+	void set_xer(uint32 v) { xer().set(v); }
178	+
179	+	// Execute NATIVE_OP routine
180	+	void execute_native_op(uint32 native_op);
181
182	<	// Execution loop
183	<	void execute(uint32 entry, bool enable_cache = false);
182	>	// Execute EMUL_OP routine
183	>	void execute_emul_op(uint32 emul_op);
184
185		// Execute 68k routine
186		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 120 \| Line 191 \| public:
191		// Execute MacOS/PPC code
192		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
193
194	+	// Compile one instruction
195	+	virtual int compile1(codegen_context_t & cg_context);
196	+
197		// Resource manager thunk
198		void get_resource(uint32 old_get_resource);
199
#	Line 127 \| Line 201 \| public:
201		void interrupt(uint32 entry);
202		void handle_interrupt();
203
204	<	// Lazy memory allocator (one item at a time)
205	<	void *operator new(size_t size)
132	<	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
133	<	void operator delete(void *p)
134	<	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
135	<	// FIXME: really make surre array allocation fail at link time?
136	<	void *operator new[](size_t);
137	<	void operator delete[](void *p);
204	>	// Make sure the SIGSEGV handler can access CPU registers
205	>	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
206		};
207
208	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
208	>	// Memory allocator returning areas aligned on 16-byte boundaries
209	>	void *operator new(size_t size)
210	>	{
211	>	void *p;
212	>
213	>	#if defined(HAVE_POSIX_MEMALIGN)
214	>	if (posix_memalign(&p, 16, size) != 0)
215	>	throw std::bad_alloc();
216	>	#elif defined(HAVE_MEMALIGN)
217	>	p = memalign(16, size);
218	>	#elif defined(HAVE_VALLOC)
219	>	p = valloc(size); // page-aligned!
220	>	#else
221	>	/* XXX: handle padding ourselves */
222	>	p = malloc(size);
223	>	#endif
224	>
225	>	return p;
226	>	}
227	>
228	>	void operator delete(void *p)
229	>	{
230	>	#if defined(HAVE_MEMALIGN) \|\| defined(HAVE_VALLOC)
231	>	#if defined(__GLIBC__)
232	>	// this is known to work only with GNU libc
233	>	free(p);
234	>	#endif
235	>	#else
236	>	free(p);
237	>	#endif
238	>	}
239
240		sheepshaver_cpu::sheepshaver_cpu()
241	<	: powerpc_cpu()
241	>	: powerpc_cpu(enable_jit_p())
242		{
243		init_decoder();
244		}
245
246		void sheepshaver_cpu::init_decoder()
247		{
150	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
151	–	static bool initialized = false;
152	–	if (initialized)
153	–	return;
154	–	initialized = true;
155	–	#endif
156	–
248		static const instr_info_t sheep_ii_table[] = {
249		{ "sheep",
250		(execute_pmf)&sheepshaver_cpu::execute_sheep,
251		NULL,
252	+	PPC_I(SHEEP),
253		D_form, 6, 0, CFLOW_JUMP \| CFLOW_TRAP
254		}
255		};
#	Line 171 \| Line 263 \| void sheepshaver_cpu::init_decoder()
263		}
264		}
265
174	–	// Forward declaration for native opcode handler
175	–	static void NativeOp(int selector);
176	–
266		/* NativeOp instruction format:
267	<	+------------+--------------------------+--+----------+------------+
268	<	\| 6 \| \|FN\| OP \| 2 \|
269	<	+------------+--------------------------+--+----------+------------+
270	<	0 5 \|6 19 20 21 25 26 31
267	>	+------------+-------------------------+--+-----------+------------+
268	>	\| 6 \| \|FN\| OP \| 2 \|
269	>	+------------+-------------------------+--+-----------+------------+
270	>	0 5 \|6 18 19 20 25 26 31
271		*/
272
273	<	typedef bit_field< 20, 20 > FN_field;
274	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
273	>	typedef bit_field< 19, 19 > FN_field;
274	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
275		typedef bit_field< 26, 31 > EMUL_OP_field;
276
277	+	// "Native" EMUL_OP routines
278	+	#define GPR_A(REG) gpr(16 + (REG))
279	+	#define GPR_D(REG) gpr( 8 + (REG))
280	+
281	+	void sheepshaver_cpu::execute_emul_op_microseconds()
282	+	{
283	+	Microseconds(GPR_A(0), GPR_D(0));
284	+	}
285	+
286	+	void sheepshaver_cpu::execute_emul_op_idle_time_1()
287	+	{
288	+	// Sleep if no events pending
289	+	if (ReadMacInt32(0x14c) == 0)
290	+	Delay_usec(16667);
291	+	GPR_A(0) = ReadMacInt32(0x2b6);
292	+	}
293	+
294	+	void sheepshaver_cpu::execute_emul_op_idle_time_2()
295	+	{
296	+	// Sleep if no events pending
297	+	if (ReadMacInt32(0x14c) == 0)
298	+	Delay_usec(16667);
299	+	GPR_D(0) = (uint32)-2;
300	+	}
301	+
302	+	// Filter out EMUL_OP routines that only call native code
303	+	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
304	+	{
305	+	switch (emul_op) {
306	+	case OP_MICROSECONDS:
307	+	execute_emul_op_microseconds();
308	+	return true;
309	+	case OP_IDLE_TIME:
310	+	execute_emul_op_idle_time_1();
311	+	return true;
312	+	case OP_IDLE_TIME_2:
313	+	execute_emul_op_idle_time_2();
314	+	return true;
315	+	}
316	+	return false;
317	+	}
318	+
319	+	// Execute EMUL_OP routine
320	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
321	+	{
322	+	#if ENABLE_NATIVE_EMUL_OP
323	+	// First, filter out EMUL_OPs that can be executed without a mode switch
324	+	if (filter_execute_emul_op(emul_op))
325	+	return;
326	+	#endif
327	+
328	+	M68kRegisters r68;
329	+	WriteMacInt32(XLM_68K_R25, gpr(25));
330	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
331	+	for (int i = 0; i < 8; i++)
332	+	r68.d[i] = gpr(8 + i);
333	+	for (int i = 0; i < 7; i++)
334	+	r68.a[i] = gpr(16 + i);
335	+	r68.a[7] = gpr(1);
336	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
337	+	uint32 saved_xer = get_xer();
338	+	EmulOp(&r68, gpr(24), emul_op);
339	+	set_cr(saved_cr);
340	+	set_xer(saved_xer);
341	+	for (int i = 0; i < 8; i++)
342	+	gpr(8 + i) = r68.d[i];
343	+	for (int i = 0; i < 7; i++)
344	+	gpr(16 + i) = r68.a[i];
345	+	gpr(1) = r68.a[7];
346	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
347	+	}
348	+
349		// Execute SheepShaver instruction
350		void sheepshaver_cpu::execute_sheep(uint32 opcode)
351		{
#	Line 201 \| Line 362 \| void sheepshaver_cpu::execute_sheep(uint
362		break;
363
364		case 2: // EXEC_NATIVE
365	<	NativeOp(NATIVE_OP_field::extract(opcode));
365	>	execute_native_op(NATIVE_OP_field::extract(opcode));
366		if (FN_field::test(opcode))
367		pc() = lr();
368		else
369		pc() += 4;
370		break;
371
372	<	default: { // EMUL_OP
373	<	M68kRegisters r68;
213	<	WriteMacInt32(XLM_68K_R25, gpr(25));
214	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
215	<	for (int i = 0; i < 8; i++)
216	<	r68.d[i] = gpr(8 + i);
217	<	for (int i = 0; i < 7; i++)
218	<	r68.a[i] = gpr(16 + i);
219	<	r68.a[7] = gpr(1);
220	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
221	<	for (int i = 0; i < 8; i++)
222	<	gpr(8 + i) = r68.d[i];
223	<	for (int i = 0; i < 7; i++)
224	<	gpr(16 + i) = r68.a[i];
225	<	gpr(1) = r68.a[7];
226	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
372	>	default: // EMUL_OP
373	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
374		pc() += 4;
375		break;
376		}
377	+	}
378	+
379	+	// Compile one instruction
380	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
381	+	{
382	+	#if PPC_ENABLE_JIT
383	+	const instr_info_t *ii = cg_context.instr_info;
384	+	if (ii->mnemo != PPC_I(SHEEP))
385	+	return COMPILE_FAILURE;
386	+
387	+	int status = COMPILE_FAILURE;
388	+	powerpc_dyngen & dg = cg_context.codegen;
389	+	uint32 opcode = cg_context.opcode;
390	+
391	+	switch (opcode & 0x3f) {
392	+	case 0: // EMUL_RETURN
393	+	dg.gen_invoke(QuitEmulator);
394	+	status = COMPILE_CODE_OK;
395	+	break;
396	+
397	+	case 1: // EXEC_RETURN
398	+	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
399	+	// Don't check for pending interrupts, we do know we have to
400	+	// get out of this block ASAP
401	+	dg.gen_exec_return();
402	+	status = COMPILE_EPILOGUE_OK;
403	+	break;
404	+
405	+	case 2: { // EXEC_NATIVE
406	+	uint32 selector = NATIVE_OP_field::extract(opcode);
407	+	switch (selector) {
408	+	#if !PPC_REENTRANT_JIT
409	+	// Filter out functions that may invoke Execute68k() or
410	+	// CallMacOS(), this would break reentrancy as they could
411	+	// invalidate the translation cache and even overwrite
412	+	// continuation code when we are done with them.
413	+	case NATIVE_PATCH_NAME_REGISTRY:
414	+	dg.gen_invoke(DoPatchNameRegistry);
415	+	status = COMPILE_CODE_OK;
416	+	break;
417	+	case NATIVE_VIDEO_INSTALL_ACCEL:
418	+	dg.gen_invoke(VideoInstallAccel);
419	+	status = COMPILE_CODE_OK;
420	+	break;
421	+	case NATIVE_VIDEO_VBL:
422	+	dg.gen_invoke(VideoVBL);
423	+	status = COMPILE_CODE_OK;
424	+	break;
425	+	case NATIVE_GET_RESOURCE:
426	+	case NATIVE_GET_1_RESOURCE:
427	+	case NATIVE_GET_IND_RESOURCE:
428	+	case NATIVE_GET_1_IND_RESOURCE:
429	+	case NATIVE_R_GET_RESOURCE: {
430	+	static const uint32 get_resource_ptr[] = {
431	+	XLM_GET_RESOURCE,
432	+	XLM_GET_1_RESOURCE,
433	+	XLM_GET_IND_RESOURCE,
434	+	XLM_GET_1_IND_RESOURCE,
435	+	XLM_R_GET_RESOURCE
436	+	};
437	+	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
438	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
439	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
440	+	dg.gen_invoke_CPU_im(func, old_get_resource);
441	+	status = COMPILE_CODE_OK;
442	+	break;
443	+	}
444	+	case NATIVE_CHECK_LOAD_INVOC:
445	+	dg.gen_load_T0_GPR(3);
446	+	dg.gen_load_T1_GPR(4);
447	+	dg.gen_se_16_32_T1();
448	+	dg.gen_load_T2_GPR(5);
449	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
450	+	status = COMPILE_CODE_OK;
451	+	break;
452	+	#endif
453	+	case NATIVE_BITBLT:
454	+	dg.gen_load_T0_GPR(3);
455	+	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
456	+	status = COMPILE_CODE_OK;
457	+	break;
458	+	case NATIVE_INVRECT:
459	+	dg.gen_load_T0_GPR(3);
460	+	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
461	+	status = COMPILE_CODE_OK;
462	+	break;
463	+	case NATIVE_FILLRECT:
464	+	dg.gen_load_T0_GPR(3);
465	+	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
466	+	status = COMPILE_CODE_OK;
467	+	break;
468	+	}
469	+	// Could we fully translate this NativeOp?
470	+	if (status == COMPILE_CODE_OK) {
471	+	if (!FN_field::test(opcode))
472	+	cg_context.done_compile = false;
473	+	else {
474	+	dg.gen_load_A0_LR();
475	+	dg.gen_set_PC_A0();
476	+	cg_context.done_compile = true;
477	+	}
478	+	break;
479	+	}
480	+	#if PPC_REENTRANT_JIT
481	+	// Try to execute NativeOp trampoline
482	+	if (!FN_field::test(opcode))
483	+	dg.gen_set_PC_im(cg_context.pc + 4);
484	+	else {
485	+	dg.gen_load_A0_LR();
486	+	dg.gen_set_PC_A0();
487	+	}
488	+	dg.gen_mov_32_T0_im(selector);
489	+	dg.gen_jmp(native_op_trampoline);
490	+	cg_context.done_compile = true;
491	+	status = COMPILE_EPILOGUE_OK;
492	+	break;
493	+	#endif
494	+	// Invoke NativeOp handler
495	+	if (!FN_field::test(opcode)) {
496	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
497	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
498	+	dg.gen_invoke_CPU_im(func, selector);
499	+	cg_context.done_compile = false;
500	+	status = COMPILE_CODE_OK;
501	+	}
502	+	// Otherwise, let it generate a call to execute_sheep() which
503	+	// will cause necessary updates to the program counter
504	+	break;
505	+	}
506	+
507	+	default: { // EMUL_OP
508	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
509	+	#if ENABLE_NATIVE_EMUL_OP
510	+	typedef void (*emul_op_func_t)(dyngen_cpu_base);
511	+	emul_op_func_t emul_op_func = 0;
512	+	switch (emul_op) {
513	+	case OP_MICROSECONDS:
514	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
515	+	break;
516	+	case OP_IDLE_TIME:
517	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
518	+	break;
519	+	case OP_IDLE_TIME_2:
520	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
521	+	break;
522	+	}
523	+	if (emul_op_func) {
524	+	dg.gen_invoke_CPU(emul_op_func);
525	+	cg_context.done_compile = false;
526	+	status = COMPILE_CODE_OK;
527	+	break;
528	+	}
529	+	#endif
530	+	#if PPC_REENTRANT_JIT
531	+	// Try to execute EmulOp trampoline
532	+	dg.gen_set_PC_im(cg_context.pc + 4);
533	+	dg.gen_mov_32_T0_im(emul_op);
534	+	dg.gen_jmp(emul_op_trampoline);
535	+	cg_context.done_compile = true;
536	+	status = COMPILE_EPILOGUE_OK;
537	+	break;
538	+	#endif
539	+	// Invoke EmulOp handler
540	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
541	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
542	+	dg.gen_invoke_CPU_im(func, emul_op);
543	+	cg_context.done_compile = false;
544	+	status = COMPILE_CODE_OK;
545	+	break;
546		}
547	+	}
548	+	return status;
549	+	#endif
550	+	return COMPILE_FAILURE;
551		}
552
553	<	// Execution loop
554	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
553	>	// CPU context to preserve on interrupt
554	>	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu _cpu, const char _where)
555		{
556	<	powerpc_cpu::execute(entry, enable_cache);
556	>	#if SAFE_INTERRUPT_PPC >= 2
557	>	cpu = _cpu;
558	>	where = _where;
559	>
560	>	// Save interrupt context
561	>	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
562	>	pc = cpu->pc();
563	>	lr = cpu->lr();
564	>	ctr = cpu->ctr();
565	>	cr = cpu->get_cr();
566	>	xer = cpu->get_xer();
567	>	#endif
568	>	}
569	>
570	>	sheepshaver_cpu::interrupt_context::~interrupt_context()
571	>	{
572	>	#if SAFE_INTERRUPT_PPC >= 2
573	>	// Check whether CPU context was preserved by interrupt
574	>	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
575	>	printf("FATAL: %s: interrupt clobbers registers\n", where);
576	>	for (int i = 0; i < 32; i++)
577	>	if (gpr[i] != cpu->gpr(i))
578	>	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
579	>	}
580	>	if (pc != cpu->pc())
581	>	printf("FATAL: %s: interrupt clobbers PC\n", where);
582	>	if (lr != cpu->lr())
583	>	printf("FATAL: %s: interrupt clobbers LR\n", where);
584	>	if (ctr != cpu->ctr())
585	>	printf("FATAL: %s: interrupt clobbers CTR\n", where);
586	>	if (cr != cpu->get_cr())
587	>	printf("FATAL: %s: interrupt clobbers CR\n", where);
588	>	if (xer != cpu->get_xer())
589	>	printf("FATAL: %s: interrupt clobbers XER\n", where);
590	>	#endif
591		}
592
593		// Handle MacOS interrupt
594		void sheepshaver_cpu::interrupt(uint32 entry)
595		{
596		#if EMUL_TIME_STATS
597	<	interrupt_count++;
597	>	ppc_interrupt_count++;
598		const clock_t interrupt_start = clock();
599		#endif
600
601	<	#if !MULTICORE_CPU
601	>	#if SAFE_INTERRUPT_PPC
602	>	static int depth = 0;
603	>	if (depth != 0)
604	>	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
605	>	depth++;
606	>	#endif
607	>
608		// Save program counters and branch registers
609		uint32 saved_pc = pc();
610		uint32 saved_lr = lr();
611		uint32 saved_ctr= ctr();
612		uint32 saved_sp = gpr(1);
253	–	#endif
613
614		// Initialize stack pointer to SheepShaver alternate stack base
615	<	gpr(1) = SheepStack1Base - 64;
615	>	gpr(1) = SignalStackBase() - 64;
616
617		// Build trampoline to return from interrupt
618	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
618	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
619
620		// Prepare registers for nanokernel interrupt routine
621		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 275 \| Line 634 \| void sheepshaver_cpu::interrupt(uint32 e
634		gpr(1) = KernelDataAddr;
635		gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
636		gpr(8) = 0;
637	<	gpr(10) = (uint32)trampoline;
638	<	gpr(12) = (uint32)trampoline;
637	>	gpr(10) = trampoline.addr();
638	>	gpr(12) = trampoline.addr();
639		gpr(13) = get_cr();
640
641		// rlwimi. r7,r7,8,0,0
#	Line 290 \| Line 649 \| void sheepshaver_cpu::interrupt(uint32 e
649		// Enter nanokernel
650		execute(entry);
651
293	–	#if !MULTICORE_CPU
652		// Restore program counters and branch registers
653		pc() = saved_pc;
654		lr() = saved_lr;
655		ctr()= saved_ctr;
656		gpr(1) = saved_sp;
299	–	#endif
657
658		#if EMUL_TIME_STATS
659		interrupt_time += (clock() - interrupt_start);
660		#endif
661	+
662	+	#if SAFE_INTERRUPT_PPC
663	+	depth--;
664	+	#endif
665		}
666
667		// Execute 68k routine
#	Line 413 \| Line 774 \| uint32 sheepshaver_cpu::execute_macos_co
774		uint32 saved_ctr= ctr();
775
776		// Build trampoline with EXEC_RETURN
777	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
778	<	lr() = (uint32)trampoline;
777	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
778	>	lr() = trampoline.addr();
779
780		gpr(1) -= 64; // Create stack frame
781		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 458 \| Line 819 \| inline void sheepshaver_cpu::execute_ppc
819		// Save branch registers
820		uint32 saved_lr = lr();
821
822	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
823	<	lr() = (uint32)trampoline;
822	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
823	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
824	>	lr() = trampoline.addr();
825
826		execute(entry);
827
#	Line 468 \| Line 830 \| inline void sheepshaver_cpu::execute_ppc
830		}
831
832		// Resource Manager thunk
471	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
472	–
833		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
834		{
835		uint32 type = gpr(3);
#	Line 495 \| Line 855 \| inline void sheepshaver_cpu::get_resourc
855		* SheepShaver CPU engine interface
856		**/
857
858	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
859	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
500	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
858	>	// PowerPC CPU emulator
859	>	static sheepshaver_cpu *ppc_cpu = NULL;
860
861		void FlushCodeCache(uintptr start, uintptr end)
862		{
863		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
864	<	main_cpu->invalidate_cache_range(start, end);
506	<	#if MULTICORE_CPU
507	<	interrupt_cpu->invalidate_cache_range(start, end);
508	<	#endif
509	<	}
510	<
511	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
512	<	{
513	<	#if MULTICORE_CPU
514	<	current_cpu = new_cpu;
515	<	#endif
516	<	}
517	<
518	<	static inline void cpu_pop()
519	<	{
520	<	#if MULTICORE_CPU
521	<	current_cpu = main_cpu;
522	<	#endif
864	>	ppc_cpu->invalidate_cache_range(start, end);
865		}
866
867		// Dump PPC registers
868		static void dump_registers(void)
869		{
870	<	current_cpu->dump_registers();
870	>	ppc_cpu->dump_registers();
871		}
872
873		// Dump log
874		static void dump_log(void)
875		{
876	<	current_cpu->dump_log();
876	>	ppc_cpu->dump_log();
877		}
878
879		/*
#	Line 553 \| Line 895 \| static sigsegv_return_t sigsegv_handler(
895		if ((addr - ROM_BASE) < ROM_SIZE)
896		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
897
898	<	// Ignore all other faults, if requested
899	<	if (PrefsFindBool("ignoresegv"))
900	<	return SIGSEGV_RETURN_FAILURE;
898	>	// Get program counter of target CPU
899	>	sheepshaver_cpu * const cpu = ppc_cpu;
900	>	const uint32 pc = cpu->pc();
901	>
902	>	// Fault in Mac ROM or RAM?
903	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
904	>	if (mac_fault) {
905	>
906	>	// "VM settings" during MacOS 8 installation
907	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
908	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
909	>
910	>	// MacOS 8.5 installation
911	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
912	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
913	>
914	>	// MacOS 8 serial drivers on startup
915	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 \|\| cpu->gpr(8) == 0xf3012000))
916	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
917	>
918	>	// MacOS 8.1 serial drivers on startup
919	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
920	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
921	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
922	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
923	>
924	>	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
925	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
926	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
927	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
928	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
929	>
930	>	// Ignore writes to the zero page
931	>	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
932	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
933	>
934	>	// Ignore all other faults, if requested
935	>	if (PrefsFindBool("ignoresegv"))
936	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
937	>	}
938		#else
939		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
940		#endif
#	Line 563 \| Line 942 \| static sigsegv_return_t sigsegv_handler(
942		printf("SIGSEGV\n");
943		printf(" pc %p\n", fault_instruction);
944		printf(" ea %p\n", fault_address);
566	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
945		dump_registers();
946	<	current_cpu->dump_log();
946	>	ppc_cpu->dump_log();
947		enter_mon();
948		QuitEmulator();
949
#	Line 575 \| Line 953 \| static sigsegv_return_t sigsegv_handler(
953		void init_emul_ppc(void)
954		{
955		// Initialize main CPU emulator
956	<	main_cpu = new sheepshaver_cpu();
957	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
956	>	ppc_cpu = new sheepshaver_cpu();
957	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
958	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
959		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
960
582	–	#if MULTICORE_CPU
583	–	// Initialize alternate CPU emulator to handle interrupts
584	–	interrupt_cpu = new sheepshaver_cpu();
585	–	#endif
586	–
961		// Install the handler for SIGSEGV
962		sigsegv_install_handler(sigsegv_handler);
963
#	Line 612 \| Line 986 \| void exit_emul_ppc(void)
986		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
987		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
988		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
989	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
990	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
991
992		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
993		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 628 \| Line 1004 \| void exit_emul_ppc(void)
1004		printf("\n");
1005		#endif
1006
1007	<	delete main_cpu;
632	<	#if MULTICORE_CPU
633	<	delete interrupt_cpu;
634	<	#endif
1007	>	delete ppc_cpu;
1008		}
1009
1010	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
1011	+	// Initialize EmulOp trampolines
1012	+	void init_emul_op_trampolines(basic_dyngen & dg)
1013	+	{
1014	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
1015	+	func_t func;
1016	+
1017	+	// EmulOp
1018	+	emul_op_trampoline = dg.gen_start();
1019	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
1020	+	dg.gen_invoke_CPU_T0(func);
1021	+	dg.gen_exec_return();
1022	+	dg.gen_end();
1023	+
1024	+	// NativeOp
1025	+	native_op_trampoline = dg.gen_start();
1026	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
1027	+	dg.gen_invoke_CPU_T0(func);
1028	+	dg.gen_exec_return();
1029	+	dg.gen_end();
1030	+
1031	+	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
1032	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
1033	+	}
1034	+	#endif
1035	+
1036		/*
1037		* Emulation loop
1038		*/
1039
1040		void emul_ppc(uint32 entry)
1041		{
1042	<	current_cpu = main_cpu;
1043	<	#if DEBUG
645	<	current_cpu->start_log();
1042	>	#if 0
1043	>	ppc_cpu->start_log();
1044		#endif
1045		// start emulation loop and enable code translation or caching
1046	<	current_cpu->execute(entry, true);
1046	>	ppc_cpu->execute(entry);
1047		}
1048
1049		/*
1050		* Handle PowerPC interrupt
1051		*/
1052
655	–	#if ASYNC_IRQ
656	–	void HandleInterrupt(void)
657	–	{
658	–	main_cpu->handle_interrupt();
659	–	}
660	–	#else
1053		void TriggerInterrupt(void)
1054		{
1055		#if 0
1056		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
1057		#else
1058		// Trigger interrupt to main cpu only
1059	<	if (main_cpu)
1060	<	main_cpu->trigger_interrupt();
1059	>	if (ppc_cpu)
1060	>	ppc_cpu->trigger_interrupt();
1061		#endif
1062		}
671	–	#endif
1063
1064		void sheepshaver_cpu::handle_interrupt(void)
1065		{
1066	+	#ifdef USE_SDL_VIDEO
1067	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
1068	+	SDL_PumpEvents();
1069	+	#endif
1070	+
1071		// Do nothing if interrupts are disabled
1072		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
1073		return;
1074
1075	<	// Do nothing if there is no interrupt pending
1076	<	if (InterruptFlags == 0)
1077	<	return;
1075	>	// Current interrupt nest level
1076	>	static int interrupt_depth = 0;
1077	>	++interrupt_depth;
1078	>	#if EMUL_TIME_STATS
1079	>	interrupt_count++;
1080	>	#endif
1081
1082		// Disable MacOS stack sniffer
1083		WriteMacInt32(0x110, 0);
#	Line 687 \| Line 1086 \| void sheepshaver_cpu::handle_interrupt(v
1086		switch (ReadMacInt32(XLM_RUN_MODE)) {
1087		case MODE_68K:
1088		// 68k emulator active, trigger 68k interrupt level 1
690	–	assert(current_cpu == main_cpu);
1089		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1090		set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
1091		break;
#	Line 695 \| Line 1093 \| void sheepshaver_cpu::handle_interrupt(v
1093		#if INTERRUPTS_IN_NATIVE_MODE
1094		case MODE_NATIVE:
1095		// 68k emulator inactive, in nanokernel?
1096	<	assert(current_cpu == main_cpu);
1097	<	if (gpr(1) != KernelDataAddr) {
1096	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1097	>	interrupt_context ctx(this, "PowerPC mode");
1098	>
1099		// Prepare for 68k interrupt level 1
1100		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1101		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 705 \| Line 1104 \| void sheepshaver_cpu::handle_interrupt(v
1104
1105		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1106		DisableInterrupt();
708	–	cpu_push(interrupt_cpu);
1107		if (ROMType == ROMTYPE_NEWWORLD)
1108	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
1108	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1109		else
1110	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
713	<	cpu_pop();
1110	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1111		}
1112		break;
1113		#endif
#	Line 719 \| Line 1116 \| void sheepshaver_cpu::handle_interrupt(v
1116		case MODE_EMUL_OP:
1117		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1118		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1119	+	interrupt_context ctx(this, "68k mode");
1120	+	#if EMUL_TIME_STATS
1121	+	const clock_t interrupt_start = clock();
1122	+	#endif
1123		#if 1
1124		// Execute full 68k interrupt routine
1125		M68kRegisters r;
#	Line 740 \| Line 1141 \| void sheepshaver_cpu::handle_interrupt(v
1141		if (InterruptFlags & INTFLAG_VIA) {
1142		ClearInterruptFlag(INTFLAG_VIA);
1143		ADBInterrupt();
1144	<	ExecutePPC(VideoVBL);
1144	>	ExecuteNative(NATIVE_VIDEO_VBL);
1145		}
1146		}
1147		#endif
1148	+	#if EMUL_TIME_STATS
1149	+	interrupt_time += (clock() - interrupt_start);
1150	+	#endif
1151		}
1152		break;
1153		#endif
1154		}
751	–	}
752	–
753	–	/*
754	–	* Execute NATIVE_OP opcode (called by PowerPC emulator)
755	–	*/
1155
1156	<	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
1157	<	tswap32(POWERPC_EMUL_OP \| ((LR) << 11) \| (((uint32)OP) << 6) \| 2)
1158	<
760	<	// FIXME: Make sure 32-bit relocations are used
761	<	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
762	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
763	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
764	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
765	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
766	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
767	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
768	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
769	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
770	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
771	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
772	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
773	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
774	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
775	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
776	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
777	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
778	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
779	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
780	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
781	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
782	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
783	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
784	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
785	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
786	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
787	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
788	<	};
1156	>	// We are done with this interrupt
1157	>	--interrupt_depth;
1158	>	}
1159
1160		static void get_resource(void);
1161		static void get_1_resource(void);
#	Line 793 \| Line 1163 \| static void get_ind_resource(void);
1163		static void get_1_ind_resource(void);
1164		static void r_get_resource(void);
1165
1166	<	#define GPR(REG) current_cpu->gpr(REG)
1167	<
798	<	static void NativeOp(int selector)
1166	>	// Execute NATIVE_OP routine
1167	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1168		{
1169		#if EMUL_TIME_STATS
1170		native_exec_count++;
#	Line 813 \| Line 1182 \| static void NativeOp(int selector)
1182		VideoVBL();
1183		break;
1184		case NATIVE_VIDEO_DO_DRIVER_IO:
1185	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
1186	<	(void *)GPR(5), GPR(6), GPR(7));
1185	>	gpr(3) = (int32)(int16)VideoDoDriverIO((void )gpr(3), (void )gpr(4),
1186	>	(void *)gpr(5), gpr(6), gpr(7));
1187		break;
1188	<	case NATIVE_GET_RESOURCE:
1189	<	get_resource();
1188	>	#ifdef WORDS_BIGENDIAN
1189	>	case NATIVE_ETHER_IRQ:
1190	>	EtherIRQ();
1191		break;
1192	<	case NATIVE_GET_1_RESOURCE:
1193	<	get_1_resource();
1192	>	case NATIVE_ETHER_INIT:
1193	>	gpr(3) = InitStreamModule((void *)gpr(3));
1194		break;
1195	<	case NATIVE_GET_IND_RESOURCE:
1196	<	get_ind_resource();
1195	>	case NATIVE_ETHER_TERM:
1196	>	TerminateStreamModule();
1197		break;
1198	<	case NATIVE_GET_1_IND_RESOURCE:
1199	<	get_1_ind_resource();
1198	>	case NATIVE_ETHER_OPEN:
1199	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1200	>	break;
1201	>	case NATIVE_ETHER_CLOSE:
1202	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1203		break;
1204	<	case NATIVE_R_GET_RESOURCE:
1205	<	r_get_resource();
1204	>	case NATIVE_ETHER_WPUT:
1205	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1206	>	break;
1207	>	case NATIVE_ETHER_RSRV:
1208	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1209	>	break;
1210	>	#else
1211	>	case NATIVE_ETHER_INIT:
1212	>	// FIXME: needs more complicated thunks
1213	>	gpr(3) = false;
1214	>	break;
1215	>	#endif
1216	>	case NATIVE_SYNC_HOOK:
1217	>	gpr(3) = NQD_sync_hook(gpr(3));
1218	>	break;
1219	>	case NATIVE_BITBLT_HOOK:
1220	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1221	>	break;
1222	>	case NATIVE_BITBLT:
1223	>	NQD_bitblt(gpr(3));
1224	>	break;
1225	>	case NATIVE_FILLRECT_HOOK:
1226	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1227	>	break;
1228	>	case NATIVE_INVRECT:
1229	>	NQD_invrect(gpr(3));
1230	>	break;
1231	>	case NATIVE_FILLRECT:
1232	>	NQD_fillrect(gpr(3));
1233		break;
1234		case NATIVE_SERIAL_NOTHING:
1235		case NATIVE_SERIAL_OPEN:
#	Line 848 \| Line 1248 \| static void NativeOp(int selector)
1248		SerialStatus,
1249		SerialClose
1250		};
1251	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1251	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1252		break;
1253		}
1254	<	case NATIVE_DISABLE_INTERRUPT:
1255	<	DisableInterrupt();
1256	<	break;
1257	<	case NATIVE_ENABLE_INTERRUPT:
1258	<	EnableInterrupt();
1254	>	case NATIVE_GET_RESOURCE:
1255	>	case NATIVE_GET_1_RESOURCE:
1256	>	case NATIVE_GET_IND_RESOURCE:
1257	>	case NATIVE_GET_1_IND_RESOURCE:
1258	>	case NATIVE_R_GET_RESOURCE: {
1259	>	typedef void (*GetResourceCallback)(void);
1260	>	static const GetResourceCallback get_resource_callbacks[] = {
1261	>	::get_resource,
1262	>	::get_1_resource,
1263	>	::get_ind_resource,
1264	>	::get_1_ind_resource,
1265	>	::r_get_resource
1266	>	};
1267	>	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1268		break;
1269	+	}
1270		case NATIVE_MAKE_EXECUTABLE:
1271	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1271	>	MakeExecutable(0, (void *)gpr(4), gpr(5));
1272	>	break;
1273	>	case NATIVE_CHECK_LOAD_INVOC:
1274	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1275		break;
1276		default:
1277		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 872 \| Line 1285 \| static void NativeOp(int selector)
1285		}
1286
1287		/*
875	–	* Execute native subroutine (LR must contain return address)
876	–	*/
877	–
878	–	void ExecuteNative(int selector)
879	–	{
880	–	uint32 tvect[2];
881	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
882	–	tvect[1] = 0; // Fake TVECT
883	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
884	–	M68kRegisters r;
885	–	Execute68k((uint32)&desc, &r);
886	–	}
887	–
888	–	/*
1288		* Execute 68k subroutine (must be ended with EXEC_RETURN)
1289		* This must only be called by the emul_thread when in EMUL_OP mode
1290		* r->a[7] is unused, the routine runs on the caller's stack
#	Line 893 \| Line 1292 \| void ExecuteNative(int selector)
1292
1293		void Execute68k(uint32 pc, M68kRegisters *r)
1294		{
1295	<	current_cpu->execute_68k(pc, r);
1295	>	ppc_cpu->execute_68k(pc, r);
1296		}
1297
1298		/*
#	Line 903 \| Line 1302 \| void Execute68k(uint32 pc, M68kRegisters
1302
1303		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1304		{
1305	<	uint16 proc[2];
1306	<	proc[0] = htons(trap);
1307	<	proc[1] = htons(M68K_RTS);
1308	<	Execute68k((uint32)proc, r);
1305	>	SheepVar proc_var(4);
1306	>	uint32 proc = proc_var.addr();
1307	>	WriteMacInt16(proc, trap);
1308	>	WriteMacInt16(proc + 2, M68K_RTS);
1309	>	Execute68k(proc, r);
1310		}
1311
1312		/*
#	Line 915 \| Line 1315 \| void Execute68kTrap(uint16 trap, M68kReg
1315
1316		uint32 call_macos(uint32 tvect)
1317		{
1318	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1318	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1319		}
1320
1321		uint32 call_macos1(uint32 tvect, uint32 arg1)
1322		{
1323		const uint32 args[] = { arg1 };
1324	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1324	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1325		}
1326
1327		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1328		{
1329		const uint32 args[] = { arg1, arg2 };
1330	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1330	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1331		}
1332
1333		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1334		{
1335		const uint32 args[] = { arg1, arg2, arg3 };
1336	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1336	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1337		}
1338
1339		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1340		{
1341		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1342	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1342	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1343		}
1344
1345		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1346		{
1347		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1348	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1348	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1349		}
1350
1351		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1352		{
1353		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1354	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1354	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1355		}
1356
1357		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1358		{
1359		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1360	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1360	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1361		}
1362
1363		/*
#	Line 966 \| Line 1366 \| uint32 call_macos7(uint32 tvect, uint32
1366
1367		void get_resource(void)
1368		{
1369	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1369	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1370		}
1371
1372		void get_1_resource(void)
1373		{
1374	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1374	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1375		}
1376
1377		void get_ind_resource(void)
1378		{
1379	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1379	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1380		}
1381
1382		void get_1_ind_resource(void)
1383		{
1384	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1384	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1385		}
1386
1387		void r_get_resource(void)
1388		{
1389	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1389	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1390		}

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs. Revision 1.47 by gbeauche, 2004-06-24T15:37:26Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.47 by gbeauche, 2004-06-24T15:37:26Z