[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.45 by gbeauche, 2004-06-22T14:18:35Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 30 \| Line 30
30		#include "sigsegv.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45
46		#if ENABLE_MON
47		#include "mon.h"
#	Line 47 \| Line 52
52		#include "debug.h"
53
54		// Emulation time statistics
55	<	#define EMUL_TIME_STATS 1
55	>	#ifndef EMUL_TIME_STATS
56	>	#define EMUL_TIME_STATS 0
57	>	#endif
58
59		#if EMUL_TIME_STATS
60		static clock_t emul_start_time;
61	<	static uint32 interrupt_count = 0;
61	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
62		static clock_t interrupt_time = 0;
63		static uint32 exec68k_count = 0;
64		static clock_t exec68k_time = 0;
#	Line 70 \| Line 77 \| static void enter_mon(void)
77		#endif
78		}
79
80	<	// Enable multicore (main/interrupts) cpu emulation?
81	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
80	>	// From main_*.cpp
81	>	extern uintptr SignalStackBase();
82	>
83	>	// From rsrc_patches.cpp
84	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
85	>
86	>	// PowerPC EmulOp to exit from emulation looop
87	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
88	>
89	>	// Enable interrupt routine safety checks?
90	>	#define SAFE_INTERRUPT_PPC 1
91
92		// Enable Execute68k() safety checks?
93		#define SAFE_EXEC_68K 1
#	Line 85 \| Line 101 \| static void enter_mon(void)
101		// Interrupts in native mode?
102		#define INTERRUPTS_IN_NATIVE_MODE 1
103
104	+	// Enable native EMUL_OPs to be run without a mode switch
105	+	#define ENABLE_NATIVE_EMUL_OP 1
106	+
107		// Pointer to Kernel Data
108		static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109
110	+	// SIGSEGV handler
111	+	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
112	+
113	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
114	+	// Special trampolines for EmulOp and NativeOp
115	+	static uint8 *emul_op_trampoline;
116	+	static uint8 *native_op_trampoline;
117	+	#endif
118	+
119	+	// JIT Compiler enabled?
120	+	static inline bool enable_jit_p()
121	+	{
122	+	return PrefsFindBool("jit");
123	+	}
124	+
125
126		/**
127		* PowerPC emulator glue with special 'sheep' opcodes
128		**/
129
130	+	enum {
131	+	PPC_I(SHEEP) = PPC_I(MAX),
132	+	PPC_I(SHEEP_MAX)
133	+	};
134	+
135		class sheepshaver_cpu
136		: public powerpc_cpu
137		{
138		void init_decoder();
139		void execute_sheep(uint32 opcode);
140
141	+	// Filter out EMUL_OP routines that only call native code
142	+	bool filter_execute_emul_op(uint32 emul_op);
143	+
144	+	// "Native" EMUL_OP routines
145	+	void execute_emul_op_microseconds();
146	+	void execute_emul_op_idle_time_1();
147	+	void execute_emul_op_idle_time_2();
148	+
149	+	// CPU context to preserve on interrupt
150	+	class interrupt_context {
151	+	uint32 gpr[32];
152	+	uint32 pc;
153	+	uint32 lr;
154	+	uint32 ctr;
155	+	uint32 cr;
156	+	uint32 xer;
157	+	sheepshaver_cpu *cpu;
158	+	const char *where;
159	+	public:
160	+	interrupt_context(sheepshaver_cpu _cpu, const char _where);
161	+	~interrupt_context();
162	+	};
163	+
164		public:
165
166		// Constructor
167		sheepshaver_cpu();
168
169	<	// Condition Register accessors
169	>	// CR & XER accessors
170		uint32 get_cr() const { return cr().get(); }
171		void set_cr(uint32 v) { cr().set(v); }
172	+	uint32 get_xer() const { return xer().get(); }
173	+	void set_xer(uint32 v) { xer().set(v); }
174	+
175	+	// Execute NATIVE_OP routine
176	+	void execute_native_op(uint32 native_op);
177
178	<	// Execution loop
179	<	void execute(uint32 entry, bool enable_cache = false);
178	>	// Execute EMUL_OP routine
179	>	void execute_emul_op(uint32 emul_op);
180
181		// Execute 68k routine
182		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 120 \| Line 187 \| public:
187		// Execute MacOS/PPC code
188		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
189
190	+	// Compile one instruction
191	+	virtual int compile1(codegen_context_t & cg_context);
192	+
193		// Resource manager thunk
194		void get_resource(uint32 old_get_resource);
195
#	Line 127 \| Line 197 \| public:
197		void interrupt(uint32 entry);
198		void handle_interrupt();
199
200	<	// Lazy memory allocator (one item at a time)
201	<	void *operator new(size_t size)
132	<	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
133	<	void operator delete(void *p)
134	<	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
135	<	// FIXME: really make surre array allocation fail at link time?
136	<	void *operator new[](size_t);
137	<	void operator delete[](void *p);
200	>	// Make sure the SIGSEGV handler can access CPU registers
201	>	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
202		};
203
204	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
204	>	// Memory allocator returning areas aligned on 16-byte boundaries
205	>	void *operator new(size_t size)
206	>	{
207	>	void *p;
208	>
209	>	#if defined(HAVE_POSIX_MEMALIGN)
210	>	if (posix_memalign(&p, 16, size) != 0)
211	>	throw std::bad_alloc();
212	>	#elif defined(HAVE_MEMALIGN)
213	>	p = memalign(16, size);
214	>	#elif defined(HAVE_VALLOC)
215	>	p = valloc(size); // page-aligned!
216	>	#else
217	>	/* XXX: handle padding ourselves */
218	>	p = malloc(size);
219	>	#endif
220	>
221	>	return p;
222	>	}
223	>
224	>	void operator delete(void *p)
225	>	{
226	>	#if defined(HAVE_MEMALIGN) \|\| defined(HAVE_VALLOC)
227	>	#if defined(__GLIBC__)
228	>	// this is known to work only with GNU libc
229	>	free(p);
230	>	#endif
231	>	#else
232	>	free(p);
233	>	#endif
234	>	}
235
236		sheepshaver_cpu::sheepshaver_cpu()
237	<	: powerpc_cpu()
237	>	: powerpc_cpu(enable_jit_p())
238		{
239		init_decoder();
240		}
241
242		void sheepshaver_cpu::init_decoder()
243		{
150	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
151	–	static bool initialized = false;
152	–	if (initialized)
153	–	return;
154	–	initialized = true;
155	–	#endif
156	–
244		static const instr_info_t sheep_ii_table[] = {
245		{ "sheep",
246		(execute_pmf)&sheepshaver_cpu::execute_sheep,
247		NULL,
248	+	PPC_I(SHEEP),
249		D_form, 6, 0, CFLOW_JUMP \| CFLOW_TRAP
250		}
251		};
#	Line 171 \| Line 259 \| void sheepshaver_cpu::init_decoder()
259		}
260		}
261
174	–	// Forward declaration for native opcode handler
175	–	static void NativeOp(int selector);
176	–
262		/* NativeOp instruction format:
263	<	+------------+--------------------------+--+----------+------------+
264	<	\| 6 \| \|FN\| OP \| 2 \|
265	<	+------------+--------------------------+--+----------+------------+
266	<	0 5 \|6 19 20 21 25 26 31
263	>	+------------+-------------------------+--+-----------+------------+
264	>	\| 6 \| \|FN\| OP \| 2 \|
265	>	+------------+-------------------------+--+-----------+------------+
266	>	0 5 \|6 18 19 20 25 26 31
267		*/
268
269	<	typedef bit_field< 20, 20 > FN_field;
270	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
269	>	typedef bit_field< 19, 19 > FN_field;
270	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
271		typedef bit_field< 26, 31 > EMUL_OP_field;
272
273	+	// "Native" EMUL_OP routines
274	+	#define GPR_A(REG) gpr(16 + (REG))
275	+	#define GPR_D(REG) gpr( 8 + (REG))
276	+
277	+	void sheepshaver_cpu::execute_emul_op_microseconds()
278	+	{
279	+	Microseconds(GPR_A(0), GPR_D(0));
280	+	}
281	+
282	+	void sheepshaver_cpu::execute_emul_op_idle_time_1()
283	+	{
284	+	// Sleep if no events pending
285	+	if (ReadMacInt32(0x14c) == 0)
286	+	Delay_usec(16667);
287	+	GPR_A(0) = ReadMacInt32(0x2b6);
288	+	}
289	+
290	+	void sheepshaver_cpu::execute_emul_op_idle_time_2()
291	+	{
292	+	// Sleep if no events pending
293	+	if (ReadMacInt32(0x14c) == 0)
294	+	Delay_usec(16667);
295	+	GPR_D(0) = (uint32)-2;
296	+	}
297	+
298	+	// Filter out EMUL_OP routines that only call native code
299	+	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
300	+	{
301	+	switch (emul_op) {
302	+	case OP_MICROSECONDS:
303	+	execute_emul_op_microseconds();
304	+	return true;
305	+	case OP_IDLE_TIME:
306	+	execute_emul_op_idle_time_1();
307	+	return true;
308	+	case OP_IDLE_TIME_2:
309	+	execute_emul_op_idle_time_2();
310	+	return true;
311	+	}
312	+	return false;
313	+	}
314	+
315	+	// Execute EMUL_OP routine
316	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
317	+	{
318	+	#if ENABLE_NATIVE_EMUL_OP
319	+	// First, filter out EMUL_OPs that can be executed without a mode switch
320	+	if (filter_execute_emul_op(emul_op))
321	+	return;
322	+	#endif
323	+
324	+	M68kRegisters r68;
325	+	WriteMacInt32(XLM_68K_R25, gpr(25));
326	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
327	+	for (int i = 0; i < 8; i++)
328	+	r68.d[i] = gpr(8 + i);
329	+	for (int i = 0; i < 7; i++)
330	+	r68.a[i] = gpr(16 + i);
331	+	r68.a[7] = gpr(1);
332	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
333	+	uint32 saved_xer = get_xer();
334	+	EmulOp(&r68, gpr(24), emul_op);
335	+	set_cr(saved_cr);
336	+	set_xer(saved_xer);
337	+	for (int i = 0; i < 8; i++)
338	+	gpr(8 + i) = r68.d[i];
339	+	for (int i = 0; i < 7; i++)
340	+	gpr(16 + i) = r68.a[i];
341	+	gpr(1) = r68.a[7];
342	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
343	+	}
344	+
345		// Execute SheepShaver instruction
346		void sheepshaver_cpu::execute_sheep(uint32 opcode)
347		{
#	Line 201 \| Line 358 \| void sheepshaver_cpu::execute_sheep(uint
358		break;
359
360		case 2: // EXEC_NATIVE
361	<	NativeOp(NATIVE_OP_field::extract(opcode));
361	>	execute_native_op(NATIVE_OP_field::extract(opcode));
362		if (FN_field::test(opcode))
363		pc() = lr();
364		else
365		pc() += 4;
366		break;
367
368	<	default: { // EMUL_OP
369	<	M68kRegisters r68;
213	<	WriteMacInt32(XLM_68K_R25, gpr(25));
214	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
215	<	for (int i = 0; i < 8; i++)
216	<	r68.d[i] = gpr(8 + i);
217	<	for (int i = 0; i < 7; i++)
218	<	r68.a[i] = gpr(16 + i);
219	<	r68.a[7] = gpr(1);
220	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
221	<	for (int i = 0; i < 8; i++)
222	<	gpr(8 + i) = r68.d[i];
223	<	for (int i = 0; i < 7; i++)
224	<	gpr(16 + i) = r68.a[i];
225	<	gpr(1) = r68.a[7];
226	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
368	>	default: // EMUL_OP
369	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
370		pc() += 4;
371		break;
372		}
373	+	}
374	+
375	+	// Compile one instruction
376	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
377	+	{
378	+	#if PPC_ENABLE_JIT
379	+	const instr_info_t *ii = cg_context.instr_info;
380	+	if (ii->mnemo != PPC_I(SHEEP))
381	+	return COMPILE_FAILURE;
382	+
383	+	int status = COMPILE_FAILURE;
384	+	powerpc_dyngen & dg = cg_context.codegen;
385	+	uint32 opcode = cg_context.opcode;
386	+
387	+	switch (opcode & 0x3f) {
388	+	case 0: // EMUL_RETURN
389	+	dg.gen_invoke(QuitEmulator);
390	+	status = COMPILE_CODE_OK;
391	+	break;
392	+
393	+	case 1: // EXEC_RETURN
394	+	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
395	+	// Don't check for pending interrupts, we do know we have to
396	+	// get out of this block ASAP
397	+	dg.gen_exec_return();
398	+	status = COMPILE_EPILOGUE_OK;
399	+	break;
400	+
401	+	case 2: { // EXEC_NATIVE
402	+	uint32 selector = NATIVE_OP_field::extract(opcode);
403	+	switch (selector) {
404	+	#if !PPC_REENTRANT_JIT
405	+	// Filter out functions that may invoke Execute68k() or
406	+	// CallMacOS(), this would break reentrancy as they could
407	+	// invalidate the translation cache and even overwrite
408	+	// continuation code when we are done with them.
409	+	case NATIVE_PATCH_NAME_REGISTRY:
410	+	dg.gen_invoke(DoPatchNameRegistry);
411	+	status = COMPILE_CODE_OK;
412	+	break;
413	+	case NATIVE_VIDEO_INSTALL_ACCEL:
414	+	dg.gen_invoke(VideoInstallAccel);
415	+	status = COMPILE_CODE_OK;
416	+	break;
417	+	case NATIVE_VIDEO_VBL:
418	+	dg.gen_invoke(VideoVBL);
419	+	status = COMPILE_CODE_OK;
420	+	break;
421	+	case NATIVE_GET_RESOURCE:
422	+	case NATIVE_GET_1_RESOURCE:
423	+	case NATIVE_GET_IND_RESOURCE:
424	+	case NATIVE_GET_1_IND_RESOURCE:
425	+	case NATIVE_R_GET_RESOURCE: {
426	+	static const uint32 get_resource_ptr[] = {
427	+	XLM_GET_RESOURCE,
428	+	XLM_GET_1_RESOURCE,
429	+	XLM_GET_IND_RESOURCE,
430	+	XLM_GET_1_IND_RESOURCE,
431	+	XLM_R_GET_RESOURCE
432	+	};
433	+	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
434	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
435	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
436	+	dg.gen_invoke_CPU_im(func, old_get_resource);
437	+	status = COMPILE_CODE_OK;
438	+	break;
439	+	}
440	+	case NATIVE_CHECK_LOAD_INVOC:
441	+	dg.gen_load_T0_GPR(3);
442	+	dg.gen_load_T1_GPR(4);
443	+	dg.gen_se_16_32_T1();
444	+	dg.gen_load_T2_GPR(5);
445	+	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
446	+	status = COMPILE_CODE_OK;
447	+	break;
448	+	#endif
449	+	case NATIVE_DISABLE_INTERRUPT:
450	+	dg.gen_invoke(DisableInterrupt);
451	+	status = COMPILE_CODE_OK;
452	+	break;
453	+	case NATIVE_ENABLE_INTERRUPT:
454	+	dg.gen_invoke(EnableInterrupt);
455	+	status = COMPILE_CODE_OK;
456	+	break;
457	+	case NATIVE_BITBLT:
458	+	dg.gen_load_T0_GPR(3);
459	+	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
460	+	status = COMPILE_CODE_OK;
461	+	break;
462	+	case NATIVE_INVRECT:
463	+	dg.gen_load_T0_GPR(3);
464	+	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
465	+	status = COMPILE_CODE_OK;
466	+	break;
467	+	case NATIVE_FILLRECT:
468	+	dg.gen_load_T0_GPR(3);
469	+	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
470	+	status = COMPILE_CODE_OK;
471	+	break;
472	+	}
473	+	// Could we fully translate this NativeOp?
474	+	if (status == COMPILE_CODE_OK) {
475	+	if (!FN_field::test(opcode))
476	+	cg_context.done_compile = false;
477	+	else {
478	+	dg.gen_load_A0_LR();
479	+	dg.gen_set_PC_A0();
480	+	cg_context.done_compile = true;
481	+	}
482	+	break;
483	+	}
484	+	#if PPC_REENTRANT_JIT
485	+	// Try to execute NativeOp trampoline
486	+	if (!FN_field::test(opcode))
487	+	dg.gen_set_PC_im(cg_context.pc + 4);
488	+	else {
489	+	dg.gen_load_A0_LR();
490	+	dg.gen_set_PC_A0();
491	+	}
492	+	dg.gen_mov_32_T0_im(selector);
493	+	dg.gen_jmp(native_op_trampoline);
494	+	cg_context.done_compile = true;
495	+	status = COMPILE_EPILOGUE_OK;
496	+	break;
497	+	#endif
498	+	// Invoke NativeOp handler
499	+	if (!FN_field::test(opcode)) {
500	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
501	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
502	+	dg.gen_invoke_CPU_im(func, selector);
503	+	cg_context.done_compile = false;
504	+	status = COMPILE_CODE_OK;
505	+	}
506	+	// Otherwise, let it generate a call to execute_sheep() which
507	+	// will cause necessary updates to the program counter
508	+	break;
509		}
510	+
511	+	default: { // EMUL_OP
512	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
513	+	#if ENABLE_NATIVE_EMUL_OP
514	+	typedef void (*emul_op_func_t)(dyngen_cpu_base);
515	+	emul_op_func_t emul_op_func = 0;
516	+	switch (emul_op) {
517	+	case OP_MICROSECONDS:
518	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
519	+	break;
520	+	case OP_IDLE_TIME:
521	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
522	+	break;
523	+	case OP_IDLE_TIME_2:
524	+	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
525	+	break;
526	+	}
527	+	if (emul_op_func) {
528	+	dg.gen_invoke_CPU(emul_op_func);
529	+	cg_context.done_compile = false;
530	+	status = COMPILE_CODE_OK;
531	+	break;
532	+	}
533	+	#endif
534	+	#if PPC_REENTRANT_JIT
535	+	// Try to execute EmulOp trampoline
536	+	dg.gen_set_PC_im(cg_context.pc + 4);
537	+	dg.gen_mov_32_T0_im(emul_op);
538	+	dg.gen_jmp(emul_op_trampoline);
539	+	cg_context.done_compile = true;
540	+	status = COMPILE_EPILOGUE_OK;
541	+	break;
542	+	#endif
543	+	// Invoke EmulOp handler
544	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
545	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
546	+	dg.gen_invoke_CPU_im(func, emul_op);
547	+	cg_context.done_compile = false;
548	+	status = COMPILE_CODE_OK;
549	+	break;
550	+	}
551	+	}
552	+	return status;
553	+	#endif
554	+	return COMPILE_FAILURE;
555		}
556
557	<	// Execution loop
558	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
557	>	// CPU context to preserve on interrupt
558	>	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu _cpu, const char _where)
559		{
560	<	powerpc_cpu::execute(entry, enable_cache);
560	>	#if SAFE_INTERRUPT_PPC >= 2
561	>	cpu = _cpu;
562	>	where = _where;
563	>
564	>	// Save interrupt context
565	>	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
566	>	pc = cpu->pc();
567	>	lr = cpu->lr();
568	>	ctr = cpu->ctr();
569	>	cr = cpu->get_cr();
570	>	xer = cpu->get_xer();
571	>	#endif
572	>	}
573	>
574	>	sheepshaver_cpu::interrupt_context::~interrupt_context()
575	>	{
576	>	#if SAFE_INTERRUPT_PPC >= 2
577	>	// Check whether CPU context was preserved by interrupt
578	>	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
579	>	printf("FATAL: %s: interrupt clobbers registers\n", where);
580	>	for (int i = 0; i < 32; i++)
581	>	if (gpr[i] != cpu->gpr(i))
582	>	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
583	>	}
584	>	if (pc != cpu->pc())
585	>	printf("FATAL: %s: interrupt clobbers PC\n", where);
586	>	if (lr != cpu->lr())
587	>	printf("FATAL: %s: interrupt clobbers LR\n", where);
588	>	if (ctr != cpu->ctr())
589	>	printf("FATAL: %s: interrupt clobbers CTR\n", where);
590	>	if (cr != cpu->get_cr())
591	>	printf("FATAL: %s: interrupt clobbers CR\n", where);
592	>	if (xer != cpu->get_xer())
593	>	printf("FATAL: %s: interrupt clobbers XER\n", where);
594	>	#endif
595		}
596
597		// Handle MacOS interrupt
598		void sheepshaver_cpu::interrupt(uint32 entry)
599		{
600		#if EMUL_TIME_STATS
601	<	interrupt_count++;
601	>	ppc_interrupt_count++;
602		const clock_t interrupt_start = clock();
603		#endif
604
605	<	#if !MULTICORE_CPU
605	>	#if SAFE_INTERRUPT_PPC
606	>	static int depth = 0;
607	>	if (depth != 0)
608	>	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
609	>	depth++;
610	>	#endif
611	>
612		// Save program counters and branch registers
613		uint32 saved_pc = pc();
614		uint32 saved_lr = lr();
615		uint32 saved_ctr= ctr();
616		uint32 saved_sp = gpr(1);
253	–	#endif
617
618		// Initialize stack pointer to SheepShaver alternate stack base
619	<	gpr(1) = SheepStack1Base - 64;
619	>	gpr(1) = SignalStackBase() - 64;
620
621		// Build trampoline to return from interrupt
622	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
622	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
623
624		// Prepare registers for nanokernel interrupt routine
625		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 275 \| Line 638 \| void sheepshaver_cpu::interrupt(uint32 e
638		gpr(1) = KernelDataAddr;
639		gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
640		gpr(8) = 0;
641	<	gpr(10) = (uint32)trampoline;
642	<	gpr(12) = (uint32)trampoline;
641	>	gpr(10) = trampoline.addr();
642	>	gpr(12) = trampoline.addr();
643		gpr(13) = get_cr();
644
645		// rlwimi. r7,r7,8,0,0
#	Line 290 \| Line 653 \| void sheepshaver_cpu::interrupt(uint32 e
653		// Enter nanokernel
654		execute(entry);
655
293	–	#if !MULTICORE_CPU
656		// Restore program counters and branch registers
657		pc() = saved_pc;
658		lr() = saved_lr;
659		ctr()= saved_ctr;
660		gpr(1) = saved_sp;
299	–	#endif
661
662		#if EMUL_TIME_STATS
663		interrupt_time += (clock() - interrupt_start);
664		#endif
665	+
666	+	#if SAFE_INTERRUPT_PPC
667	+	depth--;
668	+	#endif
669		}
670
671		// Execute 68k routine
#	Line 413 \| Line 778 \| uint32 sheepshaver_cpu::execute_macos_co
778		uint32 saved_ctr= ctr();
779
780		// Build trampoline with EXEC_RETURN
781	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
782	<	lr() = (uint32)trampoline;
781	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
782	>	lr() = trampoline.addr();
783
784		gpr(1) -= 64; // Create stack frame
785		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 458 \| Line 823 \| inline void sheepshaver_cpu::execute_ppc
823		// Save branch registers
824		uint32 saved_lr = lr();
825
826	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP \| 1) };
827	<	lr() = (uint32)trampoline;
826	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
827	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
828	>	lr() = trampoline.addr();
829
830		execute(entry);
831
#	Line 468 \| Line 834 \| inline void sheepshaver_cpu::execute_ppc
834		}
835
836		// Resource Manager thunk
471	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
472	–
837		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
838		{
839		uint32 type = gpr(3);
#	Line 495 \| Line 859 \| inline void sheepshaver_cpu::get_resourc
859		* SheepShaver CPU engine interface
860		**/
861
862	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
863	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
500	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
862	>	// PowerPC CPU emulator
863	>	static sheepshaver_cpu *ppc_cpu = NULL;
864
865		void FlushCodeCache(uintptr start, uintptr end)
866		{
867		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
868	<	main_cpu->invalidate_cache_range(start, end);
506	<	#if MULTICORE_CPU
507	<	interrupt_cpu->invalidate_cache_range(start, end);
508	<	#endif
509	<	}
510	<
511	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
512	<	{
513	<	#if MULTICORE_CPU
514	<	current_cpu = new_cpu;
515	<	#endif
516	<	}
517	<
518	<	static inline void cpu_pop()
519	<	{
520	<	#if MULTICORE_CPU
521	<	current_cpu = main_cpu;
522	<	#endif
868	>	ppc_cpu->invalidate_cache_range(start, end);
869		}
870
871		// Dump PPC registers
872		static void dump_registers(void)
873		{
874	<	current_cpu->dump_registers();
874	>	ppc_cpu->dump_registers();
875		}
876
877		// Dump log
878		static void dump_log(void)
879		{
880	<	current_cpu->dump_log();
880	>	ppc_cpu->dump_log();
881		}
882
883		/*
#	Line 553 \| Line 899 \| static sigsegv_return_t sigsegv_handler(
899		if ((addr - ROM_BASE) < ROM_SIZE)
900		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
901
902	<	// Ignore all other faults, if requested
903	<	if (PrefsFindBool("ignoresegv"))
904	<	return SIGSEGV_RETURN_FAILURE;
902	>	// Get program counter of target CPU
903	>	sheepshaver_cpu * const cpu = ppc_cpu;
904	>	const uint32 pc = cpu->pc();
905	>
906	>	// Fault in Mac ROM or RAM?
907	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
908	>	if (mac_fault) {
909	>
910	>	// "VM settings" during MacOS 8 installation
911	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
912	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
913	>
914	>	// MacOS 8.5 installation
915	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
916	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
917	>
918	>	// MacOS 8 serial drivers on startup
919	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 \|\| cpu->gpr(8) == 0xf3012000))
920	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
921	>
922	>	// MacOS 8.1 serial drivers on startup
923	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
924	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
925	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
926	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
927	>
928	>	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
929	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
930	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
931	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
932	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
933	>
934	>	// Ignore writes to the zero page
935	>	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
936	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
937	>
938	>	// Ignore all other faults, if requested
939	>	if (PrefsFindBool("ignoresegv"))
940	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
941	>	}
942		#else
943		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
944		#endif
#	Line 563 \| Line 946 \| static sigsegv_return_t sigsegv_handler(
946		printf("SIGSEGV\n");
947		printf(" pc %p\n", fault_instruction);
948		printf(" ea %p\n", fault_address);
566	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
949		dump_registers();
950	<	current_cpu->dump_log();
950	>	ppc_cpu->dump_log();
951		enter_mon();
952		QuitEmulator();
953
#	Line 575 \| Line 957 \| static sigsegv_return_t sigsegv_handler(
957		void init_emul_ppc(void)
958		{
959		// Initialize main CPU emulator
960	<	main_cpu = new sheepshaver_cpu();
961	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
960	>	ppc_cpu = new sheepshaver_cpu();
961	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
962	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
963		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
964
582	–	#if MULTICORE_CPU
583	–	// Initialize alternate CPU emulator to handle interrupts
584	–	interrupt_cpu = new sheepshaver_cpu();
585	–	#endif
586	–
965		// Install the handler for SIGSEGV
966		sigsegv_install_handler(sigsegv_handler);
967
#	Line 612 \| Line 990 \| void exit_emul_ppc(void)
990		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
991		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
992		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
993	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
994	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
995
996		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
997		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 628 \| Line 1008 \| void exit_emul_ppc(void)
1008		printf("\n");
1009		#endif
1010
1011	<	delete main_cpu;
632	<	#if MULTICORE_CPU
633	<	delete interrupt_cpu;
634	<	#endif
1011	>	delete ppc_cpu;
1012		}
1013
1014	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
1015	+	// Initialize EmulOp trampolines
1016	+	void init_emul_op_trampolines(basic_dyngen & dg)
1017	+	{
1018	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
1019	+	func_t func;
1020	+
1021	+	// EmulOp
1022	+	emul_op_trampoline = dg.gen_start();
1023	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
1024	+	dg.gen_invoke_CPU_T0(func);
1025	+	dg.gen_exec_return();
1026	+	dg.gen_end();
1027	+
1028	+	// NativeOp
1029	+	native_op_trampoline = dg.gen_start();
1030	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
1031	+	dg.gen_invoke_CPU_T0(func);
1032	+	dg.gen_exec_return();
1033	+	dg.gen_end();
1034	+
1035	+	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
1036	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
1037	+	}
1038	+	#endif
1039	+
1040		/*
1041		* Emulation loop
1042		*/
1043
1044		void emul_ppc(uint32 entry)
1045		{
1046	<	current_cpu = main_cpu;
1047	<	#if DEBUG
645	<	current_cpu->start_log();
1046	>	#if 0
1047	>	ppc_cpu->start_log();
1048		#endif
1049		// start emulation loop and enable code translation or caching
1050	<	current_cpu->execute(entry, true);
1050	>	ppc_cpu->execute(entry);
1051		}
1052
1053		/*
1054		* Handle PowerPC interrupt
1055		*/
1056
655	–	#if ASYNC_IRQ
656	–	void HandleInterrupt(void)
657	–	{
658	–	main_cpu->handle_interrupt();
659	–	}
660	–	#else
1057		void TriggerInterrupt(void)
1058		{
1059		#if 0
1060		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
1061		#else
1062		// Trigger interrupt to main cpu only
1063	<	if (main_cpu)
1064	<	main_cpu->trigger_interrupt();
1063	>	if (ppc_cpu)
1064	>	ppc_cpu->trigger_interrupt();
1065		#endif
1066		}
671	–	#endif
1067
1068		void sheepshaver_cpu::handle_interrupt(void)
1069		{
1070		// Do nothing if interrupts are disabled
1071	<	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
1071	>	if ((int32 )XLM_IRQ_NEST > 0)
1072		return;
1073
1074	<	// Do nothing if there is no interrupt pending
1075	<	if (InterruptFlags == 0)
1076	<	return;
1074	>	// Current interrupt nest level
1075	>	static int interrupt_depth = 0;
1076	>	++interrupt_depth;
1077	>	#if EMUL_TIME_STATS
1078	>	interrupt_count++;
1079	>	#endif
1080
1081		// Disable MacOS stack sniffer
1082		WriteMacInt32(0x110, 0);
#	Line 687 \| Line 1085 \| void sheepshaver_cpu::handle_interrupt(v
1085		switch (ReadMacInt32(XLM_RUN_MODE)) {
1086		case MODE_68K:
1087		// 68k emulator active, trigger 68k interrupt level 1
690	–	assert(current_cpu == main_cpu);
1088		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1089		set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
1090		break;
#	Line 695 \| Line 1092 \| void sheepshaver_cpu::handle_interrupt(v
1092		#if INTERRUPTS_IN_NATIVE_MODE
1093		case MODE_NATIVE:
1094		// 68k emulator inactive, in nanokernel?
1095	<	assert(current_cpu == main_cpu);
1096	<	if (gpr(1) != KernelDataAddr) {
1095	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1096	>	interrupt_context ctx(this, "PowerPC mode");
1097	>
1098		// Prepare for 68k interrupt level 1
1099		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1100		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 705 \| Line 1103 \| void sheepshaver_cpu::handle_interrupt(v
1103
1104		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1105		DisableInterrupt();
708	–	cpu_push(interrupt_cpu);
1106		if (ROMType == ROMTYPE_NEWWORLD)
1107	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
1107	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1108		else
1109	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
713	<	cpu_pop();
1109	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1110		}
1111		break;
1112		#endif
#	Line 719 \| Line 1115 \| void sheepshaver_cpu::handle_interrupt(v
1115		case MODE_EMUL_OP:
1116		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1117		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1118	+	interrupt_context ctx(this, "68k mode");
1119	+	#if EMUL_TIME_STATS
1120	+	const clock_t interrupt_start = clock();
1121	+	#endif
1122		#if 1
1123		// Execute full 68k interrupt routine
1124		M68kRegisters r;
#	Line 740 \| Line 1140 \| void sheepshaver_cpu::handle_interrupt(v
1140		if (InterruptFlags & INTFLAG_VIA) {
1141		ClearInterruptFlag(INTFLAG_VIA);
1142		ADBInterrupt();
1143	<	ExecutePPC(VideoVBL);
1143	>	ExecuteNative(NATIVE_VIDEO_VBL);
1144		}
1145		}
1146		#endif
1147	+	#if EMUL_TIME_STATS
1148	+	interrupt_time += (clock() - interrupt_start);
1149	+	#endif
1150		}
1151		break;
1152		#endif
1153		}
751	–	}
752	–
753	–	/*
754	–	* Execute NATIVE_OP opcode (called by PowerPC emulator)
755	–	*/
1154
1155	<	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
1156	<	tswap32(POWERPC_EMUL_OP \| ((LR) << 11) \| (((uint32)OP) << 6) \| 2)
1157	<
760	<	// FIXME: Make sure 32-bit relocations are used
761	<	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
762	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
763	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
764	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
765	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
766	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
767	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
768	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
769	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
770	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
771	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
772	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
773	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
774	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
775	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
776	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
777	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
778	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
779	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
780	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
781	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
782	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
783	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
784	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
785	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
786	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
787	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
788	<	};
1155	>	// We are done with this interrupt
1156	>	--interrupt_depth;
1157	>	}
1158
1159		static void get_resource(void);
1160		static void get_1_resource(void);
#	Line 793 \| Line 1162 \| static void get_ind_resource(void);
1162		static void get_1_ind_resource(void);
1163		static void r_get_resource(void);
1164
1165	<	#define GPR(REG) current_cpu->gpr(REG)
1166	<
798	<	static void NativeOp(int selector)
1165	>	// Execute NATIVE_OP routine
1166	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1167		{
1168		#if EMUL_TIME_STATS
1169		native_exec_count++;
#	Line 813 \| Line 1181 \| static void NativeOp(int selector)
1181		VideoVBL();
1182		break;
1183		case NATIVE_VIDEO_DO_DRIVER_IO:
1184	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
1185	<	(void *)GPR(5), GPR(6), GPR(7));
1184	>	gpr(3) = (int32)(int16)VideoDoDriverIO((void )gpr(3), (void )gpr(4),
1185	>	(void *)gpr(5), gpr(6), gpr(7));
1186		break;
1187	<	case NATIVE_GET_RESOURCE:
1188	<	get_resource();
1187	>	#ifdef WORDS_BIGENDIAN
1188	>	case NATIVE_ETHER_IRQ:
1189	>	EtherIRQ();
1190		break;
1191	<	case NATIVE_GET_1_RESOURCE:
1192	<	get_1_resource();
1191	>	case NATIVE_ETHER_INIT:
1192	>	gpr(3) = InitStreamModule((void *)gpr(3));
1193		break;
1194	<	case NATIVE_GET_IND_RESOURCE:
1195	<	get_ind_resource();
1194	>	case NATIVE_ETHER_TERM:
1195	>	TerminateStreamModule();
1196		break;
1197	<	case NATIVE_GET_1_IND_RESOURCE:
1198	<	get_1_ind_resource();
1197	>	case NATIVE_ETHER_OPEN:
1198	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1199	>	break;
1200	>	case NATIVE_ETHER_CLOSE:
1201	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1202	>	break;
1203	>	case NATIVE_ETHER_WPUT:
1204	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1205	>	break;
1206	>	case NATIVE_ETHER_RSRV:
1207	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1208		break;
1209	<	case NATIVE_R_GET_RESOURCE:
1210	<	r_get_resource();
1209	>	#else
1210	>	case NATIVE_ETHER_INIT:
1211	>	// FIXME: needs more complicated thunks
1212	>	gpr(3) = false;
1213	>	break;
1214	>	#endif
1215	>	case NATIVE_SYNC_HOOK:
1216	>	gpr(3) = NQD_sync_hook(gpr(3));
1217	>	break;
1218	>	case NATIVE_BITBLT_HOOK:
1219	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1220	>	break;
1221	>	case NATIVE_BITBLT:
1222	>	NQD_bitblt(gpr(3));
1223	>	break;
1224	>	case NATIVE_FILLRECT_HOOK:
1225	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1226	>	break;
1227	>	case NATIVE_INVRECT:
1228	>	NQD_invrect(gpr(3));
1229	>	break;
1230	>	case NATIVE_FILLRECT:
1231	>	NQD_fillrect(gpr(3));
1232		break;
1233		case NATIVE_SERIAL_NOTHING:
1234		case NATIVE_SERIAL_OPEN:
#	Line 848 \| Line 1247 \| static void NativeOp(int selector)
1247		SerialStatus,
1248		SerialClose
1249		};
1250	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1250	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1251	>	break;
1252	>	}
1253	>	case NATIVE_GET_RESOURCE:
1254	>	case NATIVE_GET_1_RESOURCE:
1255	>	case NATIVE_GET_IND_RESOURCE:
1256	>	case NATIVE_GET_1_IND_RESOURCE:
1257	>	case NATIVE_R_GET_RESOURCE: {
1258	>	typedef void (*GetResourceCallback)(void);
1259	>	static const GetResourceCallback get_resource_callbacks[] = {
1260	>	::get_resource,
1261	>	::get_1_resource,
1262	>	::get_ind_resource,
1263	>	::get_1_ind_resource,
1264	>	::r_get_resource
1265	>	};
1266	>	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1267		break;
1268		}
1269		case NATIVE_DISABLE_INTERRUPT:
#	Line 858 \| Line 1273 \| static void NativeOp(int selector)
1273		EnableInterrupt();
1274		break;
1275		case NATIVE_MAKE_EXECUTABLE:
1276	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1276	>	MakeExecutable(0, (void *)gpr(4), gpr(5));
1277	>	break;
1278	>	case NATIVE_CHECK_LOAD_INVOC:
1279	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1280		break;
1281		default:
1282		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 872 \| Line 1290 \| static void NativeOp(int selector)
1290		}
1291
1292		/*
875	–	* Execute native subroutine (LR must contain return address)
876	–	*/
877	–
878	–	void ExecuteNative(int selector)
879	–	{
880	–	uint32 tvect[2];
881	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
882	–	tvect[1] = 0; // Fake TVECT
883	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
884	–	M68kRegisters r;
885	–	Execute68k((uint32)&desc, &r);
886	–	}
887	–
888	–	/*
1293		* Execute 68k subroutine (must be ended with EXEC_RETURN)
1294		* This must only be called by the emul_thread when in EMUL_OP mode
1295		* r->a[7] is unused, the routine runs on the caller's stack
#	Line 893 \| Line 1297 \| void ExecuteNative(int selector)
1297
1298		void Execute68k(uint32 pc, M68kRegisters *r)
1299		{
1300	<	current_cpu->execute_68k(pc, r);
1300	>	ppc_cpu->execute_68k(pc, r);
1301		}
1302
1303		/*
#	Line 903 \| Line 1307 \| void Execute68k(uint32 pc, M68kRegisters
1307
1308		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1309		{
1310	<	uint16 proc[2];
1311	<	proc[0] = htons(trap);
1312	<	proc[1] = htons(M68K_RTS);
1313	<	Execute68k((uint32)proc, r);
1310	>	SheepVar proc_var(4);
1311	>	uint32 proc = proc_var.addr();
1312	>	WriteMacInt16(proc, trap);
1313	>	WriteMacInt16(proc + 2, M68K_RTS);
1314	>	Execute68k(proc, r);
1315		}
1316
1317		/*
#	Line 915 \| Line 1320 \| void Execute68kTrap(uint16 trap, M68kReg
1320
1321		uint32 call_macos(uint32 tvect)
1322		{
1323	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1323	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1324		}
1325
1326		uint32 call_macos1(uint32 tvect, uint32 arg1)
1327		{
1328		const uint32 args[] = { arg1 };
1329	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1329	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1330		}
1331
1332		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1333		{
1334		const uint32 args[] = { arg1, arg2 };
1335	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1335	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1336		}
1337
1338		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1339		{
1340		const uint32 args[] = { arg1, arg2, arg3 };
1341	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1341	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1342		}
1343
1344		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1345		{
1346		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1347	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1347	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1348		}
1349
1350		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1351		{
1352		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1353	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1353	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1354		}
1355
1356		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1357		{
1358		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1359	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1359	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1360		}
1361
1362		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1363		{
1364		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1365	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1365	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1366		}
1367
1368		/*
#	Line 966 \| Line 1371 \| uint32 call_macos7(uint32 tvect, uint32
1371
1372		void get_resource(void)
1373		{
1374	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1374	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1375		}
1376
1377		void get_1_resource(void)
1378		{
1379	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1379	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1380		}
1381
1382		void get_ind_resource(void)
1383		{
1384	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1384	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1385		}
1386
1387		void get_1_ind_resource(void)
1388		{
1389	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1389	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1390		}
1391
1392		void r_get_resource(void)
1393		{
1394	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1394	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1395		}

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs. Revision 1.45 by gbeauche, 2004-06-22T14:18:35Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.45 by gbeauche, 2004-06-22T14:18:35Z