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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.36 by gbeauche, 2004-05-12T15:54:23Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 30 | Line 30
30		#include "sigsegv.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41
42		#include <stdio.h>
43	+	#include <stdlib.h>
44
45		#if ENABLE_MON
46		#include "mon.h"
#	Line 70 | Line 74 | static void enter_mon(void)
74		#endif
75		}
76
77	+	// From main_*.cpp
78	+	extern uintptr SignalStackBase();
79	+
80	+	// From rsrc_patches.cpp
81	+	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
82	+
83	+	// PowerPC EmulOp to exit from emulation looop
84	+	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
85	+
86		// Enable multicore (main/interrupts) cpu emulation?
87		#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
88
89	+	// Enable interrupt routine safety checks?
90	+	#define SAFE_INTERRUPT_PPC 1
91	+
92		// Enable Execute68k() safety checks?
93		#define SAFE_EXEC_68K 1
94
#	Line 88 | Line 104 | static void enter_mon(void)
104		// Pointer to Kernel Data
105		static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
106
107	+	// SIGSEGV handler
108	+	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
109	+
110	+	// JIT Compiler enabled?
111	+	static inline bool enable_jit_p()
112	+	{
113	+	return PrefsFindBool("jit");
114	+	}
115	+
116
117		/**
118		*              PowerPC emulator glue with special 'sheep' opcodes
119		**/
120
121	+	enum {
122	+	PPC_I(SHEEP) = PPC_I(MAX),
123	+	PPC_I(SHEEP_MAX)
124	+	};
125	+
126		class sheepshaver_cpu
127		: public powerpc_cpu
128		{
#	Line 104 | Line 134 | public:
134		// Constructor
135		sheepshaver_cpu();
136
137	<	// Condition Register accessors
137	>	// CR & XER accessors
138		uint32 get_cr() const           { return cr().get(); }
139		void set_cr(uint32 v)           { cr().set(v); }
140	+	uint32 get_xer() const          { return xer().get(); }
141	+	void set_xer(uint32 v)          { xer().set(v); }
142
143	<	// Execution loop
144	<	void execute(uint32 entry, bool enable_cache = false);
143	>	// Execute EMUL_OP routine
144	>	void execute_emul_op(uint32 emul_op);
145
146		// Execute 68k routine
147		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 120 | Line 152 | public:
152		// Execute MacOS/PPC code
153		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
154
155	+	// Compile one instruction
156	+	virtual bool compile1(codegen_context_t & cg_context);
157	+
158		// Resource manager thunk
159		void get_resource(uint32 old_get_resource);
160
#	Line 127 | Line 162 | public:
162		void interrupt(uint32 entry);
163		void handle_interrupt();
164
165	<	// Lazy memory allocator (one item at a time)
166	<	void *operator new(size_t size)
132	<	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
133	<	void operator delete(void *p)
134	<	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
135	<	// FIXME: really make surre array allocation fail at link time?
136	<	void *operator new[](size_t);
137	<	void operator delete[](void *p);
165	>	// Make sure the SIGSEGV handler can access CPU registers
166	>	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
167		};
168
169	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
169	>	// Memory allocator returning areas aligned on 16-byte boundaries
170	>	void *operator new(size_t size)
171	>	{
172	>	void *p;
173	>
174	>	#if defined(HAVE_POSIX_MEMALIGN)
175	>	if (posix_memalign(&p, 16, size) != 0)
176	>	throw std::bad_alloc();
177	>	#elif defined(HAVE_MEMALIGN)
178	>	p = memalign(16, size);
179	>	#elif defined(HAVE_VALLOC)
180	>	p = valloc(size); // page-aligned!
181	>	#else
182	>	/* XXX: handle padding ourselves */
183	>	p = malloc(size);
184	>	#endif
185	>
186	>	return p;
187	>	}
188	>
189	>	void operator delete(void *p)
190	>	{
191	>	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
192	>	#if defined(__GLIBC__)
193	>	// this is known to work only with GNU libc
194	>	free(p);
195	>	#endif
196	>	#else
197	>	free(p);
198	>	#endif
199	>	}
200
201		sheepshaver_cpu::sheepshaver_cpu()
202	<	: powerpc_cpu()
202	>	: powerpc_cpu(enable_jit_p())
203		{
204		init_decoder();
205		}
206
207		void sheepshaver_cpu::init_decoder()
208		{
150	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
151	–	static bool initialized = false;
152	–	if (initialized)
153	–	return;
154	–	initialized = true;
155	–	#endif
156	–
209		static const instr_info_t sheep_ii_table[] = {
210		{ "sheep",
211		(execute_pmf)&sheepshaver_cpu::execute_sheep,
212		NULL,
213	+	PPC_I(SHEEP),
214		D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
215		}
216		};
#	Line 175 | Line 228 | void sheepshaver_cpu::init_decoder()
228		static void NativeOp(int selector);
229
230		/*              NativeOp instruction format:
231	<	+------------+--------------------------+--+----------+------------+
232	<	|      6     |                          |FN|    OP    |      2     |
233	<	+------------+--------------------------+--+----------+------------+
234	<	0         5 |6                       19 20 21      25 26        31
231	>	+------------+-------------------------+--+-----------+------------+
232	>	|      6     |                         |FN|    OP     |      2     |
233	>	+------------+-------------------------+--+-----------+------------+
234	>	0         5 |6                      18 19 20      25 26        31
235		*/
236
237	<	typedef bit_field< 20, 20 > FN_field;
238	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
237	>	typedef bit_field< 19, 19 > FN_field;
238	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
239		typedef bit_field< 26, 31 > EMUL_OP_field;
240
241	+	// Execute EMUL_OP routine
242	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
243	+	{
244	+	M68kRegisters r68;
245	+	WriteMacInt32(XLM_68K_R25, gpr(25));
246	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
247	+	for (int i = 0; i < 8; i++)
248	+	r68.d[i] = gpr(8 + i);
249	+	for (int i = 0; i < 7; i++)
250	+	r68.a[i] = gpr(16 + i);
251	+	r68.a[7] = gpr(1);
252	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
253	+	uint32 saved_xer = get_xer();
254	+	EmulOp(&r68, gpr(24), emul_op);
255	+	set_cr(saved_cr);
256	+	set_xer(saved_xer);
257	+	for (int i = 0; i < 8; i++)
258	+	gpr(8 + i) = r68.d[i];
259	+	for (int i = 0; i < 7; i++)
260	+	gpr(16 + i) = r68.a[i];
261	+	gpr(1) = r68.a[7];
262	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
263	+	}
264	+
265		// Execute SheepShaver instruction
266		void sheepshaver_cpu::execute_sheep(uint32 opcode)
267		{
#	Line 208 | Line 285 | void sheepshaver_cpu::execute_sheep(uint
285		pc() += 4;
286		break;
287
288	<	default: {      // EMUL_OP
289	<	M68kRegisters r68;
213	<	WriteMacInt32(XLM_68K_R25, gpr(25));
214	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
215	<	for (int i = 0; i < 8; i++)
216	<	r68.d[i] = gpr(8 + i);
217	<	for (int i = 0; i < 7; i++)
218	<	r68.a[i] = gpr(16 + i);
219	<	r68.a[7] = gpr(1);
220	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
221	<	for (int i = 0; i < 8; i++)
222	<	gpr(8 + i) = r68.d[i];
223	<	for (int i = 0; i < 7; i++)
224	<	gpr(16 + i) = r68.a[i];
225	<	gpr(1) = r68.a[7];
226	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
288	>	default:        // EMUL_OP
289	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
290		pc() += 4;
291		break;
292		}
230	–	}
293		}
294
295	<	// Execution loop
296	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
295	>	// Compile one instruction
296	>	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
297		{
298	<	powerpc_cpu::execute(entry, enable_cache);
298	>	#if PPC_ENABLE_JIT
299	>	const instr_info_t *ii = cg_context.instr_info;
300	>	if (ii->mnemo != PPC_I(SHEEP))
301	>	return false;
302	>
303	>	bool compiled = false;
304	>	powerpc_dyngen & dg = cg_context.codegen;
305	>	uint32 opcode = cg_context.opcode;
306	>
307	>	switch (opcode & 0x3f) {
308	>	case 0:         // EMUL_RETURN
309	>	dg.gen_invoke(QuitEmulator);
310	>	compiled = true;
311	>	break;
312	>
313	>	case 1:         // EXEC_RETURN
314	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
315	>	compiled = true;
316	>	break;
317	>
318	>	case 2: {       // EXEC_NATIVE
319	>	uint32 selector = NATIVE_OP_field::extract(opcode);
320	>	switch (selector) {
321	>	case NATIVE_PATCH_NAME_REGISTRY:
322	>	dg.gen_invoke(DoPatchNameRegistry);
323	>	compiled = true;
324	>	break;
325	>	case NATIVE_VIDEO_INSTALL_ACCEL:
326	>	dg.gen_invoke(VideoInstallAccel);
327	>	compiled = true;
328	>	break;
329	>	case NATIVE_VIDEO_VBL:
330	>	dg.gen_invoke(VideoVBL);
331	>	compiled = true;
332	>	break;
333	>	case NATIVE_GET_RESOURCE:
334	>	case NATIVE_GET_1_RESOURCE:
335	>	case NATIVE_GET_IND_RESOURCE:
336	>	case NATIVE_GET_1_IND_RESOURCE:
337	>	case NATIVE_R_GET_RESOURCE: {
338	>	static const uint32 get_resource_ptr[] = {
339	>	XLM_GET_RESOURCE,
340	>	XLM_GET_1_RESOURCE,
341	>	XLM_GET_IND_RESOURCE,
342	>	XLM_GET_1_IND_RESOURCE,
343	>	XLM_R_GET_RESOURCE
344	>	};
345	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
346	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
347	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
348	>	dg.gen_invoke_CPU_im(func, old_get_resource);
349	>	compiled = true;
350	>	break;
351	>	}
352	>	case NATIVE_DISABLE_INTERRUPT:
353	>	dg.gen_invoke(DisableInterrupt);
354	>	compiled = true;
355	>	break;
356	>	case NATIVE_ENABLE_INTERRUPT:
357	>	dg.gen_invoke(EnableInterrupt);
358	>	compiled = true;
359	>	break;
360	>	case NATIVE_CHECK_LOAD_INVOC:
361	>	dg.gen_load_T0_GPR(3);
362	>	dg.gen_load_T1_GPR(4);
363	>	dg.gen_se_16_32_T1();
364	>	dg.gen_load_T2_GPR(5);
365	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
366	>	compiled = true;
367	>	break;
368	>	case NATIVE_BITBLT:
369	>	dg.gen_load_T0_GPR(3);
370	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
371	>	compiled = true;
372	>	break;
373	>	case NATIVE_INVRECT:
374	>	dg.gen_load_T0_GPR(3);
375	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
376	>	compiled = true;
377	>	break;
378	>	case NATIVE_FILLRECT:
379	>	dg.gen_load_T0_GPR(3);
380	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
381	>	compiled = true;
382	>	break;
383	>	}
384	>	if (FN_field::test(opcode)) {
385	>	if (compiled) {
386	>	dg.gen_load_A0_LR();
387	>	dg.gen_set_PC_A0();
388	>	}
389	>	cg_context.done_compile = true;
390	>	}
391	>	else
392	>	cg_context.done_compile = false;
393	>	break;
394	>	}
395	>
396	>	default: {      // EMUL_OP
397	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
398	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
399	>	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
400	>	cg_context.done_compile = false;
401	>	compiled = true;
402	>	break;
403	>	}
404	>	}
405	>	return compiled;
406	>	#endif
407	>	return false;
408		}
409
410		// Handle MacOS interrupt
#	Line 244 | Line 415 | void sheepshaver_cpu::interrupt(uint32 e
415		const clock_t interrupt_start = clock();
416		#endif
417
418	+	#if SAFE_INTERRUPT_PPC
419	+	static int depth = 0;
420	+	if (depth != 0)
421	+	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
422	+	depth++;
423	+	#endif
424	+	#if SAFE_INTERRUPT_PPC >= 2
425	+	uint32 saved_regs[32];
426	+	memcpy(&saved_regs[0], &gpr(0), sizeof(saved_regs));
427	+	#endif
428	+
429		#if !MULTICORE_CPU
430		// Save program counters and branch registers
431		uint32 saved_pc = pc();
#	Line 253 | Line 435 | void sheepshaver_cpu::interrupt(uint32 e
435		#endif
436
437		// Initialize stack pointer to SheepShaver alternate stack base
438	<	gpr(1) = SheepStack1Base - 64;
438	>	gpr(1) = SignalStackBase() - 64;
439
440		// Build trampoline to return from interrupt
441	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
441	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
442
443		// Prepare registers for nanokernel interrupt routine
444		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 275 | Line 457 | void sheepshaver_cpu::interrupt(uint32 e
457		gpr(1)  = KernelDataAddr;
458		gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
459		gpr(8)  = 0;
460	<	gpr(10) = (uint32)trampoline;
461	<	gpr(12) = (uint32)trampoline;
460	>	gpr(10) = trampoline.addr();
461	>	gpr(12) = trampoline.addr();
462		gpr(13) = get_cr();
463
464		// rlwimi. r7,r7,8,0,0
#	Line 301 | Line 483 | void sheepshaver_cpu::interrupt(uint32 e
483		#if EMUL_TIME_STATS
484		interrupt_time += (clock() - interrupt_start);
485		#endif
486	+
487	+	#if SAFE_INTERRUPT_PPC >= 2
488	+	if (memcmp(&saved_regs[0], &gpr(0), sizeof(saved_regs)) != 0)
489	+	printf("FATAL: dirty PowerPC registers\n");
490	+	#endif
491	+	#if SAFE_INTERRUPT_PPC
492	+	depth--;
493	+	#endif
494		}
495
496		// Execute 68k routine
#	Line 413 | Line 603 | uint32 sheepshaver_cpu::execute_macos_co
603		uint32 saved_ctr= ctr();
604
605		// Build trampoline with EXEC_RETURN
606	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
607	<	lr() = (uint32)trampoline;
606	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
607	>	lr() = trampoline.addr();
608
609		gpr(1) -= 64;                                                           // Create stack frame
610		uint32 proc = ReadMacInt32(tvect);                      // Get routine address
#	Line 458 | Line 648 | inline void sheepshaver_cpu::execute_ppc
648		// Save branch registers
649		uint32 saved_lr = lr();
650
651	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
652	<	lr() = (uint32)trampoline;
651	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
652	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
653	>	lr() = trampoline.addr();
654
655		execute(entry);
656
#	Line 468 | Line 659 | inline void sheepshaver_cpu::execute_ppc
659		}
660
661		// Resource Manager thunk
471	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
472	–
662		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
663		{
664		uint32 type = gpr(3);
#	Line 553 | Line 742 | static sigsegv_return_t sigsegv_handler(
742		if ((addr - ROM_BASE) < ROM_SIZE)
743		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
744
745	<	// Ignore all other faults, if requested
746	<	if (PrefsFindBool("ignoresegv"))
747	<	return SIGSEGV_RETURN_FAILURE;
745	>	// Get program counter of target CPU
746	>	sheepshaver_cpu * const cpu = current_cpu;
747	>	const uint32 pc = cpu->pc();
748	>
749	>	// Fault in Mac ROM or RAM?
750	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
751	>	if (mac_fault) {
752	>
753	>	// "VM settings" during MacOS 8 installation
754	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
755	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
756	>
757	>	// MacOS 8.5 installation
758	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
759	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
760	>
761	>	// MacOS 8 serial drivers on startup
762	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
763	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
764	>
765	>	// MacOS 8.1 serial drivers on startup
766	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
767	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
768	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
769	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
770	>
771	>	// Ignore writes to the zero page
772	>	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
773	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
774	>
775	>	// Ignore all other faults, if requested
776	>	if (PrefsFindBool("ignoresegv"))
777	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
778	>	}
779		#else
780		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
781		#endif
#	Line 577 | Line 797 | void init_emul_ppc(void)
797		// Initialize main CPU emulator
798		main_cpu = new sheepshaver_cpu();
799		main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
800	+	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
801		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
802
803		#if MULTICORE_CPU
#	Line 641 | Line 862 | void exit_emul_ppc(void)
862		void emul_ppc(uint32 entry)
863		{
864		current_cpu = main_cpu;
865	<	#if DEBUG
865	>	#if 0
866		current_cpu->start_log();
867		#endif
868		// start emulation loop and enable code translation or caching
869	<	current_cpu->execute(entry, true);
869	>	current_cpu->execute(entry);
870		}
871
872		/*
#	Line 673 | Line 894 | void TriggerInterrupt(void)
894		void sheepshaver_cpu::handle_interrupt(void)
895		{
896		// Do nothing if interrupts are disabled
897	<	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
897	>	if (*(int32 *)XLM_IRQ_NEST > 0)
898		return;
899
900		// Do nothing if there is no interrupt pending
#	Line 740 | Line 961 | void sheepshaver_cpu::handle_interrupt(v
961		if (InterruptFlags & INTFLAG_VIA) {
962		ClearInterruptFlag(INTFLAG_VIA);
963		ADBInterrupt();
964	<	ExecutePPC(VideoVBL);
964	>	ExecuteNative(NATIVE_VIDEO_VBL);
965		}
966		}
967		#endif
#	Line 750 | Line 971 | void sheepshaver_cpu::handle_interrupt(v
971		}
972		}
973
753	–	/*
754	–	*  Execute NATIVE_OP opcode (called by PowerPC emulator)
755	–	*/
756	–
757	–	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
758	–	tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
759	–
760	–	// FIXME: Make sure 32-bit relocations are used
761	–	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
762	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
763	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
764	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
765	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
766	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
767	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
768	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
769	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
770	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
771	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
772	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
773	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
774	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
775	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
776	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
777	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
778	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
779	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
780	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
781	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
782	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
783	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
784	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
785	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
786	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
787	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
788	–	};
789	–
974		static void get_resource(void);
975		static void get_1_resource(void);
976		static void get_ind_resource(void);
#	Line 816 | Line 1000 | static void NativeOp(int selector)
1000		GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
1001		(void *)GPR(5), GPR(6), GPR(7));
1002		break;
1003	<	case NATIVE_GET_RESOURCE:
1004	<	get_resource();
1003	>	#ifdef WORDS_BIGENDIAN
1004	>	case NATIVE_ETHER_IRQ:
1005	>	EtherIRQ();
1006		break;
1007	<	case NATIVE_GET_1_RESOURCE:
1008	<	get_1_resource();
1007	>	case NATIVE_ETHER_INIT:
1008	>	GPR(3) = InitStreamModule((void *)GPR(3));
1009		break;
1010	<	case NATIVE_GET_IND_RESOURCE:
1011	<	get_ind_resource();
1010	>	case NATIVE_ETHER_TERM:
1011	>	TerminateStreamModule();
1012		break;
1013	<	case NATIVE_GET_1_IND_RESOURCE:
1014	<	get_1_ind_resource();
1013	>	case NATIVE_ETHER_OPEN:
1014	>	GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1015	>	break;
1016	>	case NATIVE_ETHER_CLOSE:
1017	>	GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5));
1018	>	break;
1019	>	case NATIVE_ETHER_WPUT:
1020	>	GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4));
1021	>	break;
1022	>	case NATIVE_ETHER_RSRV:
1023	>	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1024		break;
1025	<	case NATIVE_R_GET_RESOURCE:
1026	<	r_get_resource();
1025	>	#else
1026	>	case NATIVE_ETHER_INIT:
1027	>	// FIXME: needs more complicated thunks
1028	>	GPR(3) = false;
1029	>	break;
1030	>	#endif
1031	>	case NATIVE_SYNC_HOOK:
1032	>	GPR(3) = NQD_sync_hook(GPR(3));
1033	>	break;
1034	>	case NATIVE_BITBLT_HOOK:
1035	>	GPR(3) = NQD_bitblt_hook(GPR(3));
1036	>	break;
1037	>	case NATIVE_BITBLT:
1038	>	NQD_bitblt(GPR(3));
1039	>	break;
1040	>	case NATIVE_FILLRECT_HOOK:
1041	>	GPR(3) = NQD_fillrect_hook(GPR(3));
1042	>	break;
1043	>	case NATIVE_INVRECT:
1044	>	NQD_invrect(GPR(3));
1045	>	break;
1046	>	case NATIVE_FILLRECT:
1047	>	NQD_fillrect(GPR(3));
1048		break;
1049		case NATIVE_SERIAL_NOTHING:
1050		case NATIVE_SERIAL_OPEN:
#	Line 851 | Line 1066 | static void NativeOp(int selector)
1066		GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1067		break;
1068		}
1069	+	case NATIVE_GET_RESOURCE:
1070	+	case NATIVE_GET_1_RESOURCE:
1071	+	case NATIVE_GET_IND_RESOURCE:
1072	+	case NATIVE_GET_1_IND_RESOURCE:
1073	+	case NATIVE_R_GET_RESOURCE: {
1074	+	typedef void (*GetResourceCallback)(void);
1075	+	static const GetResourceCallback get_resource_callbacks[] = {
1076	+	get_resource,
1077	+	get_1_resource,
1078	+	get_ind_resource,
1079	+	get_1_ind_resource,
1080	+	r_get_resource
1081	+	};
1082	+	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1083	+	break;
1084	+	}
1085		case NATIVE_DISABLE_INTERRUPT:
1086		DisableInterrupt();
1087		break;
#	Line 860 | Line 1091 | static void NativeOp(int selector)
1091		case NATIVE_MAKE_EXECUTABLE:
1092		MakeExecutable(0, (void *)GPR(4), GPR(5));
1093		break;
1094	+	case NATIVE_CHECK_LOAD_INVOC:
1095	+	check_load_invoc(GPR(3), GPR(4), GPR(5));
1096	+	break;
1097		default:
1098		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1099		QuitEmulator();
#	Line 872 | Line 1106 | static void NativeOp(int selector)
1106		}
1107
1108		/*
875	–	*  Execute native subroutine (LR must contain return address)
876	–	*/
877	–
878	–	void ExecuteNative(int selector)
879	–	{
880	–	uint32 tvect[2];
881	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
882	–	tvect[1] = 0; // Fake TVECT
883	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
884	–	M68kRegisters r;
885	–	Execute68k((uint32)&desc, &r);
886	–	}
887	–
888	–	/*
1109		*  Execute 68k subroutine (must be ended with EXEC_RETURN)
1110		*  This must only be called by the emul_thread when in EMUL_OP mode
1111		*  r->a[7] is unused, the routine runs on the caller's stack
#	Line 903 | Line 1123 | void Execute68k(uint32 pc, M68kRegisters
1123
1124		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1125		{
1126	<	uint16 proc[2];
1127	<	proc[0] = htons(trap);
1128	<	proc[1] = htons(M68K_RTS);
1129	<	Execute68k((uint32)proc, r);
1126	>	SheepVar proc_var(4);
1127	>	uint32 proc = proc_var.addr();
1128	>	WriteMacInt16(proc, trap);
1129	>	WriteMacInt16(proc + 2, M68K_RTS);
1130	>	Execute68k(proc, r);
1131		}
1132
1133		/*

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