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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.27 by gbeauche, 2004-02-15T17:17:36Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 30 | Line 30
30		#include "sigsegv.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41
42		#include <stdio.h>
43
#	Line 70 | Line 73 | static void enter_mon(void)
73		#endif
74		}
75
76	+	// From main_*.cpp
77	+	extern uintptr SignalStackBase();
78	+
79	+	// From rsrc_patches.cpp
80	+	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
81	+
82	+	// PowerPC EmulOp to exit from emulation looop
83	+	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
84	+
85		// Enable multicore (main/interrupts) cpu emulation?
86		#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87
#	Line 88 | Line 100 | static void enter_mon(void)
100		// Pointer to Kernel Data
101		static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
102
103	+	// SIGSEGV handler
104	+	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
105	+
106	+	// JIT Compiler enabled?
107	+	static inline bool enable_jit_p()
108	+	{
109	+	return PrefsFindBool("jit");
110	+	}
111	+
112
113		/**
114		*              PowerPC emulator glue with special 'sheep' opcodes
115		**/
116
117	+	enum {
118	+	PPC_I(SHEEP) = PPC_I(MAX),
119	+	PPC_I(SHEEP_MAX)
120	+	};
121	+
122		class sheepshaver_cpu
123		: public powerpc_cpu
124		{
#	Line 104 | Line 130 | public:
130		// Constructor
131		sheepshaver_cpu();
132
133	<	// Condition Register accessors
133	>	// CR & XER accessors
134		uint32 get_cr() const           { return cr().get(); }
135		void set_cr(uint32 v)           { cr().set(v); }
136	+	uint32 get_xer() const          { return xer().get(); }
137	+	void set_xer(uint32 v)          { xer().set(v); }
138
139	<	// Execution loop
140	<	void execute(uint32 entry, bool enable_cache = false);
139	>	// Execute EMUL_OP routine
140	>	void execute_emul_op(uint32 emul_op);
141
142		// Execute 68k routine
143		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 120 | Line 148 | public:
148		// Execute MacOS/PPC code
149		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
150
151	+	// Compile one instruction
152	+	virtual bool compile1(codegen_context_t & cg_context);
153	+
154		// Resource manager thunk
155		void get_resource(uint32 old_get_resource);
156
#	Line 135 | Line 166 | public:
166		// FIXME: really make surre array allocation fail at link time?
167		void *operator new[](size_t);
168		void operator delete[](void *p);
169	+
170	+	// Make sure the SIGSEGV handler can access CPU registers
171	+	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
172		};
173
174		lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
175
176		sheepshaver_cpu::sheepshaver_cpu()
177	<	: powerpc_cpu()
177	>	: powerpc_cpu(enable_jit_p())
178		{
179		init_decoder();
180		}
181
182		void sheepshaver_cpu::init_decoder()
183		{
150	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
151	–	static bool initialized = false;
152	–	if (initialized)
153	–	return;
154	–	initialized = true;
155	–	#endif
156	–
184		static const instr_info_t sheep_ii_table[] = {
185		{ "sheep",
186		(execute_pmf)&sheepshaver_cpu::execute_sheep,
187		NULL,
188	+	PPC_I(SHEEP),
189		D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
190		}
191		};
#	Line 185 | Line 213 | typedef bit_field< 20, 20 > FN_field;
213		typedef bit_field< 21, 25 > NATIVE_OP_field;
214		typedef bit_field< 26, 31 > EMUL_OP_field;
215
216	+	// Execute EMUL_OP routine
217	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
218	+	{
219	+	M68kRegisters r68;
220	+	WriteMacInt32(XLM_68K_R25, gpr(25));
221	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
222	+	for (int i = 0; i < 8; i++)
223	+	r68.d[i] = gpr(8 + i);
224	+	for (int i = 0; i < 7; i++)
225	+	r68.a[i] = gpr(16 + i);
226	+	r68.a[7] = gpr(1);
227	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
228	+	uint32 saved_xer = get_xer();
229	+	EmulOp(&r68, gpr(24), emul_op);
230	+	set_cr(saved_cr);
231	+	set_xer(saved_xer);
232	+	for (int i = 0; i < 8; i++)
233	+	gpr(8 + i) = r68.d[i];
234	+	for (int i = 0; i < 7; i++)
235	+	gpr(16 + i) = r68.a[i];
236	+	gpr(1) = r68.a[7];
237	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
238	+	}
239	+
240		// Execute SheepShaver instruction
241		void sheepshaver_cpu::execute_sheep(uint32 opcode)
242		{
#	Line 208 | Line 260 | void sheepshaver_cpu::execute_sheep(uint
260		pc() += 4;
261		break;
262
263	<	default: {      // EMUL_OP
264	<	M68kRegisters r68;
213	<	WriteMacInt32(XLM_68K_R25, gpr(25));
214	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
215	<	for (int i = 0; i < 8; i++)
216	<	r68.d[i] = gpr(8 + i);
217	<	for (int i = 0; i < 7; i++)
218	<	r68.a[i] = gpr(16 + i);
219	<	r68.a[7] = gpr(1);
220	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
221	<	for (int i = 0; i < 8; i++)
222	<	gpr(8 + i) = r68.d[i];
223	<	for (int i = 0; i < 7; i++)
224	<	gpr(16 + i) = r68.a[i];
225	<	gpr(1) = r68.a[7];
226	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
263	>	default:        // EMUL_OP
264	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
265		pc() += 4;
266		break;
267		}
230	–	}
268		}
269
270	<	// Execution loop
271	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
270	>	// Compile one instruction
271	>	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
272		{
273	<	powerpc_cpu::execute(entry, enable_cache);
273	>	#if PPC_ENABLE_JIT
274	>	const instr_info_t *ii = cg_context.instr_info;
275	>	if (ii->mnemo != PPC_I(SHEEP))
276	>	return false;
277	>
278	>	bool compiled = false;
279	>	powerpc_dyngen & dg = cg_context.codegen;
280	>	uint32 opcode = cg_context.opcode;
281	>
282	>	switch (opcode & 0x3f) {
283	>	case 0:         // EMUL_RETURN
284	>	dg.gen_invoke(QuitEmulator);
285	>	compiled = true;
286	>	break;
287	>
288	>	case 1:         // EXEC_RETURN
289	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
290	>	compiled = true;
291	>	break;
292	>
293	>	case 2: {       // EXEC_NATIVE
294	>	uint32 selector = NATIVE_OP_field::extract(opcode);
295	>	switch (selector) {
296	>	case NATIVE_PATCH_NAME_REGISTRY:
297	>	dg.gen_invoke(DoPatchNameRegistry);
298	>	compiled = true;
299	>	break;
300	>	case NATIVE_VIDEO_INSTALL_ACCEL:
301	>	dg.gen_invoke(VideoInstallAccel);
302	>	compiled = true;
303	>	break;
304	>	case NATIVE_VIDEO_VBL:
305	>	dg.gen_invoke(VideoVBL);
306	>	compiled = true;
307	>	break;
308	>	case NATIVE_GET_RESOURCE:
309	>	case NATIVE_GET_1_RESOURCE:
310	>	case NATIVE_GET_IND_RESOURCE:
311	>	case NATIVE_GET_1_IND_RESOURCE:
312	>	case NATIVE_R_GET_RESOURCE: {
313	>	static const uint32 get_resource_ptr[] = {
314	>	XLM_GET_RESOURCE,
315	>	XLM_GET_1_RESOURCE,
316	>	XLM_GET_IND_RESOURCE,
317	>	XLM_GET_1_IND_RESOURCE,
318	>	XLM_R_GET_RESOURCE
319	>	};
320	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
321	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
322	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
323	>	dg.gen_invoke_CPU_im(func, old_get_resource);
324	>	compiled = true;
325	>	break;
326	>	}
327	>	case NATIVE_DISABLE_INTERRUPT:
328	>	dg.gen_invoke(DisableInterrupt);
329	>	compiled = true;
330	>	break;
331	>	case NATIVE_ENABLE_INTERRUPT:
332	>	dg.gen_invoke(EnableInterrupt);
333	>	compiled = true;
334	>	break;
335	>	case NATIVE_CHECK_LOAD_INVOC:
336	>	dg.gen_load_T0_GPR(3);
337	>	dg.gen_load_T1_GPR(4);
338	>	dg.gen_se_16_32_T1();
339	>	dg.gen_load_T2_GPR(5);
340	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
341	>	compiled = true;
342	>	break;
343	>	}
344	>	if (FN_field::test(opcode)) {
345	>	if (compiled) {
346	>	dg.gen_load_A0_LR();
347	>	dg.gen_set_PC_A0();
348	>	}
349	>	cg_context.done_compile = true;
350	>	}
351	>	else
352	>	cg_context.done_compile = false;
353	>	break;
354	>	}
355	>
356	>	default: {      // EMUL_OP
357	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
358	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
359	>	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
360	>	cg_context.done_compile = false;
361	>	compiled = true;
362	>	break;
363	>	}
364	>	}
365	>	return compiled;
366	>	#endif
367	>	return false;
368		}
369
370		// Handle MacOS interrupt
#	Line 253 | Line 384 | void sheepshaver_cpu::interrupt(uint32 e
384		#endif
385
386		// Initialize stack pointer to SheepShaver alternate stack base
387	<	gpr(1) = SheepStack1Base - 64;
387	>	gpr(1) = SignalStackBase() - 64;
388
389		// Build trampoline to return from interrupt
390	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
390	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
391
392		// Prepare registers for nanokernel interrupt routine
393		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 275 | Line 406 | void sheepshaver_cpu::interrupt(uint32 e
406		gpr(1)  = KernelDataAddr;
407		gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
408		gpr(8)  = 0;
409	<	gpr(10) = (uint32)trampoline;
410	<	gpr(12) = (uint32)trampoline;
409	>	gpr(10) = trampoline.addr();
410	>	gpr(12) = trampoline.addr();
411		gpr(13) = get_cr();
412
413		// rlwimi. r7,r7,8,0,0
#	Line 413 | Line 544 | uint32 sheepshaver_cpu::execute_macos_co
544		uint32 saved_ctr= ctr();
545
546		// Build trampoline with EXEC_RETURN
547	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
548	<	lr() = (uint32)trampoline;
547	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
548	>	lr() = trampoline.addr();
549
550		gpr(1) -= 64;                                                           // Create stack frame
551		uint32 proc = ReadMacInt32(tvect);                      // Get routine address
#	Line 458 | Line 589 | inline void sheepshaver_cpu::execute_ppc
589		// Save branch registers
590		uint32 saved_lr = lr();
591
592	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
593	<	lr() = (uint32)trampoline;
592	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
593	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
594	>	lr() = trampoline.addr();
595
596		execute(entry);
597
#	Line 468 | Line 600 | inline void sheepshaver_cpu::execute_ppc
600		}
601
602		// Resource Manager thunk
471	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
472	–
603		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
604		{
605		uint32 type = gpr(3);
#	Line 553 | Line 683 | static sigsegv_return_t sigsegv_handler(
683		if ((addr - ROM_BASE) < ROM_SIZE)
684		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
685
686	<	// Ignore all other faults, if requested
687	<	if (PrefsFindBool("ignoresegv"))
688	<	return SIGSEGV_RETURN_FAILURE;
686	>	// Get program counter of target CPU
687	>	sheepshaver_cpu * const cpu = current_cpu;
688	>	const uint32 pc = cpu->pc();
689	>
690	>	// Fault in Mac ROM or RAM?
691	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
692	>	if (mac_fault) {
693	>
694	>	// "VM settings" during MacOS 8 installation
695	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
696	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
697	>
698	>	// MacOS 8.5 installation
699	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
700	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
701	>
702	>	// MacOS 8 serial drivers on startup
703	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
704	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
705	>
706	>	// MacOS 8.1 serial drivers on startup
707	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
708	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
709	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
710	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
711	>
712	>	// Ignore all other faults, if requested
713	>	if (PrefsFindBool("ignoresegv"))
714	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
715	>	}
716		#else
717		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
718		#endif
#	Line 577 | Line 734 | void init_emul_ppc(void)
734		// Initialize main CPU emulator
735		main_cpu = new sheepshaver_cpu();
736		main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
737	+	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
738		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
739
740		#if MULTICORE_CPU
#	Line 641 | Line 799 | void exit_emul_ppc(void)
799		void emul_ppc(uint32 entry)
800		{
801		current_cpu = main_cpu;
802	<	#if DEBUG
802	>	#if 0
803		current_cpu->start_log();
804		#endif
805		// start emulation loop and enable code translation or caching
806	<	current_cpu->execute(entry, true);
806	>	current_cpu->execute(entry);
807		}
808
809		/*
#	Line 673 | Line 831 | void TriggerInterrupt(void)
831		void sheepshaver_cpu::handle_interrupt(void)
832		{
833		// Do nothing if interrupts are disabled
834	<	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
834	>	if (*(int32 *)XLM_IRQ_NEST > 0)
835		return;
836
837		// Do nothing if there is no interrupt pending
#	Line 740 | Line 898 | void sheepshaver_cpu::handle_interrupt(v
898		if (InterruptFlags & INTFLAG_VIA) {
899		ClearInterruptFlag(INTFLAG_VIA);
900		ADBInterrupt();
901	<	ExecutePPC(VideoVBL);
901	>	ExecuteNative(NATIVE_VIDEO_VBL);
902		}
903		}
904		#endif
#	Line 750 | Line 908 | void sheepshaver_cpu::handle_interrupt(v
908		}
909		}
910
753	–	/*
754	–	*  Execute NATIVE_OP opcode (called by PowerPC emulator)
755	–	*/
756	–
757	–	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
758	–	tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
759	–
760	–	// FIXME: Make sure 32-bit relocations are used
761	–	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
762	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
763	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
764	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
765	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
766	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
767	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
768	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
769	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
770	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
771	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
772	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
773	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
774	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
775	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
776	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
777	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
778	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
779	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
780	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
781	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
782	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
783	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
784	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
785	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
786	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
787	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
788	–	};
789	–
911		static void get_resource(void);
912		static void get_1_resource(void);
913		static void get_ind_resource(void);
#	Line 816 | Line 937 | static void NativeOp(int selector)
937		GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
938		(void *)GPR(5), GPR(6), GPR(7));
939		break;
940	<	case NATIVE_GET_RESOURCE:
941	<	get_resource();
940	>	#ifdef WORDS_BIGENDIAN
941	>	case NATIVE_ETHER_IRQ:
942	>	EtherIRQ();
943		break;
944	<	case NATIVE_GET_1_RESOURCE:
945	<	get_1_resource();
944	>	case NATIVE_ETHER_INIT:
945	>	GPR(3) = InitStreamModule((void *)GPR(3));
946		break;
947	<	case NATIVE_GET_IND_RESOURCE:
948	<	get_ind_resource();
947	>	case NATIVE_ETHER_TERM:
948	>	TerminateStreamModule();
949		break;
950	<	case NATIVE_GET_1_IND_RESOURCE:
951	<	get_1_ind_resource();
950	>	case NATIVE_ETHER_OPEN:
951	>	GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7));
952	>	break;
953	>	case NATIVE_ETHER_CLOSE:
954	>	GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5));
955	>	break;
956	>	case NATIVE_ETHER_WPUT:
957	>	GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4));
958		break;
959	<	case NATIVE_R_GET_RESOURCE:
960	<	r_get_resource();
959	>	case NATIVE_ETHER_RSRV:
960	>	GPR(3) = ether_rsrv((queue_t *)GPR(3));
961	>	break;
962	>	#else
963	>	case NATIVE_ETHER_INIT:
964	>	// FIXME: needs more complicated thunks
965	>	GPR(3) = false;
966		break;
967	+	#endif
968		case NATIVE_SERIAL_NOTHING:
969		case NATIVE_SERIAL_OPEN:
970		case NATIVE_SERIAL_PRIME_IN:
#	Line 851 | Line 985 | static void NativeOp(int selector)
985		GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
986		break;
987		}
988	+	case NATIVE_GET_RESOURCE:
989	+	case NATIVE_GET_1_RESOURCE:
990	+	case NATIVE_GET_IND_RESOURCE:
991	+	case NATIVE_GET_1_IND_RESOURCE:
992	+	case NATIVE_R_GET_RESOURCE: {
993	+	typedef void (*GetResourceCallback)(void);
994	+	static const GetResourceCallback get_resource_callbacks[] = {
995	+	get_resource,
996	+	get_1_resource,
997	+	get_ind_resource,
998	+	get_1_ind_resource,
999	+	r_get_resource
1000	+	};
1001	+	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1002	+	break;
1003	+	}
1004		case NATIVE_DISABLE_INTERRUPT:
1005		DisableInterrupt();
1006		break;
#	Line 860 | Line 1010 | static void NativeOp(int selector)
1010		case NATIVE_MAKE_EXECUTABLE:
1011		MakeExecutable(0, (void *)GPR(4), GPR(5));
1012		break;
1013	+	case NATIVE_CHECK_LOAD_INVOC:
1014	+	check_load_invoc(GPR(3), GPR(4), GPR(5));
1015	+	break;
1016		default:
1017		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1018		QuitEmulator();
#	Line 872 | Line 1025 | static void NativeOp(int selector)
1025		}
1026
1027		/*
875	–	*  Execute native subroutine (LR must contain return address)
876	–	*/
877	–
878	–	void ExecuteNative(int selector)
879	–	{
880	–	uint32 tvect[2];
881	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
882	–	tvect[1] = 0; // Fake TVECT
883	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
884	–	M68kRegisters r;
885	–	Execute68k((uint32)&desc, &r);
886	–	}
887	–
888	–	/*
1028		*  Execute 68k subroutine (must be ended with EXEC_RETURN)
1029		*  This must only be called by the emul_thread when in EMUL_OP mode
1030		*  r->a[7] is unused, the routine runs on the caller's stack
#	Line 903 | Line 1042 | void Execute68k(uint32 pc, M68kRegisters
1042
1043		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1044		{
1045	<	uint16 proc[2];
1046	<	proc[0] = htons(trap);
1047	<	proc[1] = htons(M68K_RTS);
1048	<	Execute68k((uint32)proc, r);
1045	>	SheepVar proc_var(4);
1046	>	uint32 proc = proc_var.addr();
1047	>	WriteMacInt16(proc, trap);
1048	>	WriteMacInt16(proc + 2, M68K_RTS);
1049	>	Execute68k(proc, r);
1050		}
1051
1052		/*

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