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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.15 by gbeauche, 2003-11-04T20:48:29Z vs.
Revision 1.26 by gbeauche, 2004-01-24T11:28:06Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 30 | Line 30
30		#include "sigsegv.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41
42		#include <stdio.h>
43
#	Line 70 | Line 73 | static void enter_mon(void)
73		#endif
74		}
75
76	+	// From main_*.cpp
77	+	extern uintptr SignalStackBase();
78	+
79	+	// From rsrc_patches.cpp
80	+	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
81	+
82	+	// PowerPC EmulOp to exit from emulation looop
83	+	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
84	+
85		// Enable multicore (main/interrupts) cpu emulation?
86		#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87
#	Line 88 | Line 100 | static void enter_mon(void)
100		// Pointer to Kernel Data
101		static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
102
103	+	// SIGSEGV handler
104	+	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
105	+
106	+	// JIT Compiler enabled?
107	+	static inline bool enable_jit_p()
108	+	{
109	+	return PrefsFindBool("jit");
110	+	}
111	+
112
113		/**
114		*              PowerPC emulator glue with special 'sheep' opcodes
115		**/
116
117	+	enum {
118	+	PPC_I(SHEEP) = PPC_I(MAX),
119	+	PPC_I(SHEEP_MAX)
120	+	};
121	+
122		class sheepshaver_cpu
123		: public powerpc_cpu
124		{
#	Line 104 | Line 130 | public:
130		// Constructor
131		sheepshaver_cpu();
132
133	<	// Condition Register accessors
133	>	// CR & XER accessors
134		uint32 get_cr() const           { return cr().get(); }
135		void set_cr(uint32 v)           { cr().set(v); }
136	+	uint32 get_xer() const          { return xer().get(); }
137	+	void set_xer(uint32 v)          { xer().set(v); }
138
139	<	// Execution loop
140	<	void execute(uint32 entry, bool enable_cache = false);
139	>	// Execute EMUL_OP routine
140	>	void execute_emul_op(uint32 emul_op);
141
142		// Execute 68k routine
143		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 120 | Line 148 | public:
148		// Execute MacOS/PPC code
149		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
150
151	+	// Compile one instruction
152	+	virtual bool compile1(codegen_context_t & cg_context);
153	+
154		// Resource manager thunk
155		void get_resource(uint32 old_get_resource);
156
#	Line 135 | Line 166 | public:
166		// FIXME: really make surre array allocation fail at link time?
167		void *operator new[](size_t);
168		void operator delete[](void *p);
169	+
170	+	// Make sure the SIGSEGV handler can access CPU registers
171	+	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
172		};
173
174		lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
175
176		sheepshaver_cpu::sheepshaver_cpu()
177	<	: powerpc_cpu()
177	>	: powerpc_cpu(enable_jit_p())
178		{
179		init_decoder();
180		}
#	Line 158 | Line 192 | void sheepshaver_cpu::init_decoder()
192		{ "sheep",
193		(execute_pmf)&sheepshaver_cpu::execute_sheep,
194		NULL,
195	+	PPC_I(SHEEP),
196		D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
197		}
198		};
#	Line 185 | Line 220 | typedef bit_field< 20, 20 > FN_field;
220		typedef bit_field< 21, 25 > NATIVE_OP_field;
221		typedef bit_field< 26, 31 > EMUL_OP_field;
222
223	+	// Execute EMUL_OP routine
224	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
225	+	{
226	+	M68kRegisters r68;
227	+	WriteMacInt32(XLM_68K_R25, gpr(25));
228	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
229	+	for (int i = 0; i < 8; i++)
230	+	r68.d[i] = gpr(8 + i);
231	+	for (int i = 0; i < 7; i++)
232	+	r68.a[i] = gpr(16 + i);
233	+	r68.a[7] = gpr(1);
234	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
235	+	uint32 saved_xer = get_xer();
236	+	EmulOp(&r68, gpr(24), emul_op);
237	+	set_cr(saved_cr);
238	+	set_xer(saved_xer);
239	+	for (int i = 0; i < 8; i++)
240	+	gpr(8 + i) = r68.d[i];
241	+	for (int i = 0; i < 7; i++)
242	+	gpr(16 + i) = r68.a[i];
243	+	gpr(1) = r68.a[7];
244	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
245	+	}
246	+
247		// Execute SheepShaver instruction
248		void sheepshaver_cpu::execute_sheep(uint32 opcode)
249		{
#	Line 208 | Line 267 | void sheepshaver_cpu::execute_sheep(uint
267		pc() += 4;
268		break;
269
270	<	default: {      // EMUL_OP
271	<	M68kRegisters r68;
213	<	WriteMacInt32(XLM_68K_R25, gpr(25));
214	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
215	<	for (int i = 0; i < 8; i++)
216	<	r68.d[i] = gpr(8 + i);
217	<	for (int i = 0; i < 7; i++)
218	<	r68.a[i] = gpr(16 + i);
219	<	r68.a[7] = gpr(1);
220	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
221	<	for (int i = 0; i < 8; i++)
222	<	gpr(8 + i) = r68.d[i];
223	<	for (int i = 0; i < 7; i++)
224	<	gpr(16 + i) = r68.a[i];
225	<	gpr(1) = r68.a[7];
226	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
270	>	default:        // EMUL_OP
271	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
272		pc() += 4;
273		break;
274		}
230	–	}
275		}
276
277	<	// Execution loop
278	<	void sheepshaver_cpu::execute(uint32 entry, bool enable_cache)
277	>	// Compile one instruction
278	>	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
279		{
280	<	powerpc_cpu::execute(entry, enable_cache);
280	>	#if PPC_ENABLE_JIT
281	>	const instr_info_t *ii = cg_context.instr_info;
282	>	if (ii->mnemo != PPC_I(SHEEP))
283	>	return false;
284	>
285	>	bool compiled = false;
286	>	powerpc_dyngen & dg = cg_context.codegen;
287	>	uint32 opcode = cg_context.opcode;
288	>
289	>	switch (opcode & 0x3f) {
290	>	case 0:         // EMUL_RETURN
291	>	dg.gen_invoke(QuitEmulator);
292	>	compiled = true;
293	>	break;
294	>
295	>	case 1:         // EXEC_RETURN
296	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
297	>	compiled = true;
298	>	break;
299	>
300	>	case 2: {       // EXEC_NATIVE
301	>	uint32 selector = NATIVE_OP_field::extract(opcode);
302	>	switch (selector) {
303	>	case NATIVE_PATCH_NAME_REGISTRY:
304	>	dg.gen_invoke(DoPatchNameRegistry);
305	>	compiled = true;
306	>	break;
307	>	case NATIVE_VIDEO_INSTALL_ACCEL:
308	>	dg.gen_invoke(VideoInstallAccel);
309	>	compiled = true;
310	>	break;
311	>	case NATIVE_VIDEO_VBL:
312	>	dg.gen_invoke(VideoVBL);
313	>	compiled = true;
314	>	break;
315	>	case NATIVE_GET_RESOURCE:
316	>	case NATIVE_GET_1_RESOURCE:
317	>	case NATIVE_GET_IND_RESOURCE:
318	>	case NATIVE_GET_1_IND_RESOURCE:
319	>	case NATIVE_R_GET_RESOURCE: {
320	>	static const uint32 get_resource_ptr[] = {
321	>	XLM_GET_RESOURCE,
322	>	XLM_GET_1_RESOURCE,
323	>	XLM_GET_IND_RESOURCE,
324	>	XLM_GET_1_IND_RESOURCE,
325	>	XLM_R_GET_RESOURCE
326	>	};
327	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
328	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
329	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
330	>	dg.gen_invoke_CPU_im(func, old_get_resource);
331	>	compiled = true;
332	>	break;
333	>	}
334	>	case NATIVE_DISABLE_INTERRUPT:
335	>	dg.gen_invoke(DisableInterrupt);
336	>	compiled = true;
337	>	break;
338	>	case NATIVE_ENABLE_INTERRUPT:
339	>	dg.gen_invoke(EnableInterrupt);
340	>	compiled = true;
341	>	break;
342	>	case NATIVE_CHECK_LOAD_INVOC:
343	>	dg.gen_load_T0_GPR(3);
344	>	dg.gen_load_T1_GPR(4);
345	>	dg.gen_se_16_32_T1();
346	>	dg.gen_load_T2_GPR(5);
347	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
348	>	compiled = true;
349	>	break;
350	>	}
351	>	if (FN_field::test(opcode)) {
352	>	if (compiled) {
353	>	dg.gen_load_A0_LR();
354	>	dg.gen_set_PC_A0();
355	>	}
356	>	cg_context.done_compile = true;
357	>	}
358	>	else
359	>	cg_context.done_compile = false;
360	>	break;
361	>	}
362	>
363	>	default: {      // EMUL_OP
364	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
365	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
366	>	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
367	>	cg_context.done_compile = false;
368	>	compiled = true;
369	>	break;
370	>	}
371	>	}
372	>	return compiled;
373	>	#endif
374	>	return false;
375		}
376
377		// Handle MacOS interrupt
#	Line 253 | Line 391 | void sheepshaver_cpu::interrupt(uint32 e
391		#endif
392
393		// Initialize stack pointer to SheepShaver alternate stack base
394	<	gpr(1) = SheepStack1Base - 64;
394	>	gpr(1) = SignalStackBase() - 64;
395
396		// Build trampoline to return from interrupt
397	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
397	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
398
399		// Prepare registers for nanokernel interrupt routine
400		kernel_data->v[0x004 >> 2] = htonl(gpr(1));
#	Line 275 | Line 413 | void sheepshaver_cpu::interrupt(uint32 e
413		gpr(1)  = KernelDataAddr;
414		gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
415		gpr(8)  = 0;
416	<	gpr(10) = (uint32)trampoline;
417	<	gpr(12) = (uint32)trampoline;
416	>	gpr(10) = trampoline.addr();
417	>	gpr(12) = trampoline.addr();
418		gpr(13) = get_cr();
419
420		// rlwimi. r7,r7,8,0,0
#	Line 413 | Line 551 | uint32 sheepshaver_cpu::execute_macos_co
551		uint32 saved_ctr= ctr();
552
553		// Build trampoline with EXEC_RETURN
554	<	uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
555	<	lr() = (uint32)trampoline;
554	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
555	>	lr() = trampoline.addr();
556
557		gpr(1) -= 64;                                                           // Create stack frame
558		uint32 proc = ReadMacInt32(tvect);                      // Get routine address
#	Line 458 | Line 596 | inline void sheepshaver_cpu::execute_ppc
596		// Save branch registers
597		uint32 saved_lr = lr();
598
599	<	const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) };
600	<	lr() = (uint32)trampoline;
599	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
600	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
601	>	lr() = trampoline.addr();
602
603		execute(entry);
604
#	Line 468 | Line 607 | inline void sheepshaver_cpu::execute_ppc
607		}
608
609		// Resource Manager thunk
471	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
472	–
610		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
611		{
612		uint32 type = gpr(3);
#	Line 553 | Line 690 | static sigsegv_return_t sigsegv_handler(
690		if ((addr - ROM_BASE) < ROM_SIZE)
691		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
692
693	<	// Ignore all other faults, if requested
694	<	if (PrefsFindBool("ignoresegv"))
695	<	return SIGSEGV_RETURN_FAILURE;
693	>	// Get program counter of target CPU
694	>	sheepshaver_cpu * const cpu = current_cpu;
695	>	const uint32 pc = cpu->pc();
696	>
697	>	// Fault in Mac ROM or RAM?
698	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
699	>	if (mac_fault) {
700	>
701	>	// "VM settings" during MacOS 8 installation
702	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
703	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
704	>
705	>	// MacOS 8.5 installation
706	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
707	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
708	>
709	>	// MacOS 8 serial drivers on startup
710	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
711	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
712	>
713	>	// MacOS 8.1 serial drivers on startup
714	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
715	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
716	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
717	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
718	>
719	>	// Ignore all other faults, if requested
720	>	if (PrefsFindBool("ignoresegv"))
721	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
722	>	}
723		#else
724		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
725		#endif
#	Line 577 | Line 741 | void init_emul_ppc(void)
741		// Initialize main CPU emulator
742		main_cpu = new sheepshaver_cpu();
743		main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
744	+	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
745		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
746
747		#if MULTICORE_CPU
#	Line 641 | Line 806 | void exit_emul_ppc(void)
806		void emul_ppc(uint32 entry)
807		{
808		current_cpu = main_cpu;
809	<	#if DEBUG
809	>	#if 0
810		current_cpu->start_log();
811		#endif
812		// start emulation loop and enable code translation or caching
813	<	current_cpu->execute(entry, true);
813	>	current_cpu->execute(entry);
814		}
815
816		/*
#	Line 673 | Line 838 | void TriggerInterrupt(void)
838		void sheepshaver_cpu::handle_interrupt(void)
839		{
840		// Do nothing if interrupts are disabled
841	<	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
841	>	if (*(int32 *)XLM_IRQ_NEST > 0)
842		return;
843
844		// Do nothing if there is no interrupt pending
#	Line 740 | Line 905 | void sheepshaver_cpu::handle_interrupt(v
905		if (InterruptFlags & INTFLAG_VIA) {
906		ClearInterruptFlag(INTFLAG_VIA);
907		ADBInterrupt();
908	<	ExecutePPC(VideoVBL);
908	>	ExecuteNative(NATIVE_VIDEO_VBL);
909		}
910		}
911		#endif
#	Line 750 | Line 915 | void sheepshaver_cpu::handle_interrupt(v
915		}
916		}
917
753	–	/*
754	–	*  Execute NATIVE_OP opcode (called by PowerPC emulator)
755	–	*/
756	–
757	–	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
758	–	tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
759	–
760	–	// FIXME: Make sure 32-bit relocations are used
761	–	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
762	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
763	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
764	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
765	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
766	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
767	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
768	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
769	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
770	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
771	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
772	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
773	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
774	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
775	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
776	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
777	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
778	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
779	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
780	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
781	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
782	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
783	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
784	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
785	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
786	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
787	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE),
788	–	};
789	–
918		static void get_resource(void);
919		static void get_1_resource(void);
920		static void get_ind_resource(void);
#	Line 816 | Line 944 | static void NativeOp(int selector)
944		GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
945		(void *)GPR(5), GPR(6), GPR(7));
946		break;
947	<	case NATIVE_GET_RESOURCE:
948	<	get_resource();
947	>	#ifdef WORDS_BIGENDIAN
948	>	case NATIVE_ETHER_IRQ:
949	>	EtherIRQ();
950		break;
951	<	case NATIVE_GET_1_RESOURCE:
952	<	get_1_resource();
951	>	case NATIVE_ETHER_INIT:
952	>	GPR(3) = InitStreamModule((void *)GPR(3));
953		break;
954	<	case NATIVE_GET_IND_RESOURCE:
955	<	get_ind_resource();
954	>	case NATIVE_ETHER_TERM:
955	>	TerminateStreamModule();
956		break;
957	<	case NATIVE_GET_1_IND_RESOURCE:
958	<	get_1_ind_resource();
957	>	case NATIVE_ETHER_OPEN:
958	>	GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7));
959	>	break;
960	>	case NATIVE_ETHER_CLOSE:
961	>	GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5));
962	>	break;
963	>	case NATIVE_ETHER_WPUT:
964	>	GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4));
965		break;
966	<	case NATIVE_R_GET_RESOURCE:
967	<	r_get_resource();
966	>	case NATIVE_ETHER_RSRV:
967	>	GPR(3) = ether_rsrv((queue_t *)GPR(3));
968	>	break;
969	>	#else
970	>	case NATIVE_ETHER_INIT:
971	>	// FIXME: needs more complicated thunks
972	>	GPR(3) = false;
973		break;
974	+	#endif
975		case NATIVE_SERIAL_NOTHING:
976		case NATIVE_SERIAL_OPEN:
977		case NATIVE_SERIAL_PRIME_IN:
#	Line 851 | Line 992 | static void NativeOp(int selector)
992		GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
993		break;
994		}
995	+	case NATIVE_GET_RESOURCE:
996	+	case NATIVE_GET_1_RESOURCE:
997	+	case NATIVE_GET_IND_RESOURCE:
998	+	case NATIVE_GET_1_IND_RESOURCE:
999	+	case NATIVE_R_GET_RESOURCE: {
1000	+	typedef void (*GetResourceCallback)(void);
1001	+	static const GetResourceCallback get_resource_callbacks[] = {
1002	+	get_resource,
1003	+	get_1_resource,
1004	+	get_ind_resource,
1005	+	get_1_ind_resource,
1006	+	r_get_resource
1007	+	};
1008	+	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1009	+	break;
1010	+	}
1011		case NATIVE_DISABLE_INTERRUPT:
1012		DisableInterrupt();
1013		break;
#	Line 860 | Line 1017 | static void NativeOp(int selector)
1017		case NATIVE_MAKE_EXECUTABLE:
1018		MakeExecutable(0, (void *)GPR(4), GPR(5));
1019		break;
1020	+	case NATIVE_CHECK_LOAD_INVOC:
1021	+	check_load_invoc(GPR(3), GPR(4), GPR(5));
1022	+	break;
1023		default:
1024		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1025		QuitEmulator();
#	Line 872 | Line 1032 | static void NativeOp(int selector)
1032		}
1033
1034		/*
875	–	*  Execute native subroutine (LR must contain return address)
876	–	*/
877	–
878	–	void ExecuteNative(int selector)
879	–	{
880	–	uint32 tvect[2];
881	–	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
882	–	tvect[1] = 0; // Fake TVECT
883	–	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
884	–	M68kRegisters r;
885	–	Execute68k((uint32)&desc, &r);
886	–	}
887	–
888	–	/*
1035		*  Execute 68k subroutine (must be ended with EXEC_RETURN)
1036		*  This must only be called by the emul_thread when in EMUL_OP mode
1037		*  r->a[7] is unused, the routine runs on the caller's stack
#	Line 903 | Line 1049 | void Execute68k(uint32 pc, M68kRegisters
1049
1050		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1051		{
1052	<	uint16 proc[2];
1053	<	proc[0] = htons(trap);
1054	<	proc[1] = htons(M68K_RTS);
1055	<	Execute68k((uint32)proc, r);
1052	>	SheepVar proc_var(4);
1053	>	uint32 proc = proc_var.addr();
1054	>	WriteMacInt16(proc, trap);
1055	>	WriteMacInt16(proc + 2, M68K_RTS);
1056	>	Execute68k(proc, r);
1057		}
1058
1059		/*

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