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gbeauche |
1.1 |
/* |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
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* |
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* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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#include "sysdeps.h" |
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#include "cpu_emulation.h" |
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#include "main.h" |
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#include "xlowmem.h" |
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#include "emul_op.h" |
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#include "rom_patches.h" |
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#include "macos_util.h" |
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#include "block-alloc.hpp" |
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#include "sigsegv.h" |
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gbeauche |
1.2 |
#include "spcflags.h" |
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gbeauche |
1.1 |
#include "cpu/ppc/ppc-cpu.hpp" |
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#include "cpu/ppc/ppc-operations.hpp" |
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// Used for NativeOp trampolines |
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#include "video.h" |
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#include "name_registry.h" |
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#include "serial.h" |
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#include <stdio.h> |
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#if ENABLE_MON |
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#include "mon.h" |
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#include "mon_disass.h" |
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#endif |
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#define DEBUG 1 |
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#include "debug.h" |
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static void enter_mon(void) |
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{ |
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// Start up mon in real-mode |
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#if ENABLE_MON |
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char *arg[4] = {"mon", "-m", "-r", NULL}; |
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mon(3, arg); |
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#endif |
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} |
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gbeauche |
1.2 |
// Enable multicore (main/interrupts) cpu emulation? |
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#define MULTICORE_CPU 0 |
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gbeauche |
1.1 |
// Enable Execute68k() safety checks? |
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#define SAFE_EXEC_68K 1 |
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// Save FP state in Execute68k()? |
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#define SAVE_FP_EXEC_68K 1 |
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// Interrupts in EMUL_OP mode? |
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#define INTERRUPTS_IN_EMUL_OP_MODE 1 |
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// Interrupts in native mode? |
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#define INTERRUPTS_IN_NATIVE_MODE 1 |
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// 68k Emulator Data |
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struct EmulatorData { |
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uint32 v[0x400]; |
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}; |
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// Kernel Data |
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struct KernelData { |
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uint32 v[0x400]; |
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EmulatorData ed; |
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}; |
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// Pointer to Kernel Data |
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static KernelData * const kernel_data = (KernelData *)0x68ffe000; |
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/** |
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* PowerPC emulator glue with special 'sheep' opcodes |
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**/ |
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struct sheepshaver_exec_return { }; |
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class sheepshaver_cpu |
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: public powerpc_cpu |
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{ |
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void init_decoder(); |
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void execute_sheep(uint32 opcode); |
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public: |
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sheepshaver_cpu() |
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: powerpc_cpu() |
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{ init_decoder(); } |
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// Condition Register accessors |
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uint32 get_cr() const { return cr().get(); } |
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void set_cr(uint32 v) { cr().set(v); } |
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// Execution loop |
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void execute(uint32 pc); |
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// Execute 68k routine |
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void execute_68k(uint32 entry, M68kRegisters *r); |
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gbeauche |
1.2 |
// Execute ppc routine |
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void execute_ppc(uint32 entry); |
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gbeauche |
1.1 |
// Execute MacOS/PPC code |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
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// Resource manager thunk |
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void get_resource(uint32 old_get_resource); |
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// Handle MacOS interrupt |
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gbeauche |
1.2 |
void interrupt(uint32 entry, sheepshaver_cpu *cpu); |
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// spcflags for interrupts handling |
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static uint32 spcflags; |
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gbeauche |
1.1 |
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// Lazy memory allocator (one item at a time) |
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void *operator new(size_t size) |
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{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); } |
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void operator delete(void *p) |
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{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); } |
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// FIXME: really make surre array allocation fail at link time? |
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void *operator new[](size_t); |
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void operator delete[](void *p); |
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}; |
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gbeauche |
1.2 |
uint32 sheepshaver_cpu::spcflags = 0; |
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gbeauche |
1.1 |
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
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void sheepshaver_cpu::init_decoder() |
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{ |
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#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
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static bool initialized = false; |
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if (initialized) |
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return; |
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initialized = true; |
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#endif |
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static const instr_info_t sheep_ii_table[] = { |
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{ "sheep", |
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(execute_fn)&sheepshaver_cpu::execute_sheep, |
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NULL, |
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D_form, 6, 0, CFLOW_TRAP |
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} |
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}; |
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const int ii_count = sizeof(sheep_ii_table)/sizeof(sheep_ii_table[0]); |
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D(bug("SheepShaver extra decode table has %d entries\n", ii_count)); |
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for (int i = 0; i < ii_count; i++) { |
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const instr_info_t * ii = &sheep_ii_table[i]; |
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init_decoder_entry(ii); |
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} |
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} |
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// Forward declaration for native opcode handler |
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static void NativeOp(int selector); |
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gbeauche |
1.2 |
/* NativeOp instruction format: |
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+------------+--------------------------+--+----------+------------+ |
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| 6 | |FN| OP | 2 | |
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+------------+--------------------------+--+----------+------------+ |
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0 5 |6 19 20 21 25 26 31 |
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*/ |
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typedef bit_field< 20, 20 > FN_field; |
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typedef bit_field< 21, 25 > NATIVE_OP_field; |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
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gbeauche |
1.1 |
// Execute SheepShaver instruction |
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void sheepshaver_cpu::execute_sheep(uint32 opcode) |
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{ |
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// D(bug("Extended opcode %08x at %08x (68k pc %08x)\n", opcode, pc(), gpr(24))); |
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assert((((opcode >> 26) & 0x3f) == 6) && OP_MAX <= 64 + 3); |
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switch (opcode & 0x3f) { |
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case 0: // EMUL_RETURN |
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QuitEmulator(); |
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break; |
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case 1: // EXEC_RETURN |
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throw sheepshaver_exec_return(); |
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break; |
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case 2: // EXEC_NATIVE |
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gbeauche |
1.2 |
NativeOp(NATIVE_OP_field::extract(opcode)); |
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if (FN_field::test(opcode)) |
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pc() = lr(); |
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else |
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pc() += 4; |
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gbeauche |
1.1 |
break; |
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default: { // EMUL_OP |
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M68kRegisters r68; |
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WriteMacInt32(XLM_68K_R25, gpr(25)); |
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WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
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for (int i = 0; i < 8; i++) |
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r68.d[i] = gpr(8 + i); |
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for (int i = 0; i < 7; i++) |
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r68.a[i] = gpr(16 + i); |
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r68.a[7] = gpr(1); |
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gbeauche |
1.2 |
EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3); |
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gbeauche |
1.1 |
for (int i = 0; i < 8; i++) |
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gpr(8 + i) = r68.d[i]; |
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for (int i = 0; i < 7; i++) |
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gpr(16 + i) = r68.a[i]; |
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gpr(1) = r68.a[7]; |
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WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
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pc() += 4; |
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break; |
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} |
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} |
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} |
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gbeauche |
1.2 |
// Checks for pending interrupts |
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struct execute_nothing { |
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static inline void execute(powerpc_cpu *) { } |
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}; |
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static void HandleInterrupt(void); |
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struct execute_spcflags_check { |
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static inline void execute(powerpc_cpu *cpu) { |
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if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) { |
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if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) { |
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SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON ); |
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enter_mon(); |
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} |
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if (SPCFLAGS_TEST( SPCFLAG_DOINT )) { |
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SPCFLAGS_CLEAR( SPCFLAG_DOINT ); |
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HandleInterrupt(); |
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} |
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if (SPCFLAGS_TEST( SPCFLAG_INT )) { |
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SPCFLAGS_CLEAR( SPCFLAG_INT ); |
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SPCFLAGS_SET( SPCFLAG_DOINT ); |
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} |
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} |
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} |
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}; |
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gbeauche |
1.1 |
// Execution loop |
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void sheepshaver_cpu::execute(uint32 entry) |
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{ |
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try { |
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pc() = entry; |
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gbeauche |
1.2 |
powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>(); |
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gbeauche |
1.1 |
} |
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catch (sheepshaver_exec_return const &) { |
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// Nothing, simply return |
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} |
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catch (...) { |
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printf("ERROR: execute() received an unknown exception!\n"); |
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QuitEmulator(); |
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} |
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} |
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// Handle MacOS interrupt |
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gbeauche |
1.2 |
void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu) |
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gbeauche |
1.1 |
{ |
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gbeauche |
1.2 |
#if MULTICORE_CPU |
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// Initialize stack pointer from previous CPU running |
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gpr(1) = cpu->gpr(1); |
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#else |
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// Save program counters and branch registers |
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uint32 saved_pc = pc(); |
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uint32 saved_lr = lr(); |
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uint32 saved_ctr= ctr(); |
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#endif |
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gbeauche |
1.1 |
// Create stack frame |
285 |
gbeauche |
1.2 |
gpr(1) -= 64; |
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gbeauche |
1.1 |
|
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// Build trampoline to return from interrupt |
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uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
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// Prepare registers for nanokernel interrupt routine |
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kernel_data->v[0x004 >> 2] = gpr(1); |
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kernel_data->v[0x018 >> 2] = gpr(6); |
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gpr(6) = kernel_data->v[0x65c >> 2]; |
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gbeauche |
1.2 |
assert(gpr(6) != 0); |
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gbeauche |
1.1 |
WriteMacInt32(gpr(6) + 0x13c, gpr(7)); |
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WriteMacInt32(gpr(6) + 0x144, gpr(8)); |
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WriteMacInt32(gpr(6) + 0x14c, gpr(9)); |
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WriteMacInt32(gpr(6) + 0x154, gpr(10)); |
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WriteMacInt32(gpr(6) + 0x15c, gpr(11)); |
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WriteMacInt32(gpr(6) + 0x164, gpr(12)); |
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WriteMacInt32(gpr(6) + 0x16c, gpr(13)); |
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gpr(1) = KernelDataAddr; |
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gpr(7) = kernel_data->v[0x660 >> 2]; |
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gpr(8) = 0; |
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gpr(10) = (uint32)trampoline; |
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gpr(12) = (uint32)trampoline; |
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gpr(13) = cr().get(); |
310 |
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311 |
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// rlwimi. r7,r7,8,0,0 |
312 |
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uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7)); |
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record_cr0(result); |
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gpr(7) = result; |
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gpr(11) = 0xf072; // MSR (SRR1) |
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cr().set((gpr(11) & 0x0fff0000) | (cr().get() & ~0x0fff0000)); |
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// Enter nanokernel |
320 |
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execute(entry); |
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// Cleanup stack |
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gpr(1) += 64; |
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gbeauche |
1.2 |
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#if !MULTICORE_CPU |
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// Restore program counters and branch registers |
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pc() = saved_pc; |
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lr() = saved_lr; |
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ctr()= saved_ctr; |
330 |
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#endif |
331 |
gbeauche |
1.1 |
} |
332 |
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333 |
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// Execute 68k routine |
334 |
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void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r) |
335 |
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{ |
336 |
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#if SAFE_EXEC_68K |
337 |
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if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP) |
338 |
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printf("FATAL: Execute68k() not called from EMUL_OP mode\n"); |
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#endif |
340 |
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341 |
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// Save program counters and branch registers |
342 |
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uint32 saved_pc = pc(); |
343 |
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uint32 saved_lr = lr(); |
344 |
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uint32 saved_ctr= ctr(); |
345 |
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346 |
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// Create MacOS stack frame |
347 |
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uint32 sp = gpr(1); |
348 |
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gpr(1) -= 56 + 19*4 + 18*8; |
349 |
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WriteMacInt32(gpr(1), sp); |
350 |
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351 |
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// Save PowerPC registers |
352 |
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memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13)); |
353 |
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#if SAVE_FP_EXEC_68K |
354 |
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memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14)); |
355 |
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#endif |
356 |
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357 |
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// Setup registers for 68k emulator |
358 |
gbeauche |
1.2 |
cr().set(CR_SO_field<2>::mask()); // Supervisor mode |
359 |
gbeauche |
1.1 |
for (int i = 0; i < 8; i++) // d[0]..d[7] |
360 |
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gpr(8 + i) = r->d[i]; |
361 |
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for (int i = 0; i < 7; i++) // a[0]..a[6] |
362 |
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gpr(16 + i) = r->a[i]; |
363 |
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gpr(23) = 0; |
364 |
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gpr(24) = entry; |
365 |
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gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR |
366 |
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gpr(26) = 0; |
367 |
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gpr(28) = 0; // VBR |
368 |
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gpr(29) = kernel_data->ed.v[0x74 >> 2]; // Pointer to opcode table |
369 |
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gpr(30) = kernel_data->ed.v[0x78 >> 2]; // Address of emulator |
370 |
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gpr(31) = KernelDataAddr + 0x1000; |
371 |
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372 |
|
|
// Push return address (points to EXEC_RETURN opcode) on stack |
373 |
|
|
gpr(1) -= 4; |
374 |
|
|
WriteMacInt32(gpr(1), XLM_EXEC_RETURN_OPCODE); |
375 |
|
|
|
376 |
|
|
// Rentering 68k emulator |
377 |
|
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
378 |
|
|
|
379 |
|
|
// Set r0 to 0 for 68k emulator |
380 |
|
|
gpr(0) = 0; |
381 |
|
|
|
382 |
|
|
// Execute 68k opcode |
383 |
|
|
uint32 opcode = ReadMacInt16(gpr(24)); |
384 |
|
|
gpr(27) = (int32)(int16)ReadMacInt16(gpr(24) += 2); |
385 |
|
|
gpr(29) += opcode * 8; |
386 |
|
|
execute(gpr(29)); |
387 |
|
|
|
388 |
|
|
// Save r25 (contains current 68k interrupt level) |
389 |
|
|
WriteMacInt32(XLM_68K_R25, gpr(25)); |
390 |
|
|
|
391 |
|
|
// Reentering EMUL_OP mode |
392 |
|
|
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
393 |
|
|
|
394 |
|
|
// Save 68k registers |
395 |
|
|
for (int i = 0; i < 8; i++) // d[0]..d[7] |
396 |
|
|
r->d[i] = gpr(8 + i); |
397 |
|
|
for (int i = 0; i < 7; i++) // a[0]..a[6] |
398 |
|
|
r->a[i] = gpr(16 + i); |
399 |
|
|
|
400 |
|
|
// Restore PowerPC registers |
401 |
|
|
memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13)); |
402 |
|
|
#if SAVE_FP_EXEC_68K |
403 |
|
|
memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14)); |
404 |
|
|
#endif |
405 |
|
|
|
406 |
|
|
// Cleanup stack |
407 |
|
|
gpr(1) += 56 + 19*4 + 18*8; |
408 |
|
|
|
409 |
|
|
// Restore program counters and branch registers |
410 |
|
|
pc() = saved_pc; |
411 |
|
|
lr() = saved_lr; |
412 |
|
|
ctr()= saved_ctr; |
413 |
|
|
} |
414 |
|
|
|
415 |
|
|
// Call MacOS PPC code |
416 |
|
|
uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args) |
417 |
|
|
{ |
418 |
|
|
// Save program counters and branch registers |
419 |
|
|
uint32 saved_pc = pc(); |
420 |
|
|
uint32 saved_lr = lr(); |
421 |
|
|
uint32 saved_ctr= ctr(); |
422 |
|
|
|
423 |
|
|
// Build trampoline with EXEC_RETURN |
424 |
|
|
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
425 |
|
|
lr() = (uint32)trampoline; |
426 |
|
|
|
427 |
|
|
gpr(1) -= 64; // Create stack frame |
428 |
|
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
429 |
|
|
uint32 toc = ReadMacInt32(tvect + 4); // Get TOC pointer |
430 |
|
|
|
431 |
|
|
// Save PowerPC registers |
432 |
|
|
uint32 regs[8]; |
433 |
|
|
regs[0] = gpr(2); |
434 |
|
|
for (int i = 0; i < nargs; i++) |
435 |
|
|
regs[i + 1] = gpr(i + 3); |
436 |
|
|
|
437 |
|
|
// Prepare and call MacOS routine |
438 |
|
|
gpr(2) = toc; |
439 |
|
|
for (int i = 0; i < nargs; i++) |
440 |
|
|
gpr(i + 3) = args[i]; |
441 |
|
|
execute(proc); |
442 |
|
|
uint32 retval = gpr(3); |
443 |
|
|
|
444 |
|
|
// Restore PowerPC registers |
445 |
|
|
for (int i = 0; i <= nargs; i++) |
446 |
|
|
gpr(i + 2) = regs[i]; |
447 |
|
|
|
448 |
|
|
// Cleanup stack |
449 |
|
|
gpr(1) += 64; |
450 |
|
|
|
451 |
|
|
// Restore program counters and branch registers |
452 |
|
|
pc() = saved_pc; |
453 |
|
|
lr() = saved_lr; |
454 |
|
|
ctr()= saved_ctr; |
455 |
|
|
|
456 |
|
|
return retval; |
457 |
|
|
} |
458 |
|
|
|
459 |
gbeauche |
1.2 |
// Execute ppc routine |
460 |
|
|
inline void sheepshaver_cpu::execute_ppc(uint32 entry) |
461 |
|
|
{ |
462 |
|
|
// Save branch registers |
463 |
|
|
uint32 saved_lr = lr(); |
464 |
|
|
uint32 saved_ctr= ctr(); |
465 |
|
|
|
466 |
|
|
const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
467 |
|
|
|
468 |
|
|
lr() = (uint32)trampoline; |
469 |
|
|
ctr()= entry; |
470 |
|
|
execute(entry); |
471 |
|
|
|
472 |
|
|
// Restore branch registers |
473 |
|
|
lr() = saved_lr; |
474 |
|
|
ctr()= saved_ctr; |
475 |
|
|
} |
476 |
|
|
|
477 |
gbeauche |
1.1 |
// Resource Manager thunk |
478 |
gbeauche |
1.2 |
extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h); |
479 |
|
|
|
480 |
gbeauche |
1.1 |
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
481 |
|
|
{ |
482 |
gbeauche |
1.2 |
uint32 type = gpr(3); |
483 |
|
|
int16 id = gpr(4); |
484 |
|
|
|
485 |
|
|
// Create stack frame |
486 |
|
|
gpr(1) -= 56; |
487 |
|
|
|
488 |
|
|
// Call old routine |
489 |
|
|
execute_ppc(old_get_resource); |
490 |
|
|
uint16 **handle = (uint16 **)gpr(3); |
491 |
|
|
|
492 |
|
|
// Call CheckLoad() |
493 |
|
|
check_load_invoc(type, id, handle); |
494 |
|
|
gpr(3) = (uint32)handle; |
495 |
|
|
|
496 |
|
|
// Cleanup stack |
497 |
|
|
gpr(1) += 56; |
498 |
gbeauche |
1.1 |
} |
499 |
|
|
|
500 |
|
|
|
501 |
|
|
/** |
502 |
|
|
* SheepShaver CPU engine interface |
503 |
|
|
**/ |
504 |
|
|
|
505 |
|
|
static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow |
506 |
|
|
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
507 |
|
|
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
508 |
|
|
|
509 |
gbeauche |
1.2 |
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
510 |
|
|
{ |
511 |
|
|
#if MULTICORE_CPU |
512 |
|
|
current_cpu = new_cpu; |
513 |
|
|
#endif |
514 |
|
|
} |
515 |
|
|
|
516 |
|
|
static inline void cpu_pop() |
517 |
|
|
{ |
518 |
|
|
#if MULTICORE_CPU |
519 |
|
|
current_cpu = main_cpu; |
520 |
|
|
#endif |
521 |
|
|
} |
522 |
|
|
|
523 |
gbeauche |
1.1 |
// Dump PPC registers |
524 |
|
|
static void dump_registers(void) |
525 |
|
|
{ |
526 |
|
|
current_cpu->dump_registers(); |
527 |
|
|
} |
528 |
|
|
|
529 |
|
|
// Dump log |
530 |
|
|
static void dump_log(void) |
531 |
|
|
{ |
532 |
|
|
current_cpu->dump_log(); |
533 |
|
|
} |
534 |
|
|
|
535 |
|
|
/* |
536 |
|
|
* Initialize CPU emulation |
537 |
|
|
*/ |
538 |
|
|
|
539 |
|
|
static struct sigaction sigsegv_action; |
540 |
|
|
|
541 |
|
|
#if defined(__powerpc__) |
542 |
|
|
#include <sys/ucontext.h> |
543 |
|
|
#endif |
544 |
|
|
|
545 |
|
|
static void sigsegv_handler(int sig, siginfo_t *sip, void *scp) |
546 |
|
|
{ |
547 |
|
|
const uintptr addr = (uintptr)sip->si_addr; |
548 |
|
|
#if ENABLE_VOSF |
549 |
|
|
// Handle screen fault. |
550 |
|
|
extern bool Screen_fault_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction); |
551 |
|
|
if (Screen_fault_handler((sigsegv_address_t)addr, SIGSEGV_INVALID_PC)) |
552 |
|
|
return; |
553 |
|
|
#endif |
554 |
|
|
#if defined(__powerpc__) |
555 |
|
|
if (addr >= ROM_BASE && addr < ROM_BASE + ROM_SIZE) { |
556 |
|
|
printf("IGNORE write access to ROM at %08x\n", addr); |
557 |
|
|
(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4; |
558 |
|
|
return; |
559 |
|
|
} |
560 |
|
|
if (addr >= 0xf3012000 && addr < 0xf3014000 && 0) { |
561 |
|
|
printf("IGNORE write access to ROM at %08x\n", addr); |
562 |
|
|
(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4; |
563 |
|
|
return; |
564 |
|
|
} |
565 |
|
|
#endif |
566 |
|
|
printf("Caught SIGSEGV at address %p\n", sip->si_addr); |
567 |
|
|
printf("Native PC: %08x\n", (((ucontext_t *)scp)->uc_mcontext.regs)->nip); |
568 |
|
|
printf("Current CPU: %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
569 |
|
|
#if 1 |
570 |
|
|
dump_registers(); |
571 |
|
|
#else |
572 |
|
|
printf("Main CPU context\n"); |
573 |
|
|
main_cpu->dump_registers(); |
574 |
|
|
printf("Interrupts CPU context\n"); |
575 |
|
|
interrupt_cpu->dump_registers(); |
576 |
|
|
#endif |
577 |
|
|
current_cpu->dump_log(); |
578 |
|
|
enter_mon(); |
579 |
|
|
QuitEmulator(); |
580 |
|
|
} |
581 |
|
|
|
582 |
|
|
void init_emul_ppc(void) |
583 |
|
|
{ |
584 |
|
|
// Initialize main CPU emulator |
585 |
|
|
main_cpu = new sheepshaver_cpu(); |
586 |
|
|
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
587 |
|
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
588 |
|
|
|
589 |
gbeauche |
1.2 |
#if MULTICORE_CPU |
590 |
gbeauche |
1.1 |
// Initialize alternate CPU emulator to handle interrupts |
591 |
|
|
interrupt_cpu = new sheepshaver_cpu(); |
592 |
gbeauche |
1.2 |
#endif |
593 |
gbeauche |
1.1 |
|
594 |
|
|
// Install SIGSEGV handler |
595 |
|
|
sigemptyset(&sigsegv_action.sa_mask); |
596 |
|
|
sigsegv_action.sa_sigaction = sigsegv_handler; |
597 |
|
|
sigsegv_action.sa_flags = SA_SIGINFO; |
598 |
|
|
sigsegv_action.sa_restorer = NULL; |
599 |
|
|
sigaction(SIGSEGV, &sigsegv_action, NULL); |
600 |
|
|
|
601 |
|
|
#if ENABLE_MON |
602 |
|
|
// Install "regs" command in cxmon |
603 |
|
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
604 |
|
|
mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n"); |
605 |
|
|
#endif |
606 |
|
|
} |
607 |
|
|
|
608 |
|
|
/* |
609 |
|
|
* Emulation loop |
610 |
|
|
*/ |
611 |
|
|
|
612 |
|
|
void emul_ppc(uint32 entry) |
613 |
|
|
{ |
614 |
|
|
current_cpu = main_cpu; |
615 |
|
|
current_cpu->start_log(); |
616 |
|
|
current_cpu->execute(entry); |
617 |
|
|
} |
618 |
|
|
|
619 |
|
|
/* |
620 |
|
|
* Handle PowerPC interrupt |
621 |
|
|
*/ |
622 |
|
|
|
623 |
|
|
// Atomic operations |
624 |
|
|
extern int atomic_add(int *var, int v); |
625 |
|
|
extern int atomic_and(int *var, int v); |
626 |
|
|
extern int atomic_or(int *var, int v); |
627 |
|
|
|
628 |
gbeauche |
1.2 |
void TriggerInterrupt(void) |
629 |
|
|
{ |
630 |
|
|
#if 0 |
631 |
|
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
632 |
|
|
#else |
633 |
|
|
SPCFLAGS_SET( SPCFLAG_INT ); |
634 |
|
|
#endif |
635 |
|
|
} |
636 |
|
|
|
637 |
|
|
static void HandleInterrupt(void) |
638 |
gbeauche |
1.1 |
{ |
639 |
|
|
// Do nothing if interrupts are disabled |
640 |
gbeauche |
1.2 |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
641 |
gbeauche |
1.1 |
return; |
642 |
|
|
|
643 |
gbeauche |
1.2 |
// Do nothing if there is no interrupt pending |
644 |
|
|
if (InterruptFlags == 0) |
645 |
gbeauche |
1.1 |
return; |
646 |
|
|
|
647 |
|
|
// Disable MacOS stack sniffer |
648 |
|
|
WriteMacInt32(0x110, 0); |
649 |
|
|
|
650 |
|
|
// Interrupt action depends on current run mode |
651 |
|
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
652 |
|
|
case MODE_68K: |
653 |
|
|
// 68k emulator active, trigger 68k interrupt level 1 |
654 |
|
|
assert(current_cpu == main_cpu); |
655 |
|
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
656 |
|
|
main_cpu->set_cr(main_cpu->get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
657 |
|
|
break; |
658 |
|
|
|
659 |
|
|
#if INTERRUPTS_IN_NATIVE_MODE |
660 |
|
|
case MODE_NATIVE: |
661 |
|
|
// 68k emulator inactive, in nanokernel? |
662 |
|
|
assert(current_cpu == main_cpu); |
663 |
|
|
if (main_cpu->gpr(1) != KernelDataAddr) { |
664 |
|
|
// Prepare for 68k interrupt level 1 |
665 |
|
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
666 |
|
|
WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc, |
667 |
|
|
ReadMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc) |
668 |
|
|
| tswap32(kernel_data->v[0x674 >> 2])); |
669 |
|
|
|
670 |
|
|
// Execute nanokernel interrupt routine (this will activate the 68k emulator) |
671 |
gbeauche |
1.2 |
DisableInterrupt(); |
672 |
|
|
cpu_push(interrupt_cpu); |
673 |
gbeauche |
1.1 |
if (ROMType == ROMTYPE_NEWWORLD) |
674 |
gbeauche |
1.2 |
current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu); |
675 |
gbeauche |
1.1 |
else |
676 |
gbeauche |
1.2 |
current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu); |
677 |
|
|
cpu_pop(); |
678 |
gbeauche |
1.1 |
} |
679 |
|
|
break; |
680 |
|
|
#endif |
681 |
|
|
|
682 |
|
|
#if INTERRUPTS_IN_EMUL_OP_MODE |
683 |
|
|
case MODE_EMUL_OP: |
684 |
|
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
685 |
|
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
686 |
|
|
#if 1 |
687 |
|
|
// Execute full 68k interrupt routine |
688 |
|
|
M68kRegisters r; |
689 |
|
|
uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level |
690 |
|
|
WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1 |
691 |
gbeauche |
1.2 |
static const uint8 proc[] = { |
692 |
|
|
0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word) |
693 |
|
|
0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address) |
694 |
|
|
0x40, 0xe7, // move sr,-(sp) (saved SR) |
695 |
|
|
0x20, 0x78, 0x00, 0x064, // move.l $64,a0 |
696 |
|
|
0x4e, 0xd0, // jmp (a0) |
697 |
|
|
M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
698 |
gbeauche |
1.1 |
}; |
699 |
|
|
Execute68k((uint32)proc, &r); |
700 |
|
|
WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
701 |
|
|
#else |
702 |
|
|
// Only update cursor |
703 |
|
|
if (HasMacStarted()) { |
704 |
|
|
if (InterruptFlags & INTFLAG_VIA) { |
705 |
|
|
ClearInterruptFlag(INTFLAG_VIA); |
706 |
|
|
ADBInterrupt(); |
707 |
|
|
ExecutePPC(VideoVBL); |
708 |
|
|
} |
709 |
|
|
} |
710 |
|
|
#endif |
711 |
|
|
} |
712 |
|
|
break; |
713 |
|
|
#endif |
714 |
|
|
} |
715 |
|
|
} |
716 |
|
|
|
717 |
|
|
/* |
718 |
|
|
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
719 |
|
|
*/ |
720 |
|
|
|
721 |
gbeauche |
1.2 |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
722 |
|
|
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
723 |
gbeauche |
1.1 |
|
724 |
|
|
// FIXME: Make sure 32-bit relocations are used |
725 |
|
|
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
726 |
gbeauche |
1.2 |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
727 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
728 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
729 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
730 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
731 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
732 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
733 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
734 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
735 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
736 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
737 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
738 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
739 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
740 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
741 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
742 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
743 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
744 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
745 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
746 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
747 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
748 |
|
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
749 |
|
|
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
750 |
|
|
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
751 |
gbeauche |
1.1 |
}; |
752 |
|
|
|
753 |
|
|
static void get_resource(void); |
754 |
|
|
static void get_1_resource(void); |
755 |
|
|
static void get_ind_resource(void); |
756 |
|
|
static void get_1_ind_resource(void); |
757 |
|
|
static void r_get_resource(void); |
758 |
|
|
|
759 |
|
|
#define GPR(REG) current_cpu->gpr(REG) |
760 |
|
|
|
761 |
|
|
static void NativeOp(int selector) |
762 |
|
|
{ |
763 |
|
|
switch (selector) { |
764 |
|
|
case NATIVE_PATCH_NAME_REGISTRY: |
765 |
|
|
DoPatchNameRegistry(); |
766 |
|
|
break; |
767 |
|
|
case NATIVE_VIDEO_INSTALL_ACCEL: |
768 |
|
|
VideoInstallAccel(); |
769 |
|
|
break; |
770 |
|
|
case NATIVE_VIDEO_VBL: |
771 |
|
|
VideoVBL(); |
772 |
|
|
break; |
773 |
|
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
774 |
|
|
GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4), |
775 |
|
|
(void *)GPR(5), GPR(6), GPR(7)); |
776 |
|
|
break; |
777 |
|
|
case NATIVE_GET_RESOURCE: |
778 |
|
|
get_resource(); |
779 |
|
|
break; |
780 |
|
|
case NATIVE_GET_1_RESOURCE: |
781 |
|
|
get_1_resource(); |
782 |
|
|
break; |
783 |
|
|
case NATIVE_GET_IND_RESOURCE: |
784 |
|
|
get_ind_resource(); |
785 |
|
|
break; |
786 |
|
|
case NATIVE_GET_1_IND_RESOURCE: |
787 |
|
|
get_1_ind_resource(); |
788 |
|
|
break; |
789 |
|
|
case NATIVE_R_GET_RESOURCE: |
790 |
|
|
r_get_resource(); |
791 |
|
|
break; |
792 |
|
|
case NATIVE_SERIAL_NOTHING: |
793 |
|
|
case NATIVE_SERIAL_OPEN: |
794 |
|
|
case NATIVE_SERIAL_PRIME_IN: |
795 |
|
|
case NATIVE_SERIAL_PRIME_OUT: |
796 |
|
|
case NATIVE_SERIAL_CONTROL: |
797 |
|
|
case NATIVE_SERIAL_STATUS: |
798 |
|
|
case NATIVE_SERIAL_CLOSE: { |
799 |
|
|
typedef int16 (*SerialCallback)(uint32, uint32); |
800 |
|
|
static const SerialCallback serial_callbacks[] = { |
801 |
|
|
SerialNothing, |
802 |
|
|
SerialOpen, |
803 |
|
|
SerialPrimeIn, |
804 |
|
|
SerialPrimeOut, |
805 |
|
|
SerialControl, |
806 |
|
|
SerialStatus, |
807 |
|
|
SerialClose |
808 |
|
|
}; |
809 |
|
|
GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4)); |
810 |
|
|
break; |
811 |
|
|
} |
812 |
gbeauche |
1.2 |
case NATIVE_DISABLE_INTERRUPT: |
813 |
|
|
DisableInterrupt(); |
814 |
|
|
break; |
815 |
|
|
case NATIVE_ENABLE_INTERRUPT: |
816 |
|
|
EnableInterrupt(); |
817 |
|
|
break; |
818 |
gbeauche |
1.1 |
default: |
819 |
|
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
820 |
|
|
QuitEmulator(); |
821 |
|
|
break; |
822 |
|
|
} |
823 |
|
|
} |
824 |
|
|
|
825 |
|
|
/* |
826 |
|
|
* Execute native subroutine (LR must contain return address) |
827 |
|
|
*/ |
828 |
|
|
|
829 |
|
|
void ExecuteNative(int selector) |
830 |
|
|
{ |
831 |
|
|
uint32 tvect[2]; |
832 |
|
|
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
833 |
|
|
tvect[1] = 0; // Fake TVECT |
834 |
|
|
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
835 |
|
|
M68kRegisters r; |
836 |
|
|
Execute68k((uint32)&desc, &r); |
837 |
|
|
} |
838 |
|
|
|
839 |
|
|
/* |
840 |
|
|
* Execute 68k subroutine (must be ended with EXEC_RETURN) |
841 |
|
|
* This must only be called by the emul_thread when in EMUL_OP mode |
842 |
|
|
* r->a[7] is unused, the routine runs on the caller's stack |
843 |
|
|
*/ |
844 |
|
|
|
845 |
|
|
void Execute68k(uint32 pc, M68kRegisters *r) |
846 |
|
|
{ |
847 |
|
|
current_cpu->execute_68k(pc, r); |
848 |
|
|
} |
849 |
|
|
|
850 |
|
|
/* |
851 |
|
|
* Execute 68k A-Trap from EMUL_OP routine |
852 |
|
|
* r->a[7] is unused, the routine runs on the caller's stack |
853 |
|
|
*/ |
854 |
|
|
|
855 |
|
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
856 |
|
|
{ |
857 |
|
|
uint16 proc[2] = {trap, M68K_RTS}; |
858 |
|
|
Execute68k((uint32)proc, r); |
859 |
|
|
} |
860 |
|
|
|
861 |
|
|
/* |
862 |
|
|
* Call MacOS PPC code |
863 |
|
|
*/ |
864 |
|
|
|
865 |
|
|
uint32 call_macos(uint32 tvect) |
866 |
|
|
{ |
867 |
|
|
return current_cpu->execute_macos_code(tvect, 0, NULL); |
868 |
|
|
} |
869 |
|
|
|
870 |
|
|
uint32 call_macos1(uint32 tvect, uint32 arg1) |
871 |
|
|
{ |
872 |
|
|
const uint32 args[] = { arg1 }; |
873 |
|
|
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
874 |
|
|
} |
875 |
|
|
|
876 |
|
|
uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2) |
877 |
|
|
{ |
878 |
|
|
const uint32 args[] = { arg1, arg2 }; |
879 |
|
|
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
880 |
|
|
} |
881 |
|
|
|
882 |
|
|
uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3) |
883 |
|
|
{ |
884 |
|
|
const uint32 args[] = { arg1, arg2, arg3 }; |
885 |
|
|
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
886 |
|
|
} |
887 |
|
|
|
888 |
|
|
uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4) |
889 |
|
|
{ |
890 |
|
|
const uint32 args[] = { arg1, arg2, arg3, arg4 }; |
891 |
|
|
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
892 |
|
|
} |
893 |
|
|
|
894 |
|
|
uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5) |
895 |
|
|
{ |
896 |
|
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 }; |
897 |
|
|
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
898 |
|
|
} |
899 |
|
|
|
900 |
|
|
uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6) |
901 |
|
|
{ |
902 |
|
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 }; |
903 |
|
|
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
904 |
|
|
} |
905 |
|
|
|
906 |
|
|
uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7) |
907 |
|
|
{ |
908 |
|
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 }; |
909 |
|
|
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
910 |
|
|
} |
911 |
|
|
|
912 |
|
|
/* |
913 |
|
|
* Atomic operations |
914 |
|
|
*/ |
915 |
|
|
|
916 |
|
|
int atomic_add(int *var, int v) |
917 |
|
|
{ |
918 |
|
|
int ret = *var; |
919 |
|
|
*var += v; |
920 |
|
|
return ret; |
921 |
|
|
} |
922 |
|
|
|
923 |
|
|
int atomic_and(int *var, int v) |
924 |
|
|
{ |
925 |
|
|
int ret = *var; |
926 |
|
|
*var &= v; |
927 |
|
|
return ret; |
928 |
|
|
} |
929 |
|
|
|
930 |
|
|
int atomic_or(int *var, int v) |
931 |
|
|
{ |
932 |
|
|
int ret = *var; |
933 |
|
|
*var |= v; |
934 |
|
|
return ret; |
935 |
|
|
} |
936 |
|
|
|
937 |
|
|
/* |
938 |
|
|
* Resource Manager thunks |
939 |
|
|
*/ |
940 |
|
|
|
941 |
|
|
void get_resource(void) |
942 |
|
|
{ |
943 |
|
|
current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
944 |
|
|
} |
945 |
|
|
|
946 |
|
|
void get_1_resource(void) |
947 |
|
|
{ |
948 |
|
|
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
949 |
|
|
} |
950 |
|
|
|
951 |
|
|
void get_ind_resource(void) |
952 |
|
|
{ |
953 |
|
|
current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
954 |
|
|
} |
955 |
|
|
|
956 |
|
|
void get_1_ind_resource(void) |
957 |
|
|
{ |
958 |
|
|
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
959 |
|
|
} |
960 |
|
|
|
961 |
|
|
void r_get_resource(void) |
962 |
|
|
{ |
963 |
|
|
current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
964 |
|
|
} |