| 1 |
/* Interface between the opcode library and its callers. |
| 2 |
Written by Cygnus Support, 1993. |
| 3 |
|
| 4 |
The opcode library (libopcodes.a) provides instruction decoders for |
| 5 |
a large variety of instruction sets, callable with an identical |
| 6 |
interface, for making instruction-processing programs more independent |
| 7 |
of the instruction set being processed. */ |
| 8 |
|
| 9 |
#ifndef DIS_ASM_H |
| 10 |
#define DIS_ASM_H |
| 11 |
|
| 12 |
#include <inttypes.h> |
| 13 |
#include <stdio.h> |
| 14 |
|
| 15 |
typedef int (*fprintf_function)(FILE *f, const char *fmt, ...); |
| 16 |
|
| 17 |
typedef void *PTR; |
| 18 |
typedef uint64_t bfd_vma; |
| 19 |
typedef int64_t bfd_signed_vma; |
| 20 |
typedef uint8_t bfd_byte; |
| 21 |
#define sprintf_vma(s,x) sprintf (s, "%0" PRIx64, x) |
| 22 |
#define snprintf_vma(s,ss,x) snprintf (s, ss, "%0" PRIx64, x) |
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|
| 24 |
#define BFD64 |
| 25 |
|
| 26 |
enum bfd_flavour { |
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bfd_target_unknown_flavour, |
| 28 |
bfd_target_aout_flavour, |
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bfd_target_coff_flavour, |
| 30 |
bfd_target_ecoff_flavour, |
| 31 |
bfd_target_elf_flavour, |
| 32 |
bfd_target_ieee_flavour, |
| 33 |
bfd_target_nlm_flavour, |
| 34 |
bfd_target_oasys_flavour, |
| 35 |
bfd_target_tekhex_flavour, |
| 36 |
bfd_target_srec_flavour, |
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bfd_target_ihex_flavour, |
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bfd_target_som_flavour, |
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bfd_target_os9k_flavour, |
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bfd_target_versados_flavour, |
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bfd_target_msdos_flavour, |
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bfd_target_evax_flavour |
| 43 |
}; |
| 44 |
|
| 45 |
enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN }; |
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|
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enum bfd_architecture |
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{ |
| 49 |
bfd_arch_unknown, /* File arch not known */ |
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bfd_arch_obscure, /* Arch known, not one of these */ |
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bfd_arch_m68k, /* Motorola 68xxx */ |
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#define bfd_mach_m68000 1 |
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#define bfd_mach_m68008 2 |
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#define bfd_mach_m68010 3 |
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#define bfd_mach_m68020 4 |
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#define bfd_mach_m68030 5 |
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#define bfd_mach_m68040 6 |
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#define bfd_mach_m68060 7 |
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#define bfd_mach_cpu32 8 |
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#define bfd_mach_mcf5200 9 |
| 61 |
#define bfd_mach_mcf5206e 10 |
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#define bfd_mach_mcf5307 11 |
| 63 |
#define bfd_mach_mcf5407 12 |
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#define bfd_mach_mcf528x 13 |
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#define bfd_mach_mcfv4e 14 |
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#define bfd_mach_mcf521x 15 |
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#define bfd_mach_mcf5249 16 |
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#define bfd_mach_mcf547x 17 |
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#define bfd_mach_mcf548x 18 |
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bfd_arch_vax, /* DEC Vax */ |
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bfd_arch_i960, /* Intel 960 */ |
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/* The order of the following is important. |
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lower number indicates a machine type that |
| 74 |
only accepts a subset of the instructions |
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available to machines with higher numbers. |
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The exception is the "ca", which is |
| 77 |
incompatible with all other machines except |
| 78 |
"core". */ |
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|
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#define bfd_mach_i960_core 1 |
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#define bfd_mach_i960_ka_sa 2 |
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#define bfd_mach_i960_kb_sb 3 |
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#define bfd_mach_i960_mc 4 |
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#define bfd_mach_i960_xa 5 |
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#define bfd_mach_i960_ca 6 |
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#define bfd_mach_i960_jx 7 |
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#define bfd_mach_i960_hx 8 |
| 88 |
|
| 89 |
bfd_arch_a29k, /* AMD 29000 */ |
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bfd_arch_sparc, /* SPARC */ |
| 91 |
#define bfd_mach_sparc 1 |
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/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */ |
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#define bfd_mach_sparc_sparclet 2 |
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#define bfd_mach_sparc_sparclite 3 |
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#define bfd_mach_sparc_v8plus 4 |
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#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ |
| 97 |
#define bfd_mach_sparc_sparclite_le 6 |
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#define bfd_mach_sparc_v9 7 |
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#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ |
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#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ |
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#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ |
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/* Nonzero if MACH has the v9 instruction set. */ |
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#define bfd_mach_sparc_v9_p(mach) \ |
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((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \ |
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&& (mach) != bfd_mach_sparc_sparclite_le) |
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bfd_arch_mips, /* MIPS Rxxxx */ |
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#define bfd_mach_mips3000 3000 |
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#define bfd_mach_mips3900 3900 |
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#define bfd_mach_mips4000 4000 |
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#define bfd_mach_mips4010 4010 |
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#define bfd_mach_mips4100 4100 |
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#define bfd_mach_mips4300 4300 |
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#define bfd_mach_mips4400 4400 |
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#define bfd_mach_mips4600 4600 |
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#define bfd_mach_mips4650 4650 |
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#define bfd_mach_mips5000 5000 |
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#define bfd_mach_mips6000 6000 |
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#define bfd_mach_mips8000 8000 |
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#define bfd_mach_mips10000 10000 |
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#define bfd_mach_mips16 16 |
| 121 |
bfd_arch_i386, /* Intel 386 */ |
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#define bfd_mach_i386_i386 0 |
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#define bfd_mach_i386_i8086 1 |
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#define bfd_mach_i386_i386_intel_syntax 2 |
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#define bfd_mach_x86_64 3 |
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#define bfd_mach_x86_64_intel_syntax 4 |
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bfd_arch_we32k, /* AT&T WE32xxx */ |
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bfd_arch_tahoe, /* CCI/Harris Tahoe */ |
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bfd_arch_i860, /* Intel 860 */ |
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bfd_arch_romp, /* IBM ROMP PC/RT */ |
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bfd_arch_alliant, /* Alliant */ |
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bfd_arch_convex, /* Convex */ |
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bfd_arch_m88k, /* Motorola 88xxx */ |
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bfd_arch_pyramid, /* Pyramid Technology */ |
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bfd_arch_h8300, /* Hitachi H8/300 */ |
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#define bfd_mach_h8300 1 |
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#define bfd_mach_h8300h 2 |
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#define bfd_mach_h8300s 3 |
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bfd_arch_powerpc, /* PowerPC */ |
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#define bfd_mach_ppc 0 |
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#define bfd_mach_ppc64 1 |
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#define bfd_mach_ppc_403 403 |
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#define bfd_mach_ppc_403gc 4030 |
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#define bfd_mach_ppc_e500 500 |
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#define bfd_mach_ppc_505 505 |
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#define bfd_mach_ppc_601 601 |
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#define bfd_mach_ppc_602 602 |
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#define bfd_mach_ppc_603 603 |
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#define bfd_mach_ppc_ec603e 6031 |
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#define bfd_mach_ppc_604 604 |
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#define bfd_mach_ppc_620 620 |
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#define bfd_mach_ppc_630 630 |
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#define bfd_mach_ppc_750 750 |
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#define bfd_mach_ppc_860 860 |
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#define bfd_mach_ppc_a35 35 |
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#define bfd_mach_ppc_rs64ii 642 |
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#define bfd_mach_ppc_rs64iii 643 |
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#define bfd_mach_ppc_7400 7400 |
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bfd_arch_rs6000, /* IBM RS/6000 */ |
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bfd_arch_hppa, /* HP PA RISC */ |
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#define bfd_mach_hppa10 10 |
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#define bfd_mach_hppa11 11 |
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#define bfd_mach_hppa20 20 |
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#define bfd_mach_hppa20w 25 |
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bfd_arch_d10v, /* Mitsubishi D10V */ |
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bfd_arch_z8k, /* Zilog Z8000 */ |
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#define bfd_mach_z8001 1 |
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#define bfd_mach_z8002 2 |
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bfd_arch_h8500, /* Hitachi H8/500 */ |
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bfd_arch_sh, /* Hitachi SH */ |
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#define bfd_mach_sh 1 |
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#define bfd_mach_sh2 0x20 |
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#define bfd_mach_sh_dsp 0x2d |
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#define bfd_mach_sh2a 0x2a |
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#define bfd_mach_sh2a_nofpu 0x2b |
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#define bfd_mach_sh2e 0x2e |
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#define bfd_mach_sh3 0x30 |
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#define bfd_mach_sh3_nommu 0x31 |
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#define bfd_mach_sh3_dsp 0x3d |
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#define bfd_mach_sh3e 0x3e |
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#define bfd_mach_sh4 0x40 |
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#define bfd_mach_sh4_nofpu 0x41 |
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#define bfd_mach_sh4_nommu_nofpu 0x42 |
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#define bfd_mach_sh4a 0x4a |
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#define bfd_mach_sh4a_nofpu 0x4b |
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#define bfd_mach_sh4al_dsp 0x4d |
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#define bfd_mach_sh5 0x50 |
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bfd_arch_alpha, /* Dec Alpha */ |
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#define bfd_mach_alpha 1 |
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#define bfd_mach_alpha_ev4 0x10 |
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#define bfd_mach_alpha_ev5 0x20 |
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#define bfd_mach_alpha_ev6 0x30 |
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bfd_arch_arm, /* Advanced Risc Machines ARM */ |
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#define bfd_mach_arm_unknown 0 |
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#define bfd_mach_arm_2 1 |
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#define bfd_mach_arm_2a 2 |
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#define bfd_mach_arm_3 3 |
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#define bfd_mach_arm_3M 4 |
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#define bfd_mach_arm_4 5 |
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#define bfd_mach_arm_4T 6 |
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#define bfd_mach_arm_5 7 |
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#define bfd_mach_arm_5T 8 |
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#define bfd_mach_arm_5TE 9 |
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#define bfd_mach_arm_XScale 10 |
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#define bfd_mach_arm_ep9312 11 |
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#define bfd_mach_arm_iWMMXt 12 |
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#define bfd_mach_arm_iWMMXt2 13 |
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bfd_arch_ns32k, /* National Semiconductors ns32000 */ |
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bfd_arch_w65, /* WDC 65816 */ |
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bfd_arch_tic30, /* Texas Instruments TMS320C30 */ |
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bfd_arch_v850, /* NEC V850 */ |
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#define bfd_mach_v850 0 |
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bfd_arch_arc, /* Argonaut RISC Core */ |
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#define bfd_mach_arc_base 0 |
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bfd_arch_m32r, /* Mitsubishi M32R/D */ |
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#define bfd_mach_m32r 0 /* backwards compatibility */ |
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bfd_arch_mn10200, /* Matsushita MN10200 */ |
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bfd_arch_mn10300, /* Matsushita MN10300 */ |
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bfd_arch_cris, /* Axis CRIS */ |
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#define bfd_mach_cris_v0_v10 255 |
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#define bfd_mach_cris_v32 32 |
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#define bfd_mach_cris_v10_v32 1032 |
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bfd_arch_microblaze, /* Xilinx MicroBlaze. */ |
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bfd_arch_ia64, /* HP/Intel ia64 */ |
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#define bfd_mach_ia64_elf64 64 |
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#define bfd_mach_ia64_elf32 32 |
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bfd_arch_last |
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}; |
| 229 |
#define bfd_mach_s390_31 31 |
| 230 |
#define bfd_mach_s390_64 64 |
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|
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typedef struct symbol_cache_entry |
| 233 |
{ |
| 234 |
const char *name; |
| 235 |
union |
| 236 |
{ |
| 237 |
PTR p; |
| 238 |
bfd_vma i; |
| 239 |
} udata; |
| 240 |
} asymbol; |
| 241 |
|
| 242 |
enum dis_insn_type { |
| 243 |
dis_noninsn, /* Not a valid instruction */ |
| 244 |
dis_nonbranch, /* Not a branch instruction */ |
| 245 |
dis_branch, /* Unconditional branch */ |
| 246 |
dis_condbranch, /* Conditional branch */ |
| 247 |
dis_jsr, /* Jump to subroutine */ |
| 248 |
dis_condjsr, /* Conditional jump to subroutine */ |
| 249 |
dis_dref, /* Data reference instruction */ |
| 250 |
dis_dref2 /* Two data references in instruction */ |
| 251 |
}; |
| 252 |
|
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/* This struct is passed into the instruction decoding routine, |
| 254 |
and is passed back out into each callback. The various fields are used |
| 255 |
for conveying information from your main routine into your callbacks, |
| 256 |
for passing information into the instruction decoders (such as the |
| 257 |
addresses of the callback functions), or for passing information |
| 258 |
back from the instruction decoders to their callers. |
| 259 |
|
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It must be initialized before it is first passed; this can be done |
| 261 |
by hand, or using one of the initialization macros below. */ |
| 262 |
|
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typedef struct disassemble_info { |
| 264 |
fprintf_function fprintf_func; |
| 265 |
FILE *stream; |
| 266 |
PTR application_data; |
| 267 |
|
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/* Target description. We could replace this with a pointer to the bfd, |
| 269 |
but that would require one. There currently isn't any such requirement |
| 270 |
so to avoid introducing one we record these explicitly. */ |
| 271 |
/* The bfd_flavour. This can be bfd_target_unknown_flavour. */ |
| 272 |
enum bfd_flavour flavour; |
| 273 |
/* The bfd_arch value. */ |
| 274 |
enum bfd_architecture arch; |
| 275 |
/* The bfd_mach value. */ |
| 276 |
unsigned long mach; |
| 277 |
/* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */ |
| 278 |
enum bfd_endian endian; |
| 279 |
|
| 280 |
/* An array of pointers to symbols either at the location being disassembled |
| 281 |
or at the start of the function being disassembled. The array is sorted |
| 282 |
so that the first symbol is intended to be the one used. The others are |
| 283 |
present for any misc. purposes. This is not set reliably, but if it is |
| 284 |
not NULL, it is correct. */ |
| 285 |
asymbol **symbols; |
| 286 |
/* Number of symbols in array. */ |
| 287 |
int num_symbols; |
| 288 |
|
| 289 |
/* For use by the disassembler. |
| 290 |
The top 16 bits are reserved for public use (and are documented here). |
| 291 |
The bottom 16 bits are for the internal use of the disassembler. */ |
| 292 |
unsigned long flags; |
| 293 |
#define INSN_HAS_RELOC 0x80000000 |
| 294 |
PTR private_data; |
| 295 |
|
| 296 |
/* Function used to get bytes to disassemble. MEMADDR is the |
| 297 |
address of the stuff to be disassembled, MYADDR is the address to |
| 298 |
put the bytes in, and LENGTH is the number of bytes to read. |
| 299 |
INFO is a pointer to this struct. |
| 300 |
Returns an errno value or 0 for success. */ |
| 301 |
int (*read_memory_func) |
| 302 |
(bfd_vma memaddr, bfd_byte *myaddr, int length, |
| 303 |
struct disassemble_info *info); |
| 304 |
|
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/* Function which should be called if we get an error that we can't |
| 306 |
recover from. STATUS is the errno value from read_memory_func and |
| 307 |
MEMADDR is the address that we were trying to read. INFO is a |
| 308 |
pointer to this struct. */ |
| 309 |
void (*memory_error_func) |
| 310 |
(int status, bfd_vma memaddr, struct disassemble_info *info); |
| 311 |
|
| 312 |
/* Function called to print ADDR. */ |
| 313 |
void (*print_address_func) |
| 314 |
(bfd_vma addr, struct disassemble_info *info); |
| 315 |
|
| 316 |
/* Function called to determine if there is a symbol at the given ADDR. |
| 317 |
If there is, the function returns 1, otherwise it returns 0. |
| 318 |
This is used by ports which support an overlay manager where |
| 319 |
the overlay number is held in the top part of an address. In |
| 320 |
some circumstances we want to include the overlay number in the |
| 321 |
address, (normally because there is a symbol associated with |
| 322 |
that address), but sometimes we want to mask out the overlay bits. */ |
| 323 |
int (* symbol_at_address_func) |
| 324 |
(bfd_vma addr, struct disassemble_info * info); |
| 325 |
|
| 326 |
/* These are for buffer_read_memory. */ |
| 327 |
bfd_byte *buffer; |
| 328 |
bfd_vma buffer_vma; |
| 329 |
int buffer_length; |
| 330 |
|
| 331 |
/* This variable may be set by the instruction decoder. It suggests |
| 332 |
the number of bytes objdump should display on a single line. If |
| 333 |
the instruction decoder sets this, it should always set it to |
| 334 |
the same value in order to get reasonable looking output. */ |
| 335 |
int bytes_per_line; |
| 336 |
|
| 337 |
/* the next two variables control the way objdump displays the raw data */ |
| 338 |
/* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */ |
| 339 |
/* output will look like this: |
| 340 |
00: 00000000 00000000 |
| 341 |
with the chunks displayed according to "display_endian". */ |
| 342 |
int bytes_per_chunk; |
| 343 |
enum bfd_endian display_endian; |
| 344 |
|
| 345 |
/* Results from instruction decoders. Not all decoders yet support |
| 346 |
this information. This info is set each time an instruction is |
| 347 |
decoded, and is only valid for the last such instruction. |
| 348 |
|
| 349 |
To determine whether this decoder supports this information, set |
| 350 |
insn_info_valid to 0, decode an instruction, then check it. */ |
| 351 |
|
| 352 |
char insn_info_valid; /* Branch info has been set. */ |
| 353 |
char branch_delay_insns; /* How many sequential insn's will run before |
| 354 |
a branch takes effect. (0 = normal) */ |
| 355 |
char data_size; /* Size of data reference in insn, in bytes */ |
| 356 |
enum dis_insn_type insn_type; /* Type of instruction */ |
| 357 |
bfd_vma target; /* Target address of branch or dref, if known; |
| 358 |
zero if unknown. */ |
| 359 |
bfd_vma target2; /* Second target address for dref2 */ |
| 360 |
|
| 361 |
/* Command line options specific to the target disassembler. */ |
| 362 |
char * disassembler_options; |
| 363 |
|
| 364 |
} disassemble_info; |
| 365 |
|
| 366 |
|
| 367 |
/* Standard disassemblers. Disassemble one instruction at the given |
| 368 |
target address. Return number of bytes processed. */ |
| 369 |
typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *); |
| 370 |
|
| 371 |
int print_insn_tci(bfd_vma, disassemble_info*); |
| 372 |
int print_insn_big_mips (bfd_vma, disassemble_info*); |
| 373 |
int print_insn_little_mips (bfd_vma, disassemble_info*); |
| 374 |
int print_insn_i386 (bfd_vma, disassemble_info*); |
| 375 |
int print_insn_m68k (bfd_vma, disassemble_info*); |
| 376 |
int print_insn_z8001 (bfd_vma, disassemble_info*); |
| 377 |
int print_insn_z8002 (bfd_vma, disassemble_info*); |
| 378 |
int print_insn_h8300 (bfd_vma, disassemble_info*); |
| 379 |
int print_insn_h8300h (bfd_vma, disassemble_info*); |
| 380 |
int print_insn_h8300s (bfd_vma, disassemble_info*); |
| 381 |
int print_insn_h8500 (bfd_vma, disassemble_info*); |
| 382 |
int print_insn_alpha (bfd_vma, disassemble_info*); |
| 383 |
disassembler_ftype arc_get_disassembler (int, int); |
| 384 |
int print_insn_arm (bfd_vma, disassemble_info*); |
| 385 |
int print_insn_sparc (bfd_vma, disassemble_info*); |
| 386 |
int print_insn_big_a29k (bfd_vma, disassemble_info*); |
| 387 |
int print_insn_little_a29k (bfd_vma, disassemble_info*); |
| 388 |
int print_insn_i960 (bfd_vma, disassemble_info*); |
| 389 |
int print_insn_sh (bfd_vma, disassemble_info*); |
| 390 |
int print_insn_shl (bfd_vma, disassemble_info*); |
| 391 |
int print_insn_hppa (bfd_vma, disassemble_info*); |
| 392 |
int print_insn_m32r (bfd_vma, disassemble_info*); |
| 393 |
int print_insn_m88k (bfd_vma, disassemble_info*); |
| 394 |
int print_insn_mn10200 (bfd_vma, disassemble_info*); |
| 395 |
int print_insn_mn10300 (bfd_vma, disassemble_info*); |
| 396 |
int print_insn_ns32k (bfd_vma, disassemble_info*); |
| 397 |
int print_insn_big_powerpc (bfd_vma, disassemble_info*); |
| 398 |
int print_insn_little_powerpc (bfd_vma, disassemble_info*); |
| 399 |
int print_insn_rs6000 (bfd_vma, disassemble_info*); |
| 400 |
int print_insn_w65 (bfd_vma, disassemble_info*); |
| 401 |
int print_insn_d10v (bfd_vma, disassemble_info*); |
| 402 |
int print_insn_v850 (bfd_vma, disassemble_info*); |
| 403 |
int print_insn_tic30 (bfd_vma, disassemble_info*); |
| 404 |
int print_insn_ppc (bfd_vma, disassemble_info*); |
| 405 |
int print_insn_s390 (bfd_vma, disassemble_info*); |
| 406 |
int print_insn_crisv32 (bfd_vma, disassemble_info*); |
| 407 |
int print_insn_crisv10 (bfd_vma, disassemble_info*); |
| 408 |
int print_insn_microblaze (bfd_vma, disassemble_info*); |
| 409 |
int print_insn_ia64 (bfd_vma, disassemble_info*); |
| 410 |
|
| 411 |
#if 0 |
| 412 |
/* Fetch the disassembler for a given BFD, if that support is available. */ |
| 413 |
disassembler_ftype disassembler(bfd *); |
| 414 |
#endif |
| 415 |
|
| 416 |
|
| 417 |
/* This block of definitions is for particular callers who read instructions |
| 418 |
into a buffer before calling the instruction decoder. */ |
| 419 |
|
| 420 |
/* Here is a function which callers may wish to use for read_memory_func. |
| 421 |
It gets bytes from a buffer. */ |
| 422 |
int buffer_read_memory(bfd_vma, bfd_byte *, int, struct disassemble_info *); |
| 423 |
|
| 424 |
/* This function goes with buffer_read_memory. |
| 425 |
It prints a message using info->fprintf_func and info->stream. */ |
| 426 |
void perror_memory(int, bfd_vma, struct disassemble_info *); |
| 427 |
|
| 428 |
|
| 429 |
/* Just print the address in hex. This is included for completeness even |
| 430 |
though both GDB and objdump provide their own (to print symbolic |
| 431 |
addresses). */ |
| 432 |
void generic_print_address(bfd_vma, struct disassemble_info *); |
| 433 |
|
| 434 |
/* Always true. */ |
| 435 |
int generic_symbol_at_address(bfd_vma, struct disassemble_info *); |
| 436 |
|
| 437 |
/* Macro to initialize a disassemble_info struct. This should be called |
| 438 |
by all applications creating such a struct. */ |
| 439 |
#define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \ |
| 440 |
(INFO).flavour = bfd_target_unknown_flavour, \ |
| 441 |
(INFO).arch = bfd_arch_unknown, \ |
| 442 |
(INFO).mach = 0, \ |
| 443 |
(INFO).endian = BFD_ENDIAN_UNKNOWN, \ |
| 444 |
INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) |
| 445 |
|
| 446 |
/* Call this macro to initialize only the internal variables for the |
| 447 |
disassembler. Architecture dependent things such as byte order, or machine |
| 448 |
variant are not touched by this macro. This makes things much easier for |
| 449 |
GDB which must initialize these things separately. */ |
| 450 |
|
| 451 |
#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \ |
| 452 |
(INFO).fprintf_func = (FPRINTF_FUNC), \ |
| 453 |
(INFO).stream = (STREAM), \ |
| 454 |
(INFO).symbols = NULL, \ |
| 455 |
(INFO).num_symbols = 0, \ |
| 456 |
(INFO).private_data = NULL, \ |
| 457 |
(INFO).buffer = NULL, \ |
| 458 |
(INFO).buffer_vma = 0, \ |
| 459 |
(INFO).buffer_length = 0, \ |
| 460 |
(INFO).read_memory_func = buffer_read_memory, \ |
| 461 |
(INFO).memory_error_func = perror_memory, \ |
| 462 |
(INFO).print_address_func = generic_print_address, \ |
| 463 |
(INFO).symbol_at_address_func = generic_symbol_at_address, \ |
| 464 |
(INFO).flags = 0, \ |
| 465 |
(INFO).bytes_per_line = 0, \ |
| 466 |
(INFO).bytes_per_chunk = 0, \ |
| 467 |
(INFO).display_endian = BFD_ENDIAN_UNKNOWN, \ |
| 468 |
(INFO).disassembler_options = NULL, \ |
| 469 |
(INFO).insn_info_valid = 0 |
| 470 |
|
| 471 |
#define _(x) x |
| 472 |
#define ATTRIBUTE_UNUSED __attribute__((unused)) |
| 473 |
|
| 474 |
/* from libbfd */ |
| 475 |
|
| 476 |
bfd_vma bfd_getl64 (const bfd_byte *addr); |
| 477 |
bfd_vma bfd_getl32 (const bfd_byte *addr); |
| 478 |
bfd_vma bfd_getb32 (const bfd_byte *addr); |
| 479 |
bfd_vma bfd_getl16 (const bfd_byte *addr); |
| 480 |
bfd_vma bfd_getb16 (const bfd_byte *addr); |
| 481 |
typedef int bfd_boolean; |
| 482 |
|
| 483 |
#endif /* ! defined (DIS_ASM_H) */ |
