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root/cebix/SheepShaver/src/include/video_defs.h
Revision: 1.6
Committed: 2004-12-19T15:14:22Z (19 years, 11 months ago) by gbeauche
Content type: text/plain
Branch: MAIN
Changes since 1.5: +13 -8 lines
Log Message:
little endian fixes to gamma handling code

File Contents

# User Rev Content
1 cebix 1.1 /*
2     * video_defs.h - MacOS types and structures for video
3     *
4 cebix 1.2 * SheepShaver (C) 1997-2004 Marc Hellwig and Christian Bauer
5 cebix 1.1 *
6     * This program is free software; you can redistribute it and/or modify
7     * it under the terms of the GNU General Public License as published by
8     * the Free Software Foundation; either version 2 of the License, or
9     * (at your option) any later version.
10     *
11     * This program is distributed in the hope that it will be useful,
12     * but WITHOUT ANY WARRANTY; without even the implied warranty of
13     * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14     * GNU General Public License for more details.
15     *
16     * You should have received a copy of the GNU General Public License
17     * along with this program; if not, write to the Free Software
18     * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19     */
20    
21     #ifndef VIDEO_DEFS_H
22     #define VIDEO_DEFS_H
23    
24     #include "macos_util.h"
25 gbeauche 1.5 #include <stddef.h>
26 cebix 1.1
27    
28     /*
29     * Definitions for Display Manager
30     */
31    
32     /* csMode values describing pixel depth in VDSwitchInfo */
33     enum {
34     firstVidMode=128, // first depth mode, representing lowest supported
35     // pixel depth
36     secondVidMode, thirdVidMode, fourthVidMode, fifthVidMode, sixthVidMode
37     // following modes represent pixel depths in ascending
38     // order
39     };
40    
41     /* csDisplayType values in VDDisplayConnectInfoRec */
42     enum {
43     kUnknownConnect=1, // reserved
44     kPanelTFTConnect, // fixed-in-place LCS (TFT, aka "active matrix") panels
45     kFixedModeCRTConnect, // very limited displays
46     kMultiModeCRT1Connect, // 12" optional, 13" default, 16" required
47     kMultiModeCRT2Connect, // 12" optional, 13" req., 16" def., 19" req.
48     kMultiModeCRT3Connect, // 12" optional, 13" req., 16" req., 19" req.,21" def.
49     kMultiModeCRT4Connect, // expansion to large multimode (not yet implemented)
50     kModelessConnect, // expansion to modeless model (not yet implemented)
51     kFullPageConnect, // 640x818 (to get 8bpp in 512K case) and
52     // 640x870 (nothing else supported)
53     kVGAConnect, // 640x480 VGA default -- nothing else req.
54     kNTSCConnect, // NTSC ST(default), FF, STconv, FFconv
55     kPALConnect, // PAL ST(default), FF, STconv, FFconv
56     kHRConnect, // 640x400 (to get 8bpp in 256K case) and
57     // 640x480 (nothing else supported)
58     kPanelFSTNConnect // fixed-in-place LCD FSTN (aka "supertwist") panels
59     };
60    
61     /* csConnectFlags values in VDDisplayConnectInfoRec */
62     enum {
63     kAllModesValid=0, // all display modes not deleted by PrimaryInit code
64     // are optional
65     kAllModesSafe, // all display modes not deleted by PrimaryInit code
66     // are required; is you set this bit, set the
67     // kAllModesValid bit, too
68     kHasDirectConnect=3, // for future expansions, setting this bit means that
69     // your driver can talk directly to the display
70     // (e.g. there is a serial data link via sense lines)
71     kIsMonoDev, // this display does not support color
72     kUncertainConnect // there may not be a display; Monitors control panel
73     // makes the user confirm some operations--like moving
74     // the menu bar-- when this bit is set
75     };
76    
77     /* csTimingFormat value in VDTimingInfoRec */
78     #define kDeclROMtables FOURCC('d','e','c','l') // use information in this record instead of looking
79     // in the decl. ROM for timing info; used for patching
80     // existing card without updating declaration ROM
81    
82     /* csTimingData values in VDTimingInfoRec */
83     enum {
84     timingUnknown = 0, // unknown timing
85     timingApple_512x384_60hz = 130, /* 512x384 (60 Hz) Rubik timing. */
86     timingApple_560x384_60hz = 135, /* 560x384 (60 Hz) Rubik-560 timing. */
87     timingApple_640x480_67hz = 140, /* 640x480 (67 Hz) HR timing. */
88     timingApple_640x400_67hz = 145, /* 640x400 (67 Hz) HR-400 timing. */
89     timingVESA_640x480_60hz = 150, /* 640x480 (60 Hz) VGA timing. */
90     timingVESA_640x480_72hz = 152, /* 640x480 (72 Hz) VGA timing. */
91     timingVESA_640x480_75hz = 154, /* 640x480 (75 Hz) VGA timing. */
92     timingVESA_640x480_85hz = 158, /* 640x480 (85 Hz) VGA timing. */
93     timingGTF_640x480_120hz = 159, /* 640x480 (120 Hz) VESA Generalized Timing Formula */
94     timingApple_640x870_75hz = 160, /* 640x870 (75 Hz) FPD timing.*/
95     timingApple_640x818_75hz = 165, /* 640x818 (75 Hz) FPD-818 timing.*/
96     timingApple_832x624_75hz = 170, /* 832x624 (75 Hz) GoldFish timing.*/
97     timingVESA_800x600_56hz = 180, /* 800x600 (56 Hz) SVGA timing. */
98     timingVESA_800x600_60hz = 182, /* 800x600 (60 Hz) SVGA timing. */
99     timingVESA_800x600_72hz = 184, /* 800x600 (72 Hz) SVGA timing. */
100     timingVESA_800x600_75hz = 186, /* 800x600 (75 Hz) SVGA timing. */
101     timingVESA_800x600_85hz = 188, /* 800x600 (85 Hz) SVGA timing. */
102     timingVESA_1024x768_60hz = 190, /* 1024x768 (60 Hz) VESA 1K-60Hz timing. */
103     timingVESA_1024x768_70hz = 200, /* 1024x768 (70 Hz) VESA 1K-70Hz timing. */
104     timingVESA_1024x768_75hz = 204, /* 1024x768 (75 Hz) VESA 1K-75Hz timing (very similar to timingApple_1024x768_75hz). */
105     timingVESA_1024x768_85hz = 208, /* 1024x768 (85 Hz) VESA timing. */
106     timingApple_1024x768_75hz = 210, /* 1024x768 (75 Hz) Apple 19" RGB. */
107     timingApple_1152x870_75hz = 220, /* 1152x870 (75 Hz) Apple 21" RGB. */
108     timingVESA_1280x960_75hz = 250, /* 1280x960 (75 Hz) */
109     timingVESA_1280x960_60hz = 252, /* 1280x960 (60 Hz) */
110     timingVESA_1280x960_85hz = 254, /* 1280x960 (85 Hz) */
111     timingVESA_1280x1024_60hz = 260, /* 1280x1024 (60 Hz) */
112     timingVESA_1280x1024_75hz = 262, /* 1280x1024 (75 Hz) */
113     timingVESA_1280x1024_85hz = 268, /* 1280x1024 (85 Hz) */
114     timingVESA_1600x1200_60hz = 280, /* 1600x1200 (60 Hz) VESA proposed timing. */
115     timingVESA_1600x1200_65hz = 282, /* 1600x1200 (65 Hz) VESA proposed timing. */
116     timingVESA_1600x1200_70hz = 284, /* 1600x1200 (70 Hz) VESA proposed timing. */
117     timingVESA_1600x1200_75hz = 286, /* 1600x1200 (75 Hz) VESA proposed timing. */
118     timingVESA_1600x1200_80hz = 288, /* 1600x1200 (80 Hz) VESA proposed timing (pixel clock is 216 Mhz dot clock). */
119     timingSMPTE240M_60hz = 400, /* 60Hz V, 33.75KHz H, interlaced timing, 16:9 aspect, typical resolution of 1920x1035. */
120     timingFilmRate_48hz = 410 /* 48Hz V, 25.20KHz H, non-interlaced timing, typical resolution of 640x480. */
121     };
122    
123     /* csTimingFlags values in VDTimingInfoRec */
124     enum {
125     kModeValid=0, // this display mode is optional
126     kModeSafe, // this display mode is required; if you set this
127     // bit, you should also set the kModeValid bit
128     kModeDefault, // this display mode is the default for the attached
129     // display; if you set this bit, you should also set
130     // the kModeSafe and kModeValid bits
131     kShowModeNow, // show this mode in Monitors control panel; useful
132     // for SVGA modes
133     kModeNotResize,
134     kModeRequiresPan
135     };
136    
137     /* code for Display Manager control request */
138     enum {
139     cscReset=0,
140     cscKillIO,
141     cscSetMode,
142     cscSetEntries,
143     cscSetGamma,
144     cscGrayPage,
145     cscGrayScreen=5,
146     cscSetGray,
147     cscSetInterrupt,
148     cscDirectSetEntries,
149     cscSetDefaultMode,
150     cscSwitchMode, // switch to another display mode
151     cscSetSync,
152     cscSavePreferredConfiguration=16,
153     cscSetHardwareCursor=22,
154     cscDrawHardwareCursor,
155     cscSetConvolution,
156     cscSetPowerState,
157     cscPrivateControlCall, // Takes a VDPrivateSelectorDataRec
158     cscSetMultiConnect, // From a GDI point of view, this call should be implemented completely in the HAL and not at all in the core.
159     cscSetClutBehavior, // Takes a VDClutBehavior
160     cscUnusedCall=127 // This call used to expend the scrn resource. Its imbedded data contains more control info
161     };
162    
163     /* Constants for the GetNextResolution call */
164    
165     enum {
166     kDisplayModeIDCurrent = 0x00, /* Reference the Current DisplayModeID */
167     kDisplayModeIDInvalid = (long)0xFFFFFFFF, /* A bogus DisplayModeID in all cases */
168     kDisplayModeIDFindFirstResolution = (long)0xFFFFFFFE, /* Used in cscGetNextResolution to reset iterator */
169     kDisplayModeIDNoMoreResolutions = (long)0xFFFFFFFD /* Used in cscGetNextResolution to indicate End Of List */
170     };
171    
172     /* codes for Display Manager status requests */
173     enum {
174     cscGetMode=2,
175     cscGetEntries,
176     cscGetPageCnt,
177     cscGetPages=4, // This is what C&D 2 calls it.
178     cscGetPageBase,
179     cscGetBaseAddr=5, // This is what C&D 2 calls it.
180     cscGetGray,
181     cscGetInterrupt,
182     cscGetGamma,
183     cscGetDefaultMode,
184     cscGetCurMode, // save the current display mode
185     cscGetSync,
186     cscGetConnection, // return information about display capabilities of
187     // connected display
188     cscGetModeTiming, // return scan timings data for a display mode
189     cscGetModeBaseAddress, // Return base address information about a particular mode
190     cscGetScanProc, // QuickTime scan chasing routine
191     cscGetPreferredConfiguration,
192     cscGetNextResolution,
193     cscGetVideoParameters,
194     cscGetGammaInfoList =20,
195     cscRetrieveGammaTable,
196     cscSupportsHardwareCursor,
197     cscGetHardwareCursorDrawState,
198     cscGetConvolution,
199     cscGetPowerState,
200     cscPrivateStatusCall, // Takes a VDPrivateSelectorDataRec
201     cscGetDDCBlock, // Takes a VDDDCBlockRec
202     cscGetMultiConnect, // From a GDI point of view, this call should be implemented completely in the HAL and not at all in the core.
203     cscGetClutBehavior // Takes a VDClutBehavior
204     };
205    
206     enum { // VDSwitchInfo struct
207     csMode = 0,
208     csData = 2,
209     csPage = 6,
210     csBaseAddr = 8
211     };
212    
213     enum { // VDSetEntry struct
214     csTable = 0, // Pointer to ColorSpec[]
215     csStart = 4,
216     csCount = 6
217     };
218    
219 gbeauche 1.6 enum { // VDGammaRecord
220     csGTable = 0
221     };
222    
223 gbeauche 1.3 enum { // ColorSpec table entry
224     csValue = 0,
225     csRed = 2,
226     csGreen = 4,
227     csBlue = 6
228 cebix 1.1 };
229    
230     enum { // VDVideoParametersInfo struct
231     csDisplayModeID = 0,
232     csDepthMode = 4,
233     csVPBlockPtr = 6,
234     csPageCount = 10,
235     csDeviceType = 14
236     };
237    
238     enum { // VPBlock struct
239     vpBaseOffset = 0,
240     vpRowBytes = 4,
241     vpBounds = 6,
242     vpVersion = 14,
243     vpPackType = 16,
244     vpPackSize = 18,
245     vpHRes = 22,
246     vpVRes = 26,
247     vpPixelType = 30,
248     vpPixelSize = 32,
249     vpCmpCount = 34,
250     vpCmpSize = 36,
251     vpPlaneBytes = 38
252     };
253    
254     enum { // VDDisplayConnectInfo struct
255     csDisplayType = 0,
256     csConnectTaggedType = 2,
257     csConnectTaggedData = 3,
258     csConnectFlags = 4,
259     csDisplayComponent = 8,
260     csConnectReserved = 12
261     };
262    
263     enum { // VDTimingInfo struct
264     csTimingMode = 0,
265     csTimingReserved = 4,
266     csTimingFormat = 8,
267     csTimingData = 12,
268     csTimingFlags = 16
269     };
270    
271     enum { // VDResolutionInfo struct
272     csPreviousDisplayModeID = 0,
273     csRIDisplayModeID = 4,
274     csHorizontalPixels = 8,
275     csVerticalLines = 12,
276     csRefreshRate = 16,
277     csMaxDepthMode = 20,
278     csResolutionFlags = 22
279     };
280    
281     enum { // VDDrawHardwareCursor/VDHardwareCursorDrawState struct
282     csCursorX = 0,
283     csCursorY = 4,
284     csCursorVisible = 8,
285     csCursorSet = 12
286     };
287    
288 gbeauche 1.6 enum { // struct GammaTbl
289     gVersion = 0,
290     gType = 2,
291     gFormulaSize = 4,
292     gChanCnt = 6,
293     gDataCnt = 8,
294     gDataWidth = 10,
295     gFormulaData = 12, // variable size
296     SIZEOF_GammaTbl = 12
297 cebix 1.1 };
298    
299     enum {
300     kCursorImageMajorVersion = 0x0001,
301     kCursorImageMinorVersion = 0x0000
302     };
303    
304     enum { // CursorImage struct
305     ciMajorVersion = 0,
306     ciMinorVersion = 2,
307     ciCursorPixMap = 4, // Handle to PixMap
308     ciCursorBitMask = 8 // Handle to BitMap
309     };
310    
311    
312     /*
313     * Structures for graphics acceleration
314     */
315    
316 gbeauche 1.4 typedef uint32 CTabHandle;
317 cebix 1.1
318     // Parameter block passed to acceleration hooks
319     struct accl_params {
320     uint32 unknown0[3];
321    
322     uint32 transfer_mode;
323     uint32 pen_mode;
324    
325     uint32 unknown1[2];
326    
327     uint32 fore_pen;
328     uint32 back_pen;
329    
330     uint32 unknown2[3];
331    
332     uint32 src_base_addr;
333 gbeauche 1.4 int32 src_row_bytes;
334 cebix 1.1 int16 src_bounds[4];
335     uint32 src_unknown1;
336     uint32 src_pixel_type;
337     uint32 src_pixel_size;
338     uint32 src_cmp_count;
339     uint32 src_cmp_size;
340     CTabHandle src_pm_table;
341     uint32 src_unknown2;
342     uint32 src_unknown3;
343     uint32 src_unknown4;
344    
345     uint32 dest_base_addr;
346 gbeauche 1.4 int32 dest_row_bytes;
347 cebix 1.1 int16 dest_bounds[4];
348     uint32 dest_unknown1;
349     uint32 dest_pixel_type;
350     uint32 dest_pixel_size;
351     uint32 dest_cmp_count;
352     uint32 dest_cmp_size;
353     CTabHandle dest_pm_table;
354     uint32 dest_unknown2;
355     uint32 dest_unknown3;
356     uint32 dest_unknown4;
357    
358     uint32 unknown3[13];
359    
360     int16 src_rect[4];
361     int16 dest_rect[4];
362    
363     uint32 unknown4[38];
364    
365 gbeauche 1.4 uint32 draw_proc;
366 cebix 1.1 // Argument for accl_sync_hook at offset 0x4f8
367 gbeauche 1.5 };
368    
369     enum {
370     acclTransferMode = offsetof(accl_params, transfer_mode),
371     acclPenMode = offsetof(accl_params, pen_mode),
372     acclForePen = offsetof(accl_params, fore_pen),
373     acclBackPen = offsetof(accl_params, back_pen),
374     acclSrcBaseAddr = offsetof(accl_params, src_base_addr),
375     acclSrcRowBytes = offsetof(accl_params, src_row_bytes),
376     acclSrcBoundsRect = offsetof(accl_params, src_bounds),
377     acclSrcPixelType = offsetof(accl_params, src_pixel_type),
378     acclSrcPixelSize = offsetof(accl_params, src_pixel_size),
379     acclSrcCmpCount = offsetof(accl_params, src_cmp_count),
380     acclSrcCmpSize = offsetof(accl_params, src_cmp_size),
381     acclSrcPMTable = offsetof(accl_params, src_pm_table),
382     acclDestBaseAddr = offsetof(accl_params, dest_base_addr),
383     acclDestRowBytes = offsetof(accl_params, dest_row_bytes),
384     acclDestBoundsRect = offsetof(accl_params, dest_bounds),
385     acclDestPixelType = offsetof(accl_params, dest_pixel_type),
386     acclDestPixelSize = offsetof(accl_params, dest_pixel_size),
387     acclDestCmpCount = offsetof(accl_params, dest_cmp_count),
388     acclDestCmpSize = offsetof(accl_params, dest_cmp_size),
389     acclDestPMTable = offsetof(accl_params, dest_pm_table),
390     acclSrcRect = offsetof(accl_params, src_rect),
391     acclDestRect = offsetof(accl_params, dest_rect),
392     acclDrawProc = offsetof(accl_params, draw_proc)
393 cebix 1.1 };
394    
395     // Hook info for NQDMisc
396     struct accl_hook_info {
397 gbeauche 1.4 uint32 draw_func;
398     uint32 sync_func;
399 cebix 1.1 uint32 code;
400     };
401    
402     // Hook function index
403     enum {
404     ACCL_BITBLT,
405     ACCL_BLTMASK,
406     ACCL_FILLRECT,
407     ACCL_FILLMASK
408     // 4: bitblt
409     // 5: lines
410     // 6: fill
411     };
412    
413     #endif