28 |
|
const uint32 POWERPC_BCTR = 0x4e800420; |
29 |
|
const uint32 POWERPC_EMUL_OP = 0x18000000; // Base opcode for EMUL_OP opcodes (only used with PPC emulation) |
30 |
|
|
31 |
+ |
enum { // Selectors for NATIVE_EXEC callbacks (only used with PPC emulation) |
32 |
+ |
NATIVE_PATCH_NAME_REGISTRY, |
33 |
+ |
NATIVE_VIDEO_INSTALL_ACCEL, |
34 |
+ |
NATIVE_VIDEO_VBL, |
35 |
+ |
NATIVE_VIDEO_DO_DRIVER_IO, |
36 |
+ |
NATIVE_ETHER_IRQ, |
37 |
+ |
NATIVE_ETHER_INIT, |
38 |
+ |
NATIVE_ETHER_TERM, |
39 |
+ |
NATIVE_ETHER_OPEN, |
40 |
+ |
NATIVE_ETHER_CLOSE, |
41 |
+ |
NATIVE_ETHER_WPUT, |
42 |
+ |
NATIVE_ETHER_RSRV, |
43 |
+ |
NATIVE_SERIAL_NOTHING, |
44 |
+ |
NATIVE_SERIAL_OPEN, |
45 |
+ |
NATIVE_SERIAL_PRIME_IN, |
46 |
+ |
NATIVE_SERIAL_PRIME_OUT, |
47 |
+ |
NATIVE_SERIAL_CONTROL, |
48 |
+ |
NATIVE_SERIAL_STATUS, |
49 |
+ |
NATIVE_SERIAL_CLOSE, |
50 |
+ |
NATIVE_GET_RESOURCE, |
51 |
+ |
NATIVE_GET_1_RESOURCE, |
52 |
+ |
NATIVE_GET_IND_RESOURCE, |
53 |
+ |
NATIVE_GET_1_IND_RESOURCE, |
54 |
+ |
NATIVE_R_GET_RESOURCE, |
55 |
+ |
NATIVE_DISABLE_INTERRUPT, |
56 |
+ |
NATIVE_ENABLE_INTERRUPT, |
57 |
+ |
NATIVE_MAKE_EXECUTABLE, |
58 |
+ |
NATIVE_OP_MAX |
59 |
+ |
}; |
60 |
+ |
#define POWERPC_NATIVE_OP(SELECTOR) NativeOpTable[SELECTOR] |
61 |
+ |
#define POWERPC_NATIVE_OP_FUNC(SELECTOR) ((uint32)(uintptr)&POWERPC_NATIVE_OP(SELECTOR)) |
62 |
+ |
extern const uint32 NativeOpTable[NATIVE_OP_MAX]; |
63 |
+ |
|
64 |
|
// 68k opcodes |
65 |
|
const uint16 M68K_ILLEGAL = 0x4afc; |
66 |
|
const uint16 M68K_NOP = 0x4e71; |
86 |
|
}; |
87 |
|
const uint16 M68K_EMUL_RETURN = 0xfe40; // Extended opcodes |
88 |
|
const uint16 M68K_EXEC_RETURN = 0xfe41; |
89 |
< |
const uint16 M68K_EMUL_BREAK = 0xfe42; |
89 |
> |
const uint16 M68K_EXEC_NATIVE = 0xfe42; |
90 |
> |
const uint16 M68K_EMUL_BREAK = 0xfe43; |
91 |
|
const uint16 M68K_EMUL_OP_XPRAM1 = M68K_EMUL_BREAK + OP_XPRAM1; |
92 |
|
const uint16 M68K_EMUL_OP_XPRAM2 = M68K_EMUL_BREAK + OP_XPRAM2; |
93 |
|
const uint16 M68K_EMUL_OP_XPRAM3 = M68K_EMUL_BREAK + OP_XPRAM3; |