| 1 |
|
/* |
| 2 |
|
* cpu_emulation.h - Definitions for CPU emulation and Mac memory access |
| 3 |
|
* |
| 4 |
< |
* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
| 4 |
> |
* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
| 5 |
|
* |
| 6 |
|
* This program is free software; you can redistribute it and/or modify |
| 7 |
|
* it under the terms of the GNU General Public License as published by |
| 27 |
|
*/ |
| 28 |
|
|
| 29 |
|
// Constants |
| 30 |
< |
const uint32 ROM_BASE = 0x40800000; // Base address of ROM |
| 31 |
< |
const uint32 ROM_SIZE = 0x00400000; // Size of ROM file |
| 32 |
< |
const uint32 ROM_AREA_SIZE = 0x500000; // Size of ROM area |
| 33 |
< |
const uint32 ROM_END = ROM_BASE + ROM_SIZE; // End of ROM |
| 34 |
< |
const uint32 DR_CACHE_BASE = 0x69000000; // Address of DR cache |
| 35 |
< |
const uint32 DR_CACHE_SIZE = 0x80000; // Size of DR Cache |
| 36 |
< |
const uint32 SHEEP_BASE = 0x60000000; // Address of SheepShaver data |
| 37 |
< |
const uint32 SHEEP_SIZE = 0x40000; // Size of SheepShaver data |
| 38 |
< |
|
| 39 |
< |
const uint32 KERNEL_DATA_BASE = 0x68ffe000; // Address of Kernel Data |
| 40 |
< |
const uint32 KERNEL_DATA2_BASE = 0x5fffe000;// Alternate address of Kernel Data |
| 41 |
< |
const uint32 KERNEL_AREA_SIZE = 0x2000; // Size of Kernel Data area |
| 30 |
> |
const uintptr ROM_BASE = 0x40800000; // Base address of ROM |
| 31 |
> |
const uint32 ROM_SIZE = 0x400000; // Size of ROM file |
| 32 |
> |
const uint32 ROM_AREA_SIZE = 0x500000; // Size of ROM area |
| 33 |
> |
const uintptr ROM_END = ROM_BASE + ROM_SIZE; // End of ROM |
| 34 |
> |
const uintptr DR_CACHE_BASE = 0x69000000; // Address of DR cache |
| 35 |
> |
const uint32 DR_CACHE_SIZE = 0x80000; // Size of DR Cache |
| 36 |
> |
|
| 37 |
> |
const uintptr KERNEL_DATA_BASE = 0x68ffe000; // Address of Kernel Data |
| 38 |
> |
const uintptr KERNEL_DATA2_BASE = 0x5fffe000; // Alternate address of Kernel Data |
| 39 |
> |
const uint32 KERNEL_AREA_SIZE = 0x2000; // Size of Kernel Data area |
| 40 |
|
|
| 41 |
|
// MacOS 68k Emulator Data |
| 42 |
|
struct EmulatorData { |
| 52 |
|
// RAM and ROM pointers (allocated and set by main_*.cpp) |
| 53 |
|
extern uint32 RAMBase; // Base address of Mac RAM |
| 54 |
|
extern uint32 RAMSize; // Size address of Mac RAM |
| 57 |
– |
extern uint32 SheepStack1Base; // SheepShaver first alternate stack base |
| 58 |
– |
extern uint32 SheepStack2Base; // SheepShaver second alternate stack base |
| 59 |
– |
extern uint32 SheepThunksBase; // SheepShaver thunks base |
| 55 |
|
|
| 56 |
|
// Mac memory access functions |
| 57 |
+ |
#if EMULATED_PPC |
| 58 |
+ |
#include "cpu/vm.hpp" |
| 59 |
+ |
static inline uint32 ReadMacInt8(uint32 addr) {return vm_read_memory_1(addr);} |
| 60 |
+ |
static inline void WriteMacInt8(uint32 addr, uint32 v) {vm_write_memory_1(addr, v);} |
| 61 |
+ |
static inline uint32 ReadMacInt16(uint32 addr) {return vm_read_memory_2(addr);} |
| 62 |
+ |
static inline void WriteMacInt16(uint32 addr, uint32 v) {vm_write_memory_2(addr, v);} |
| 63 |
+ |
static inline uint32 ReadMacInt32(uint32 addr) {return vm_read_memory_4(addr);} |
| 64 |
+ |
static inline void WriteMacInt32(uint32 addr, uint32 v) {vm_write_memory_4(addr, v);} |
| 65 |
+ |
static inline uint64 ReadMacInt64(uint32 addr) {return vm_read_memory_8(addr);} |
| 66 |
+ |
static inline void WriteMacInt64(uint32 addr, uint64 v) {vm_write_memory_8(addr, v);} |
| 67 |
+ |
static inline uint8 *Mac2HostAddr(uint32 addr) {return vm_do_get_real_address(addr);} |
| 68 |
+ |
static inline void *Mac_memset(uint32 addr, int c, size_t n) {return vm_memset(addr, c, n);} |
| 69 |
+ |
static inline void *Mac2Host_memcpy(void *dest, uint32 src, size_t n) {return vm_memcpy(dest, src, n);} |
| 70 |
+ |
static inline void *Host2Mac_memcpy(uint32 dest, const void *src, size_t n) {return vm_memcpy(dest, src, n);} |
| 71 |
+ |
static inline void *Mac2Mac_memcpy(uint32 dest, uint32 src, size_t n) {return vm_memcpy(dest, src, n);} |
| 72 |
+ |
#else |
| 73 |
|
static inline uint32 ReadMacInt8(uint32 addr) {return *(uint8 *)addr;} |
| 74 |
|
static inline void WriteMacInt8(uint32 addr, uint32 b) {*(uint8 *)addr = b;} |
| 64 |
– |
#ifdef __i386__ |
| 65 |
– |
static inline uint32 ReadMacInt16(uint32 addr) {uint32 retval; __asm__ ("movzwl %w1,%k0\n\tshll $16,%k0\n\tbswapl %k0\n" : "=&r" (retval) : "m" (*(uint16 *)addr) : "cc"); return retval;} |
| 66 |
– |
static inline uint32 ReadMacInt32(uint32 addr) {uint32 retval; __asm__ ("bswap %0" : "=r" (retval) : "0" (*(uint32 *)addr) : "cc"); return retval;} |
| 67 |
– |
static inline uint64 ReadMacInt64(uint32 addr) {return ((uint64)ReadMacInt32(addr) << 32) | ReadMacInt32(addr + 4);} |
| 68 |
– |
static inline void WriteMacInt16(uint32 addr, uint32 w) {__asm__ ("bswapl %0" : "=&r" (w) : "0" (w << 16) : "cc"); *(uint16 *)addr = w;} |
| 69 |
– |
static inline void WriteMacInt32(uint32 addr, uint32 l) {__asm__ ("bswap %0" : "=r" (l) : "0" (l) : "cc"); *(uint32 *)addr = l;} |
| 70 |
– |
static inline void WriteMacInt64(uint32 addr, uint64 ll) {WriteMacInt32(addr, ll >> 32); WriteMacInt32(addr, ll);} |
| 71 |
– |
#else |
| 75 |
|
static inline uint32 ReadMacInt16(uint32 addr) {return *(uint16 *)addr;} |
| 76 |
|
static inline uint32 ReadMacInt32(uint32 addr) {return *(uint32 *)addr;} |
| 77 |
|
static inline uint64 ReadMacInt64(uint32 addr) {return *(uint64 *)addr;} |
| 78 |
|
static inline void WriteMacInt16(uint32 addr, uint32 w) {*(uint16 *)addr = w;} |
| 79 |
|
static inline void WriteMacInt32(uint32 addr, uint32 l) {*(uint32 *)addr = l;} |
| 80 |
|
static inline void WriteMacInt64(uint32 addr, uint64 ll) {*(uint64 *)addr = ll;} |
| 78 |
– |
#endif |
| 81 |
|
static inline uint8 *Mac2HostAddr(uint32 addr) {return (uint8 *)addr;} |
| 82 |
|
static inline void *Mac_memset(uint32 addr, int c, size_t n) {return memset(Mac2HostAddr(addr), c, n);} |
| 83 |
|
static inline void *Mac2Host_memcpy(void *dest, uint32 src, size_t n) {return memcpy(dest, Mac2HostAddr(src), n);} |
| 84 |
|
static inline void *Host2Mac_memcpy(uint32 dest, const void *src, size_t n) {return memcpy(Mac2HostAddr(dest), src, n);} |
| 85 |
|
static inline void *Mac2Mac_memcpy(uint32 dest, uint32 src, size_t n) {return memcpy(Mac2HostAddr(dest), Mac2HostAddr(src), n);} |
| 86 |
+ |
#endif |
| 87 |
|
|
| 88 |
|
|
| 89 |
|
/* |
| 90 |
|
* 680x0 and PPC emulation |
| 91 |
|
*/ |
| 92 |
|
|
| 93 |
+ |
// 68k procedure helper to write a big endian 16-bit word |
| 94 |
+ |
#ifdef WORDS_BIGENDIAN |
| 95 |
+ |
#define PW(W) W |
| 96 |
+ |
#else |
| 97 |
+ |
#define PW(X) ((((X) >> 8) & 0xff) | (((X) & 0xff) << 8)) |
| 98 |
+ |
#endif |
| 99 |
+ |
|
| 100 |
+ |
// PowerPC procedure helper to write a big-endian 32-bit word |
| 101 |
+ |
#ifdef WORDS_BIGENDIAN |
| 102 |
+ |
#define PL(X) X |
| 103 |
+ |
#else |
| 104 |
+ |
#define PL(X) \ |
| 105 |
+ |
((((X) & 0xff000000) >> 24) | (((X) & 0x00ff0000) >> 8) | \ |
| 106 |
+ |
(((X) & 0x0000ff00) << 8) | (((X) & 0x000000ff) << 24)) |
| 107 |
+ |
#endif |
| 108 |
+ |
|
| 109 |
|
struct M68kRegisters; |
| 110 |
|
extern void Execute68k(uint32, M68kRegisters *r); // Execute 68k subroutine from EMUL_OP routine, must be ended with RTS |
| 111 |
|
extern void Execute68kTrap(uint16 trap, M68kRegisters *r); // Execute 68k A-Trap from EMUL_OP routine |
| 112 |
|
#if EMULATED_PPC |
| 113 |
< |
extern void ExecuteNative(int selector); // Execute native code from EMUL_OP routine (real mode switch) |
| 95 |
< |
#else |
| 96 |
< |
extern void ExecutePPC(void (*func)(void)); // Execute PPC code from EMUL_OP routine (real mode switch) |
| 113 |
> |
extern void FlushCodeCache(uintptr start, uintptr end); // Invalidate emulator caches |
| 114 |
|
#endif |
| 115 |
+ |
extern void ExecuteNative(int selector); // Execute native code from EMUL_OP routine (real mode switch) |
| 116 |
|
|
| 117 |
|
#endif |
