| 1 |
cebix |
1.1 |
/* |
| 2 |
|
|
* cpu_emulation.h - Definitions for CPU emulation and Mac memory access |
| 3 |
|
|
* |
| 4 |
cebix |
1.10 |
* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
| 5 |
cebix |
1.1 |
* |
| 6 |
|
|
* This program is free software; you can redistribute it and/or modify |
| 7 |
|
|
* it under the terms of the GNU General Public License as published by |
| 8 |
|
|
* the Free Software Foundation; either version 2 of the License, or |
| 9 |
|
|
* (at your option) any later version. |
| 10 |
|
|
* |
| 11 |
|
|
* This program is distributed in the hope that it will be useful, |
| 12 |
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 |
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 |
|
|
* GNU General Public License for more details. |
| 15 |
|
|
* |
| 16 |
|
|
* You should have received a copy of the GNU General Public License |
| 17 |
|
|
* along with this program; if not, write to the Free Software |
| 18 |
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 |
|
|
*/ |
| 20 |
|
|
|
| 21 |
|
|
#ifndef CPU_EMULATION_H |
| 22 |
|
|
#define CPU_EMULATION_H |
| 23 |
|
|
|
| 24 |
|
|
|
| 25 |
|
|
/* |
| 26 |
|
|
* Memory system |
| 27 |
|
|
*/ |
| 28 |
|
|
|
| 29 |
|
|
// Constants |
| 30 |
gbeauche |
1.7 |
const uintptr ROM_BASE = 0x40800000; // Base address of ROM |
| 31 |
|
|
const uint32 ROM_SIZE = 0x400000; // Size of ROM file |
| 32 |
|
|
const uint32 ROM_AREA_SIZE = 0x500000; // Size of ROM area |
| 33 |
|
|
const uintptr ROM_END = ROM_BASE + ROM_SIZE; // End of ROM |
| 34 |
gbeauche |
1.12 |
const uintptr DR_EMULATOR_BASE = 0x68070000; // Address of DR emulator code |
| 35 |
|
|
const uint32 DR_EMULATOR_SIZE = 0x10000; // Size of DR emulator code |
| 36 |
gbeauche |
1.7 |
const uintptr DR_CACHE_BASE = 0x69000000; // Address of DR cache |
| 37 |
|
|
const uint32 DR_CACHE_SIZE = 0x80000; // Size of DR Cache |
| 38 |
gbeauche |
1.4 |
|
| 39 |
gbeauche |
1.7 |
const uintptr KERNEL_DATA_BASE = 0x68ffe000; // Address of Kernel Data |
| 40 |
|
|
const uintptr KERNEL_DATA2_BASE = 0x5fffe000; // Alternate address of Kernel Data |
| 41 |
|
|
const uint32 KERNEL_AREA_SIZE = 0x2000; // Size of Kernel Data area |
| 42 |
gbeauche |
1.4 |
|
| 43 |
|
|
// MacOS 68k Emulator Data |
| 44 |
|
|
struct EmulatorData { |
| 45 |
|
|
uint32 v[0x400]; |
| 46 |
|
|
}; |
| 47 |
|
|
|
| 48 |
|
|
// MacOS Kernel Data |
| 49 |
|
|
struct KernelData { |
| 50 |
|
|
uint32 v[0x400]; |
| 51 |
|
|
EmulatorData ed; |
| 52 |
|
|
}; |
| 53 |
cebix |
1.1 |
|
| 54 |
|
|
// RAM and ROM pointers (allocated and set by main_*.cpp) |
| 55 |
|
|
extern uint32 RAMBase; // Base address of Mac RAM |
| 56 |
|
|
extern uint32 RAMSize; // Size address of Mac RAM |
| 57 |
|
|
|
| 58 |
|
|
// Mac memory access functions |
| 59 |
gbeauche |
1.6 |
#if EMULATED_PPC |
| 60 |
|
|
#include "cpu/vm.hpp" |
| 61 |
|
|
static inline uint32 ReadMacInt8(uint32 addr) {return vm_read_memory_1(addr);} |
| 62 |
|
|
static inline void WriteMacInt8(uint32 addr, uint32 v) {vm_write_memory_1(addr, v);} |
| 63 |
|
|
static inline uint32 ReadMacInt16(uint32 addr) {return vm_read_memory_2(addr);} |
| 64 |
|
|
static inline void WriteMacInt16(uint32 addr, uint32 v) {vm_write_memory_2(addr, v);} |
| 65 |
|
|
static inline uint32 ReadMacInt32(uint32 addr) {return vm_read_memory_4(addr);} |
| 66 |
|
|
static inline void WriteMacInt32(uint32 addr, uint32 v) {vm_write_memory_4(addr, v);} |
| 67 |
|
|
static inline uint64 ReadMacInt64(uint32 addr) {return vm_read_memory_8(addr);} |
| 68 |
|
|
static inline void WriteMacInt64(uint32 addr, uint64 v) {vm_write_memory_8(addr, v);} |
| 69 |
|
|
static inline uint8 *Mac2HostAddr(uint32 addr) {return vm_do_get_real_address(addr);} |
| 70 |
|
|
static inline void *Mac_memset(uint32 addr, int c, size_t n) {return vm_memset(addr, c, n);} |
| 71 |
|
|
static inline void *Mac2Host_memcpy(void *dest, uint32 src, size_t n) {return vm_memcpy(dest, src, n);} |
| 72 |
|
|
static inline void *Host2Mac_memcpy(uint32 dest, const void *src, size_t n) {return vm_memcpy(dest, src, n);} |
| 73 |
|
|
static inline void *Mac2Mac_memcpy(uint32 dest, uint32 src, size_t n) {return vm_memcpy(dest, src, n);} |
| 74 |
|
|
#else |
| 75 |
cebix |
1.1 |
static inline uint32 ReadMacInt8(uint32 addr) {return *(uint8 *)addr;} |
| 76 |
|
|
static inline void WriteMacInt8(uint32 addr, uint32 b) {*(uint8 *)addr = b;} |
| 77 |
|
|
static inline uint32 ReadMacInt16(uint32 addr) {return *(uint16 *)addr;} |
| 78 |
|
|
static inline uint32 ReadMacInt32(uint32 addr) {return *(uint32 *)addr;} |
| 79 |
|
|
static inline uint64 ReadMacInt64(uint32 addr) {return *(uint64 *)addr;} |
| 80 |
|
|
static inline void WriteMacInt16(uint32 addr, uint32 w) {*(uint16 *)addr = w;} |
| 81 |
|
|
static inline void WriteMacInt32(uint32 addr, uint32 l) {*(uint32 *)addr = l;} |
| 82 |
|
|
static inline void WriteMacInt64(uint32 addr, uint64 ll) {*(uint64 *)addr = ll;} |
| 83 |
|
|
static inline uint8 *Mac2HostAddr(uint32 addr) {return (uint8 *)addr;} |
| 84 |
|
|
static inline void *Mac_memset(uint32 addr, int c, size_t n) {return memset(Mac2HostAddr(addr), c, n);} |
| 85 |
|
|
static inline void *Mac2Host_memcpy(void *dest, uint32 src, size_t n) {return memcpy(dest, Mac2HostAddr(src), n);} |
| 86 |
|
|
static inline void *Host2Mac_memcpy(uint32 dest, const void *src, size_t n) {return memcpy(Mac2HostAddr(dest), src, n);} |
| 87 |
|
|
static inline void *Mac2Mac_memcpy(uint32 dest, uint32 src, size_t n) {return memcpy(Mac2HostAddr(dest), Mac2HostAddr(src), n);} |
| 88 |
gbeauche |
1.6 |
#endif |
| 89 |
cebix |
1.1 |
|
| 90 |
|
|
|
| 91 |
|
|
/* |
| 92 |
|
|
* 680x0 and PPC emulation |
| 93 |
|
|
*/ |
| 94 |
|
|
|
| 95 |
gbeauche |
1.9 |
// 68k procedure helper to write a big endian 16-bit word |
| 96 |
|
|
#ifdef WORDS_BIGENDIAN |
| 97 |
|
|
#define PW(W) W |
| 98 |
|
|
#else |
| 99 |
|
|
#define PW(X) ((((X) >> 8) & 0xff) | (((X) & 0xff) << 8)) |
| 100 |
|
|
#endif |
| 101 |
|
|
|
| 102 |
gbeauche |
1.11 |
// PowerPC procedure helper to write a big-endian 32-bit word |
| 103 |
|
|
#ifdef WORDS_BIGENDIAN |
| 104 |
|
|
#define PL(X) X |
| 105 |
|
|
#else |
| 106 |
|
|
#define PL(X) \ |
| 107 |
|
|
((((X) & 0xff000000) >> 24) | (((X) & 0x00ff0000) >> 8) | \ |
| 108 |
|
|
(((X) & 0x0000ff00) << 8) | (((X) & 0x000000ff) << 24)) |
| 109 |
|
|
#endif |
| 110 |
|
|
|
| 111 |
cebix |
1.1 |
struct M68kRegisters; |
| 112 |
|
|
extern void Execute68k(uint32, M68kRegisters *r); // Execute 68k subroutine from EMUL_OP routine, must be ended with RTS |
| 113 |
|
|
extern void Execute68kTrap(uint16 trap, M68kRegisters *r); // Execute 68k A-Trap from EMUL_OP routine |
| 114 |
gbeauche |
1.2 |
#if EMULATED_PPC |
| 115 |
gbeauche |
1.5 |
extern void FlushCodeCache(uintptr start, uintptr end); // Invalidate emulator caches |
| 116 |
gbeauche |
1.8 |
#endif |
| 117 |
gbeauche |
1.2 |
extern void ExecuteNative(int selector); // Execute native code from EMUL_OP routine (real mode switch) |
| 118 |
cebix |
1.1 |
|
| 119 |
|
|
#endif |
