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/* |
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* sysdeps.h - System dependent definitions for Linux |
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* |
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* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
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* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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#include <string.h> |
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#include <signal.h> |
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|
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#ifdef HAVE_PTHREADS |
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# include <pthread.h> |
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#endif |
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|
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#ifdef HAVE_FCNTL_H |
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# include <fcntl.h> |
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#endif |
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#define POWERPC_ROM 1 |
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#if EMULATED_PPC |
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// Handle interrupts asynchronously? |
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#define ASYNC_IRQ 0 |
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// Mac ROM is write protected when banked memory is used |
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#if REAL_ADDRESSING || DIRECT_ADDRESSING |
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# define ROM_IS_WRITE_PROTECTED 0 |
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#else |
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# define ROM_IS_WRITE_PROTECTED 1 |
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#endif |
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// Configure PowerPC emulator |
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#define PPC_REENTRANT_JIT 1 |
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#define PPC_CHECK_INTERRUPTS 1 |
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#define PPC_DECODE_CACHE 1 |
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#define PPC_FLIGHT_RECORDER 1 |
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#define PPC_PROFILE_COMPILE_TIME 0 |
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#define PPC_PROFILE_GENERIC_CALLS 0 |
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#define KPX_MAX_CPUS 1 |
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#if defined(__i386__) |
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#define DYNGEN_ASM_OPTS 1 |
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#endif |
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#else |
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// Mac ROM is write protected |
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#define ROM_IS_WRITE_PROTECTED 1 |
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#error "Unsupported size of pointer" |
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#endif |
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// Helper functions to byteswap data |
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/** |
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* Helper functions to byteswap data |
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**/ |
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|
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#if defined(__GNUC__) |
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#if defined(__x86_64__) || defined(__i386__) |
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// Linux/AMD64 currently has no asm optimized bswap_32() in <byteswap.h> |
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#define opt_bswap_32 do_opt_bswap_32 |
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static inline uint32 do_opt_bswap_32(uint32 x) |
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{ |
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uint32 v; |
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__asm__ __volatile__ ("bswap %0" : "=r" (v) : "0" (x)); |
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return v; |
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} |
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#endif |
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#endif |
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|
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#ifdef HAVE_BYTESWAP_H |
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#include <byteswap.h> |
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#endif |
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#ifdef opt_bswap_16 |
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#undef bswap_16 |
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#define bswap_16 opt_bswap_16 |
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#endif |
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#ifndef bswap_16 |
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#define bswap_16 generic_bswap_16 |
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#endif |
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return ((x & 0xff) << 8) | ((x >> 8) & 0xff); |
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} |
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#ifdef opt_bswap_32 |
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#undef bswap_32 |
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#define bswap_32 opt_bswap_32 |
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#endif |
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#ifndef bswap_32 |
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#define bswap_32 generic_bswap_32 |
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#endif |
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((x & 0x000000ff) << 24) ); |
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} |
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#if defined(__i386__) |
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#define opt_bswap_64 do_opt_bswap_64 |
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static inline uint64 do_opt_bswap_64(uint64 x) |
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{ |
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return (bswap_32(x >> 32) | (((uint64)bswap_32((uint32)x)) << 32)); |
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} |
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#endif |
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|
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#ifdef opt_bswap_64 |
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#undef bswap_64 |
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#define bswap_64 opt_bswap_64 |
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#endif |
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#ifndef bswap_64 |
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#define bswap_64 generic_bswap_64 |
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#endif |
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// spin locks |
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#ifdef __GNUC__ |
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#ifdef __powerpc__ |
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#if defined(__powerpc__) || defined(__ppc__) |
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#define HAVE_TEST_AND_SET 1 |
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static inline int testandset(int *p) |
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static inline int testandset(volatile int *p) |
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{ |
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int ret; |
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__asm__ __volatile__("0: lwarx %0,0,%1 ;" |
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" xor. %0,%3,%0;" |
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" bne 1f;" |
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" stwcx. %2,0,%1;" |
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" bne- 0b;" |
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__asm__ __volatile__("0: lwarx %0,0,%1\n" |
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" xor. %0,%3,%0\n" |
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" bne 1f\n" |
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" stwcx. %2,0,%1\n" |
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" bne- 0b\n" |
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"1: " |
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: "=&r" (ret) |
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: "r" (p), "r" (1), "r" (0) |
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} |
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#endif |
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#ifdef __i386__ |
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/* FIXME: SheepShaver occasionnally hangs with those locks */ |
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#if 0 && (defined(__i386__) || defined(__x86_64__)) |
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#define HAVE_TEST_AND_SET 1 |
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static inline int testandset(int *p) |
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static inline int testandset(volatile int *p) |
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{ |
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char ret; |
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long int readval; |
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__asm__ __volatile__("lock; cmpxchgl %3, %1; sete %0" |
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: "=q" (ret), "=m" (*p), "=a" (readval) |
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: "r" (1), "m" (*p), "a" (0) |
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long int ret; |
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/* Note: the "xchg" instruction does not need a "lock" prefix */ |
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__asm__ __volatile__("xchgl %k0, %1" |
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: "=r" (ret), "=m" (*p) |
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: "0" (1), "m" (*p) |
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: "memory"); |
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return ret; |
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} |
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#ifdef __s390__ |
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#define HAVE_TEST_AND_SET 1 |
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static inline int testandset(int *p) |
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static inline int testandset(volatile int *p) |
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{ |
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int ret; |
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#ifdef __alpha__ |
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#define HAVE_TEST_AND_SET 1 |
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static inline int testandset(int *p) |
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static inline int testandset(volatile int *p) |
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{ |
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int ret; |
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unsigned long one; |
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#ifdef __sparc__ |
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#define HAVE_TEST_AND_SET 1 |
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static inline int testandset(int *p) |
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static inline int testandset(volatile int *p) |
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{ |
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int ret; |
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#ifdef __arm__ |
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#define HAVE_TEST_AND_SET 1 |
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static inline int testandset(int *p) |
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static inline int testandset(volatile int *p) |
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{ |
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register unsigned int ret; |
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__asm__ __volatile__("swp %0, %1, [%2]" |
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#endif /* __GNUC__ */ |
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#if HAVE_TEST_AND_SET |
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#define HAVE_SPINLOCKS 1 |
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typedef int spinlock_t; |
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typedef volatile int spinlock_t; |
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const spinlock_t SPIN_LOCK_UNLOCKED = 0; |
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static const spinlock_t SPIN_LOCK_UNLOCKED = 0; |
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|
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#if HAVE_TEST_AND_SET |
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#define HAVE_SPINLOCKS 1 |
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static inline void spin_lock(spinlock_t *lock) |
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{ |
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while (testandset(lock)); |
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{ |
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return !testandset(lock); |
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} |
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#else |
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static inline void spin_lock(spinlock_t *lock) |
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{ |
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} |
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|
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static inline void spin_unlock(spinlock_t *lock) |
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{ |
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} |
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|
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static inline int spin_trylock(spinlock_t *lock) |
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{ |
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return 1; |
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} |
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#endif |
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// Time data type for Time Manager emulation |
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typedef struct timeval tm_time_t; |
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#endif |
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// Timing functions |
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extern uint64 GetTicks_usec(void); |
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extern void Delay_usec(uint32 usec); |
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|
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#if defined(HAVE_PTHREADS) || (defined(__linux__) && defined(__powerpc__)) |
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// Setup pthread attributes |
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extern void Set_pthread_attr(pthread_attr_t *attr, int priority); |
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#endif |
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// Various definitions |
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typedef struct rgb_color { |
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uint8 alpha; |
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} rgb_color; |
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|
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// X11 display fast locks |
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#ifdef HAVE_SPINLOCKS |
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#define X11_LOCK_TYPE spinlock_t |
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#define X11_LOCK_INIT SPIN_LOCK_UNLOCKED |
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#define XDisplayLock() spin_lock(&x_display_lock) |
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#define XDisplayUnlock() spin_unlock(&x_display_lock) |
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#elif defined(HAVE_PTHREADS) |
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#define X11_LOCK_TYPE pthread_mutex_t |
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#define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER |
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#define XDisplayLock() pthread_mutex_lock(&x_display_lock); |
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#define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock); |
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#else |
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#define XDisplayLock() |
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#define XDisplayUnlock() |
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#endif |
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#ifdef X11_LOCK_TYPE |
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extern X11_LOCK_TYPE x_display_lock; |
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#endif |
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|
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// Macro for calling MacOS routines |
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#define CallMacOS(type, tvect) call_macos((uint32)tvect) |
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#define CallMacOS1(type, tvect, arg1) call_macos1((uint32)tvect, (uint32)arg1) |