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root/cebix/SheepShaver/src/Unix/sysdeps.h

Comparing SheepShaver/src/Unix/sysdeps.h (file contents):
Revision 1.7 by gbeauche, 2003-09-29T15:46:07Z vs.
Revision 1.57 by gbeauche, 2008-01-01T09:47:39Z

#	Line 1 | Line 1
1		/*
2		*  sysdeps.h - System dependent definitions for Linux
3		*
4	<	*  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2008 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 41 | Line 41
41		#include <assert.h>
42		#include <stdio.h>
43		#include <stdlib.h>
44	+	#include <stddef.h>
45		#include <string.h>
46		#include <signal.h>
47
48	+	#ifdef HAVE_PTHREADS
49	+	# include <pthread.h>
50	+	#endif
51	+
52		#ifdef HAVE_FCNTL_H
53		# include <fcntl.h>
54		#endif
#	Line 59 | Line 64
64		# endif
65		#endif
66
67	+	// Fix offsetof() on FreeBSD and GCC >= 3.4
68	+	#if defined(__FreeBSD__) && defined(__cplusplus)
69	+	#undef offsetof
70	+	/* The cast to "char &" below avoids problems with user-defined
71	+	"operator &", which can appear in a POD type.  */
72	+	#define offsetof(TYPE, MEMBER)                          \
73	+	(__offsetof__ (reinterpret_cast <size_t>              \
74	+	(&reinterpret_cast <char &>            \
75	+	(static_cast<TYPE *> (0)->MEMBER))))
76	+	#endif
77	+
78		// Define for external components
79		#define SHEEPSHAVER 1
80
81	<	// Mac and host address space are the same
81	>	// Always use Real Addressing mode on native architectures
82	>	// Otherwise, use Direct Addressing mode if NATMEM_OFFSET is set
83	>	#if !defined(EMULATED_PPC)
84	>	#define REAL_ADDRESSING 1
85	>	#include "ppc_asm.tmpl"
86	>	#elif defined(NATMEM_OFFSET)
87	>	#define DIRECT_ADDRESSING 1
88	>	#else
89		#define REAL_ADDRESSING 1
90	+	#endif
91	+
92	+	// Always use the complete non-stubs Ethernet driver
93	+	#define USE_ETHER_FULL_DRIVER 1
94
95		#define POWERPC_ROM 1
96
97		#if EMULATED_PPC
71	–	// Handle interrupts asynchronously?
72	–	#define ASYNC_IRQ 0
98		// Mac ROM is write protected when banked memory is used
99		#if REAL_ADDRESSING || DIRECT_ADDRESSING
100		# define ROM_IS_WRITE_PROTECTED 0
#	Line 77 | Line 102
102		#else
103		# define ROM_IS_WRITE_PROTECTED 1
104		#endif
105	+	// Configure PowerPC emulator
106	+	#define PPC_REENTRANT_JIT 1
107	+	#define PPC_CHECK_INTERRUPTS 1
108	+	#define PPC_DECODE_CACHE 1
109	+	#define PPC_FLIGHT_RECORDER 1
110	+	#define PPC_PROFILE_COMPILE_TIME 0
111	+	#define PPC_PROFILE_GENERIC_CALLS 1
112	+	#define PPC_PROFILE_REGS_USE 0
113	+	#define KPX_MAX_CPUS 1
114	+	#if ENABLE_DYNGEN
115	+	#define PPC_ENABLE_JIT 1
116	+	#endif
117	+	#if defined(__i386__) || defined(__x86_64__)
118	+	#define DYNGEN_ASM_OPTS 1
119	+	#endif
120		#else
121		// Mac ROM is write protected
122		#define ROM_IS_WRITE_PROTECTED 1
#	Line 127 | Line 167 | typedef int64 intptr;
167		#error "Unsupported size of pointer"
168		#endif
169
170	<	// Helper functions to byteswap data
170	>	// Define if the host processor supports fast unaligned load/stores
171	>	#if defined __i386__ || defined __x86_64__
172	>	#define UNALIGNED_PROFITABLE 1
173	>	#endif
174	>
175	>
176	>	/**
177	>	*              Helper functions to byteswap data
178	>	**/
179	>
180	>	#if defined(__GNUC__)
181	>	#if defined(__x86_64__) || defined(__i386__)
182	>	// Linux/AMD64 currently has no asm optimized bswap_32() in <byteswap.h>
183	>	#define opt_bswap_32 do_opt_bswap_32
184	>	static inline uint32 do_opt_bswap_32(uint32 x)
185	>	{
186	>	uint32 v;
187	>	__asm__ __volatile__ ("bswap %0" : "=r" (v) : "0" (x));
188	>	return v;
189	>	}
190	>	#endif
191	>	#endif
192	>
193		#ifdef HAVE_BYTESWAP_H
194		#include <byteswap.h>
195		#endif
196
197	+	#ifdef  opt_bswap_16
198	+	#undef  bswap_16
199	+	#define bswap_16 opt_bswap_16
200	+	#endif
201		#ifndef bswap_16
202		#define bswap_16 generic_bswap_16
203		#endif
#	Line 141 | Line 207 | static inline uint16 generic_bswap_16(ui
207		return ((x & 0xff) << 8) | ((x >> 8) & 0xff);
208		}
209
210	+	#ifdef  opt_bswap_32
211	+	#undef  bswap_32
212	+	#define bswap_32 opt_bswap_32
213	+	#endif
214		#ifndef bswap_32
215		#define bswap_32 generic_bswap_32
216		#endif
#	Line 153 | Line 223 | static inline uint32 generic_bswap_32(ui
223		((x & 0x000000ff) << 24) );
224		}
225
226	+	#if defined(__i386__)
227	+	#define opt_bswap_64 do_opt_bswap_64
228	+	static inline uint64 do_opt_bswap_64(uint64 x)
229	+	{
230	+	return (bswap_32(x >> 32) | (((uint64)bswap_32((uint32)x)) << 32));
231	+	}
232	+	#endif
233	+
234	+	#ifdef  opt_bswap_64
235	+	#undef  bswap_64
236	+	#define bswap_64 opt_bswap_64
237	+	#endif
238		#ifndef bswap_64
239		#define bswap_64 generic_bswap_64
240		#endif
#	Line 182 | Line 264 | static inline uint64 tswap64(uint64 x) {
264		// spin locks
265		#ifdef __GNUC__
266
267	<	#ifdef __powerpc__
267	>	#if defined(__powerpc__) || defined(__ppc__)
268		#define HAVE_TEST_AND_SET 1
269	<	static inline int testandset(int *p)
269	>	static inline int testandset(volatile int *p)
270		{
271		int ret;
272	<	__asm__ __volatile__("0:    lwarx %0,0,%1 ;"
273	<	"      xor. %0,%3,%0;"
274	<	"      bne 1f;"
275	<	"      stwcx. %2,0,%1;"
276	<	"      bne- 0b;"
272	>	__asm__ __volatile__("0:    lwarx       %0,0,%1\n"
273	>	"      xor.    %0,%3,%0\n"
274	>	"      bne             1f\n"
275	>	"      stwcx.  %2,0,%1\n"
276	>	"      bne-    0b\n"
277		"1:    "
278		: "=&r" (ret)
279		: "r" (p), "r" (1), "r" (0)
#	Line 200 | Line 282 | static inline int testandset(int *p)
282		}
283		#endif
284
285	<	#ifdef __i386__
285	>	#if defined(__i386__) || defined(__x86_64__)
286		#define HAVE_TEST_AND_SET 1
287	<	static inline int testandset(int *p)
287	>	static inline int testandset(volatile int *p)
288		{
289	<	char ret;
290	<	long int readval;
291	<
292	<	__asm__ __volatile__("lock; cmpxchgl %3, %1; sete %0"
293	<	: "=q" (ret), "=m" (*p), "=a" (readval)
212	<	: "r" (1), "m" (*p), "a" (0)
289	>	long int ret;
290	>	/* Note: the "xchg" instruction does not need a "lock" prefix */
291	>	__asm__ __volatile__("xchgl %k0, %1"
292	>	: "=r" (ret), "=m" (*p)
293	>	: "0" (1), "m" (*p)
294		: "memory");
295		return ret;
296		}
#	Line 217 | Line 298 | static inline int testandset(int *p)
298
299		#ifdef __s390__
300		#define HAVE_TEST_AND_SET 1
301	<	static inline int testandset(int *p)
301	>	static inline int testandset(volatile int *p)
302		{
303		int ret;
304
#	Line 232 | Line 313 | static inline int testandset(int *p)
313
314		#ifdef __alpha__
315		#define HAVE_TEST_AND_SET 1
316	<	static inline int testandset(int *p)
316	>	static inline int testandset(volatile int *p)
317		{
318		int ret;
319		unsigned long one;
#	Line 252 | Line 333 | static inline int testandset(int *p)
333
334		#ifdef __sparc__
335		#define HAVE_TEST_AND_SET 1
336	<	static inline int testandset(int *p)
336	>	static inline int testandset(volatile int *p)
337		{
338		int ret;
339
#	Line 267 | Line 348 | static inline int testandset(int *p)
348
349		#ifdef __arm__
350		#define HAVE_TEST_AND_SET 1
351	<	static inline int testandset(int *p)
351	>	static inline int testandset(volatile int *p)
352		{
353		register unsigned int ret;
354		__asm__ __volatile__("swp %0, %1, [%2]"
#	Line 280 | Line 361 | static inline int testandset(int *p)
361
362		#endif /* __GNUC__ */
363
364	<	#if HAVE_TEST_AND_SET
284	<	#define HAVE_SPINLOCKS 1
285	<	typedef int spinlock_t;
364	>	typedef volatile int spinlock_t;
365
366	<	const spinlock_t SPIN_LOCK_UNLOCKED = 0;
366	>	static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
367
368	+	#if defined(HAVE_TEST_AND_SET) && defined(HAVE_PTHREADS)
369	+	// There is nothing to lock if we are not in an multithreaded environment
370	+	#define HAVE_SPINLOCKS 1
371		static inline void spin_lock(spinlock_t *lock)
372		{
373		while (testandset(lock));
#	Line 300 | Line 382 | static inline int spin_trylock(spinlock_
382		{
383		return !testandset(lock);
384		}
385	+	#else
386	+	static inline void spin_lock(spinlock_t *lock)
387	+	{
388	+	}
389	+
390	+	static inline void spin_unlock(spinlock_t *lock)
391	+	{
392	+	}
393	+
394	+	static inline int spin_trylock(spinlock_t *lock)
395	+	{
396	+	return 1;
397	+	}
398		#endif
399
400		// Time data type for Time Manager emulation
#	Line 309 | Line 404 | typedef struct timespec tm_time_t;
404		typedef struct timeval tm_time_t;
405		#endif
406
407	+	/* Define codes for all the float formats that we know of.
408	+	* Though we only handle IEEE format.  */
409	+	#define UNKNOWN_FLOAT_FORMAT 0
410	+	#define IEEE_FLOAT_FORMAT 1
411	+	#define VAX_FLOAT_FORMAT 2
412	+	#define IBM_FLOAT_FORMAT 3
413	+	#define C4X_FLOAT_FORMAT 4
414	+
415	+	// High-precision timing
416	+	#if defined(HAVE_PTHREADS) && defined(HAVE_CLOCK_NANOSLEEP)
417	+	#define PRECISE_TIMING 1
418	+	#define PRECISE_TIMING_POSIX 1
419	+	#endif
420	+
421	+	// Timing functions
422	+	extern uint64 GetTicks_usec(void);
423	+	extern void Delay_usec(uint32 usec);
424	+
425	+	#ifdef HAVE_PTHREADS
426		// Setup pthread attributes
427		extern void Set_pthread_attr(pthread_attr_t *attr, int priority);
428	+	#endif
429
430		// Various definitions
431		typedef struct rgb_color {
#	Line 320 | Line 435 | typedef struct rgb_color {
435		uint8           alpha;
436		} rgb_color;
437
438	+	// X11 display fast locks
439	+	#if defined(HAVE_PTHREADS)
440	+	#define X11_LOCK_TYPE pthread_mutex_t
441	+	#define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER
442	+	#define XDisplayLock() pthread_mutex_lock(&x_display_lock);
443	+	#define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock);
444	+	#elif defined(HAVE_SPINLOCKS)
445	+	#define X11_LOCK_TYPE spinlock_t
446	+	#define X11_LOCK_INIT SPIN_LOCK_UNLOCKED
447	+	#define XDisplayLock() spin_lock(&x_display_lock)
448	+	#define XDisplayUnlock() spin_unlock(&x_display_lock)
449	+	#else
450	+	#define XDisplayLock()
451	+	#define XDisplayUnlock()
452	+	#endif
453	+	#ifdef X11_LOCK_TYPE
454	+	extern X11_LOCK_TYPE x_display_lock;
455	+	#endif
456	+
457		// Macro for calling MacOS routines
458	<	#define CallMacOS(type, tvect) call_macos((uint32)tvect)
459	<	#define CallMacOS1(type, tvect, arg1) call_macos1((uint32)tvect, (uint32)arg1)
460	<	#define CallMacOS2(type, tvect, arg1, arg2) call_macos2((uint32)tvect, (uint32)arg1, (uint32)arg2)
461	<	#define CallMacOS3(type, tvect, arg1, arg2, arg3) call_macos3((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3)
462	<	#define CallMacOS4(type, tvect, arg1, arg2, arg3, arg4) call_macos4((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4)
463	<	#define CallMacOS5(type, tvect, arg1, arg2, arg3, arg4, arg5) call_macos5((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5)
464	<	#define CallMacOS6(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6) call_macos6((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5, (uint32)arg6)
465	<	#define CallMacOS7(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6, arg7) call_macos7((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5, (uint32)arg6, (uint32)arg7)
458	>	#define CallMacOS(type, tvect) call_macos((uintptr)tvect)
459	>	#define CallMacOS1(type, tvect, arg1) call_macos1((uintptr)tvect, (uintptr)arg1)
460	>	#define CallMacOS2(type, tvect, arg1, arg2) call_macos2((uintptr)tvect, (uintptr)arg1, (uintptr)arg2)
461	>	#define CallMacOS3(type, tvect, arg1, arg2, arg3) call_macos3((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3)
462	>	#define CallMacOS4(type, tvect, arg1, arg2, arg3, arg4) call_macos4((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4)
463	>	#define CallMacOS5(type, tvect, arg1, arg2, arg3, arg4, arg5) call_macos5((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5)
464	>	#define CallMacOS6(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6) call_macos6((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5, (uintptr)arg6)
465	>	#define CallMacOS7(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6, arg7) call_macos7((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5, (uintptr)arg6, (uintptr)arg7)
466
467		#ifdef __cplusplus
468		extern "C" {

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