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Comparing SheepShaver/src/Unix/sysdeps.h (file contents):
Revision 1.19 by gbeauche, 2003-12-31T18:16:55Z vs.
Revision 1.34 by gbeauche, 2004-11-13T14:09:16Z

# Line 1 | Line 1
1   /*
2   *  sysdeps.h - System dependent definitions for Linux
3   *
4 < *  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4 > *  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5   *
6   *  This program is free software; you can redistribute it and/or modify
7   *  it under the terms of the GNU General Public License as published by
# Line 44 | Line 44
44   #include <string.h>
45   #include <signal.h>
46  
47 + #ifdef HAVE_PTHREADS
48 + # include <pthread.h>
49 + #endif
50 +
51   #ifdef HAVE_FCNTL_H
52   # include <fcntl.h>
53   #endif
# Line 62 | Line 66
66   // Define for external components
67   #define SHEEPSHAVER 1
68  
69 < // Mac and host address space are the same
69 > // Always use Real Addressing mode on native architectures
70 > // Otherwise, use Direct Addressing mode if NATMEM_OFFSET is set
71 > #if NATMEM_OFFSET == 0 || EMULATED_PPC == 0
72   #define REAL_ADDRESSING 1
73 + #else
74 + #define DIRECT_ADDRESSING 1
75 + #endif
76  
77   #define POWERPC_ROM 1
78  
79   #if EMULATED_PPC
71 – // Handle interrupts asynchronously?
72 – #define ASYNC_IRQ 0
80   // Mac ROM is write protected when banked memory is used
81   #if REAL_ADDRESSING || DIRECT_ADDRESSING
82   # define ROM_IS_WRITE_PROTECTED 0
# Line 78 | Line 85
85   # define ROM_IS_WRITE_PROTECTED 1
86   #endif
87   // Configure PowerPC emulator
88 < #define PPC_CHECK_INTERRUPTS (ASYNC_IRQ ? 0 : 1)
88 > #define PPC_REENTRANT_JIT 1
89 > #define PPC_CHECK_INTERRUPTS 1
90   #define PPC_DECODE_CACHE 1
91   #define PPC_FLIGHT_RECORDER 1
92   #define PPC_PROFILE_COMPILE_TIME 0
93   #define PPC_PROFILE_GENERIC_CALLS 0
94   #define KPX_MAX_CPUS 1
95 + #if ENABLE_DYNGEN
96 + // Don't bother with predecode cache when using JIT
97 + #define PPC_ENABLE_JIT 1
98 + #undef  PPC_DECODE_CACHE
99 + #endif
100 + #if defined(__i386__)
101 + #define DYNGEN_ASM_OPTS 1
102 + #endif
103   #else
104   // Mac ROM is write protected
105   #define ROM_IS_WRITE_PROTECTED 1
# Line 139 | Line 155 | typedef int64 intptr;
155   **/
156  
157   #if defined(__GNUC__)
158 < #if defined(__x86_64__)
158 > #if defined(__x86_64__) || defined(__i386__)
159   // Linux/AMD64 currently has no asm optimized bswap_32() in <byteswap.h>
160   #define opt_bswap_32 do_opt_bswap_32
161   static inline uint32 do_opt_bswap_32(uint32 x)
# Line 184 | Line 200 | static inline uint32 generic_bswap_32(ui
200                    ((x & 0x000000ff) << 24) );
201   }
202  
203 + #if defined(__i386__)
204 + #define opt_bswap_64 do_opt_bswap_64
205 + static inline uint64 do_opt_bswap_64(uint64 x)
206 + {
207 +  return (bswap_32(x >> 32) | (((uint64)bswap_32((uint32)x)) << 32));
208 + }
209 + #endif
210 +
211   #ifdef  opt_bswap_64
212   #undef  bswap_64
213   #define bswap_64 opt_bswap_64
# Line 217 | Line 241 | static inline uint64 tswap64(uint64 x) {
241   // spin locks
242   #ifdef __GNUC__
243  
244 < #ifdef __powerpc__
244 > #if defined(__powerpc__) || defined(__ppc__)
245   #define HAVE_TEST_AND_SET 1
246 < static inline int testandset(int *p)
246 > static inline int testandset(volatile int *p)
247   {
248          int ret;
249 <        __asm__ __volatile__("0:    lwarx %0,0,%1 ;"
250 <                                                 "      xor. %0,%3,%0;"
251 <                                                 "      bne 1f;"
252 <                                                 "      stwcx. %2,0,%1;"
253 <                                                 "      bne- 0b;"
249 >        __asm__ __volatile__("0:    lwarx       %0,0,%1\n"
250 >                                                 "      xor.    %0,%3,%0\n"
251 >                                                 "      bne             1f\n"
252 >                                                 "      stwcx.  %2,0,%1\n"
253 >                                                 "      bne-    0b\n"
254                                                   "1:    "
255                                                   : "=&r" (ret)
256                                                   : "r" (p), "r" (1), "r" (0)
# Line 235 | Line 259 | static inline int testandset(int *p)
259   }
260   #endif
261  
262 < #ifdef __i386__
262 > /* FIXME: SheepShaver occasionnally hangs with those locks */
263 > #if 0 && (defined(__i386__) || defined(__x86_64__))
264   #define HAVE_TEST_AND_SET 1
265 < static inline int testandset(int *p)
265 > static inline int testandset(volatile int *p)
266   {
267 <        char ret;
268 <        long int readval;
269 <        
270 <        __asm__ __volatile__("lock; cmpxchgl %3, %1; sete %0"
271 <                                                 : "=q" (ret), "=m" (*p), "=a" (readval)
247 <                                                 : "r" (1), "m" (*p), "a" (0)
267 >        long int ret;
268 >        /* Note: the "xchg" instruction does not need a "lock" prefix */
269 >        __asm__ __volatile__("xchgl %k0, %1"
270 >                                                 : "=r" (ret), "=m" (*p)
271 >                                                 : "0" (1), "m" (*p)
272                                                   : "memory");
273          return ret;
274   }
# Line 252 | Line 276 | static inline int testandset(int *p)
276  
277   #ifdef __s390__
278   #define HAVE_TEST_AND_SET 1
279 < static inline int testandset(int *p)
279 > static inline int testandset(volatile int *p)
280   {
281          int ret;
282  
# Line 267 | Line 291 | static inline int testandset(int *p)
291  
292   #ifdef __alpha__
293   #define HAVE_TEST_AND_SET 1
294 < static inline int testandset(int *p)
294 > static inline int testandset(volatile int *p)
295   {
296          int ret;
297          unsigned long one;
# Line 287 | Line 311 | static inline int testandset(int *p)
311  
312   #ifdef __sparc__
313   #define HAVE_TEST_AND_SET 1
314 < static inline int testandset(int *p)
314 > static inline int testandset(volatile int *p)
315   {
316          int ret;
317  
# Line 302 | Line 326 | static inline int testandset(int *p)
326  
327   #ifdef __arm__
328   #define HAVE_TEST_AND_SET 1
329 < static inline int testandset(int *p)
329 > static inline int testandset(volatile int *p)
330   {
331          register unsigned int ret;
332          __asm__ __volatile__("swp %0, %1, [%2]"
# Line 315 | Line 339 | static inline int testandset(int *p)
339  
340   #endif /* __GNUC__ */
341  
342 < #if HAVE_TEST_AND_SET
319 < #define HAVE_SPINLOCKS 1
320 < typedef int spinlock_t;
342 > typedef volatile int spinlock_t;
343  
344   static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
345  
346 + #if HAVE_TEST_AND_SET
347 + #define HAVE_SPINLOCKS 1
348   static inline void spin_lock(spinlock_t *lock)
349   {
350          while (testandset(lock));
# Line 335 | Line 359 | static inline int spin_trylock(spinlock_
359   {
360          return !testandset(lock);
361   }
362 + #else
363 + static inline void spin_lock(spinlock_t *lock)
364 + {
365 + }
366 +
367 + static inline void spin_unlock(spinlock_t *lock)
368 + {
369 + }
370 +
371 + static inline int spin_trylock(spinlock_t *lock)
372 + {
373 +        return 1;
374 + }
375   #endif
376  
377   // Time data type for Time Manager emulation
# Line 348 | Line 385 | typedef struct timeval tm_time_t;
385   extern uint64 GetTicks_usec(void);
386   extern void Delay_usec(uint32 usec);
387  
388 + #if defined(HAVE_PTHREADS) || (defined(__linux__) && defined(__powerpc__))
389   // Setup pthread attributes
390   extern void Set_pthread_attr(pthread_attr_t *attr, int priority);
391 + #endif
392  
393   // Various definitions
394   typedef struct rgb_color {
# Line 379 | Line 418 | extern X11_LOCK_TYPE x_display_lock;
418   #endif
419  
420   // Macro for calling MacOS routines
421 < #define CallMacOS(type, tvect) call_macos((uint32)tvect)
422 < #define CallMacOS1(type, tvect, arg1) call_macos1((uint32)tvect, (uint32)arg1)
423 < #define CallMacOS2(type, tvect, arg1, arg2) call_macos2((uint32)tvect, (uint32)arg1, (uint32)arg2)
424 < #define CallMacOS3(type, tvect, arg1, arg2, arg3) call_macos3((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3)
425 < #define CallMacOS4(type, tvect, arg1, arg2, arg3, arg4) call_macos4((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4)
426 < #define CallMacOS5(type, tvect, arg1, arg2, arg3, arg4, arg5) call_macos5((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5)
427 < #define CallMacOS6(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6) call_macos6((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5, (uint32)arg6)
428 < #define CallMacOS7(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6, arg7) call_macos7((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5, (uint32)arg6, (uint32)arg7)
421 > #define CallMacOS(type, tvect) call_macos((uintptr)tvect)
422 > #define CallMacOS1(type, tvect, arg1) call_macos1((uintptr)tvect, (uintptr)arg1)
423 > #define CallMacOS2(type, tvect, arg1, arg2) call_macos2((uintptr)tvect, (uintptr)arg1, (uintptr)arg2)
424 > #define CallMacOS3(type, tvect, arg1, arg2, arg3) call_macos3((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3)
425 > #define CallMacOS4(type, tvect, arg1, arg2, arg3, arg4) call_macos4((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4)
426 > #define CallMacOS5(type, tvect, arg1, arg2, arg3, arg4, arg5) call_macos5((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5)
427 > #define CallMacOS6(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6) call_macos6((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5, (uintptr)arg6)
428 > #define CallMacOS7(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6, arg7) call_macos7((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5, (uintptr)arg6, (uintptr)arg7)
429  
430   #ifdef __cplusplus
431   extern "C" {

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