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root/cebix/SheepShaver/src/Unix/sysdeps.h
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Comparing SheepShaver/src/Unix/sysdeps.h (file contents):
Revision 1.16 by gbeauche, 2003-11-28T22:13:49Z vs.
Revision 1.35 by gbeauche, 2004-11-22T22:40:26Z

# Line 1 | Line 1
1   /*
2   *  sysdeps.h - System dependent definitions for Linux
3   *
4 < *  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4 > *  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5   *
6   *  This program is free software; you can redistribute it and/or modify
7   *  it under the terms of the GNU General Public License as published by
# Line 44 | Line 44
44   #include <string.h>
45   #include <signal.h>
46  
47 + #ifdef HAVE_PTHREADS
48 + # include <pthread.h>
49 + #endif
50 +
51   #ifdef HAVE_FCNTL_H
52   # include <fcntl.h>
53   #endif
# Line 62 | Line 66
66   // Define for external components
67   #define SHEEPSHAVER 1
68  
69 < // Mac and host address space are the same
69 > // Always use Real Addressing mode on native architectures
70 > // Otherwise, use Direct Addressing mode if NATMEM_OFFSET is set
71 > #if !defined(EMULATED_PPC)
72 > #define REAL_ADDRESSING 1
73 > #elif defined(__CYGWIN__)
74 > #define DIRECT_ADDRESSING 1
75 > #define DIRECT_ADDRESSING_HACK 1
76 > /*
77 >  The following address translation functions were empirically
78 >  determined on a Windows XP system running Cygwin 1.5.12-1 so
79 >  that RAM size can be maximized (up to 960 MB) and avoiding
80 >  the use of a TLB. This also takes into account reduced address
81 >  space available when the Cygwin runtime is used.
82 > */
83 > #define DIRECT_ADDRESSING_VIRT2PHYS(ADDR) \
84 >        ((ADDR) + (((ADDR)  < 0x41000000) ? 0x39000000 : 0xcf800000))
85 > #define DIRECT_ADDRESSING_PHYS2VIRT(ADDR) \
86 >        ((ADDR) - (((ADDR) >= 0x39000000) ? 0x39000000 : 0xcf800000))
87 > #elif defined(NATMEM_OFFSET)
88 > #define DIRECT_ADDRESSING 1
89 > #else
90   #define REAL_ADDRESSING 1
91 + #endif
92  
93   #define POWERPC_ROM 1
94  
95   #if EMULATED_PPC
71 // Handle interrupts asynchronously?
72 #define ASYNC_IRQ 0
96   // Mac ROM is write protected when banked memory is used
97   #if REAL_ADDRESSING || DIRECT_ADDRESSING
98   # define ROM_IS_WRITE_PROTECTED 0
# Line 78 | Line 101
101   # define ROM_IS_WRITE_PROTECTED 1
102   #endif
103   // Configure PowerPC emulator
104 < #define PPC_CHECK_INTERRUPTS (ASYNC_IRQ ? 0 : 1)
104 > #define PPC_REENTRANT_JIT 1
105 > #define PPC_CHECK_INTERRUPTS 1
106   #define PPC_DECODE_CACHE 1
107   #define PPC_FLIGHT_RECORDER 1
108 < #define PPC_PROFILE_COMPILE_TIME 1
108 > #define PPC_PROFILE_COMPILE_TIME 0
109 > #define PPC_PROFILE_GENERIC_CALLS 0
110   #define KPX_MAX_CPUS 1
111 + #if ENABLE_DYNGEN
112 + // Don't bother with predecode cache when using JIT
113 + #define PPC_ENABLE_JIT 1
114 + #undef  PPC_DECODE_CACHE
115 + #endif
116 + #if defined(__i386__)
117 + #define DYNGEN_ASM_OPTS 1
118 + #endif
119   #else
120   // Mac ROM is write protected
121   #define ROM_IS_WRITE_PROTECTED 1
# Line 138 | Line 171 | typedef int64 intptr;
171   **/
172  
173   #if defined(__GNUC__)
174 < #if defined(__x86_64__)
174 > #if defined(__x86_64__) || defined(__i386__)
175   // Linux/AMD64 currently has no asm optimized bswap_32() in <byteswap.h>
176   #define opt_bswap_32 do_opt_bswap_32
177   static inline uint32 do_opt_bswap_32(uint32 x)
# Line 183 | Line 216 | static inline uint32 generic_bswap_32(ui
216                    ((x & 0x000000ff) << 24) );
217   }
218  
219 + #if defined(__i386__)
220 + #define opt_bswap_64 do_opt_bswap_64
221 + static inline uint64 do_opt_bswap_64(uint64 x)
222 + {
223 +  return (bswap_32(x >> 32) | (((uint64)bswap_32((uint32)x)) << 32));
224 + }
225 + #endif
226 +
227   #ifdef  opt_bswap_64
228   #undef  bswap_64
229   #define bswap_64 opt_bswap_64
# Line 216 | Line 257 | static inline uint64 tswap64(uint64 x) {
257   // spin locks
258   #ifdef __GNUC__
259  
260 < #ifdef __powerpc__
260 > #if defined(__powerpc__) || defined(__ppc__)
261   #define HAVE_TEST_AND_SET 1
262 < static inline int testandset(int *p)
262 > static inline int testandset(volatile int *p)
263   {
264          int ret;
265 <        __asm__ __volatile__("0:    lwarx %0,0,%1 ;"
266 <                                                 "      xor. %0,%3,%0;"
267 <                                                 "      bne 1f;"
268 <                                                 "      stwcx. %2,0,%1;"
269 <                                                 "      bne- 0b;"
265 >        __asm__ __volatile__("0:    lwarx       %0,0,%1\n"
266 >                                                 "      xor.    %0,%3,%0\n"
267 >                                                 "      bne             1f\n"
268 >                                                 "      stwcx.  %2,0,%1\n"
269 >                                                 "      bne-    0b\n"
270                                                   "1:    "
271                                                   : "=&r" (ret)
272                                                   : "r" (p), "r" (1), "r" (0)
# Line 234 | Line 275 | static inline int testandset(int *p)
275   }
276   #endif
277  
278 < #ifdef __i386__
278 > /* FIXME: SheepShaver occasionnally hangs with those locks */
279 > #if 0 && (defined(__i386__) || defined(__x86_64__))
280   #define HAVE_TEST_AND_SET 1
281 < static inline int testandset(int *p)
281 > static inline int testandset(volatile int *p)
282   {
283 <        char ret;
284 <        long int readval;
285 <        
286 <        __asm__ __volatile__("lock; cmpxchgl %3, %1; sete %0"
287 <                                                 : "=q" (ret), "=m" (*p), "=a" (readval)
246 <                                                 : "r" (1), "m" (*p), "a" (0)
283 >        long int ret;
284 >        /* Note: the "xchg" instruction does not need a "lock" prefix */
285 >        __asm__ __volatile__("xchgl %k0, %1"
286 >                                                 : "=r" (ret), "=m" (*p)
287 >                                                 : "0" (1), "m" (*p)
288                                                   : "memory");
289          return ret;
290   }
# Line 251 | Line 292 | static inline int testandset(int *p)
292  
293   #ifdef __s390__
294   #define HAVE_TEST_AND_SET 1
295 < static inline int testandset(int *p)
295 > static inline int testandset(volatile int *p)
296   {
297          int ret;
298  
# Line 266 | Line 307 | static inline int testandset(int *p)
307  
308   #ifdef __alpha__
309   #define HAVE_TEST_AND_SET 1
310 < static inline int testandset(int *p)
310 > static inline int testandset(volatile int *p)
311   {
312          int ret;
313          unsigned long one;
# Line 286 | Line 327 | static inline int testandset(int *p)
327  
328   #ifdef __sparc__
329   #define HAVE_TEST_AND_SET 1
330 < static inline int testandset(int *p)
330 > static inline int testandset(volatile int *p)
331   {
332          int ret;
333  
# Line 301 | Line 342 | static inline int testandset(int *p)
342  
343   #ifdef __arm__
344   #define HAVE_TEST_AND_SET 1
345 < static inline int testandset(int *p)
345 > static inline int testandset(volatile int *p)
346   {
347          register unsigned int ret;
348          __asm__ __volatile__("swp %0, %1, [%2]"
# Line 314 | Line 355 | static inline int testandset(int *p)
355  
356   #endif /* __GNUC__ */
357  
358 < #if HAVE_TEST_AND_SET
318 < #define HAVE_SPINLOCKS 1
319 < typedef int spinlock_t;
358 > typedef volatile int spinlock_t;
359  
360   static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
361  
362 + #if HAVE_TEST_AND_SET
363 + #define HAVE_SPINLOCKS 1
364   static inline void spin_lock(spinlock_t *lock)
365   {
366          while (testandset(lock));
# Line 334 | Line 375 | static inline int spin_trylock(spinlock_
375   {
376          return !testandset(lock);
377   }
378 + #else
379 + static inline void spin_lock(spinlock_t *lock)
380 + {
381 + }
382 +
383 + static inline void spin_unlock(spinlock_t *lock)
384 + {
385 + }
386 +
387 + static inline int spin_trylock(spinlock_t *lock)
388 + {
389 +        return 1;
390 + }
391   #endif
392  
393   // Time data type for Time Manager emulation
# Line 343 | Line 397 | typedef struct timespec tm_time_t;
397   typedef struct timeval tm_time_t;
398   #endif
399  
400 + // Timing functions
401 + extern uint64 GetTicks_usec(void);
402 + extern void Delay_usec(uint32 usec);
403 +
404 + #if defined(HAVE_PTHREADS) || (defined(__linux__) && defined(__powerpc__))
405   // Setup pthread attributes
406   extern void Set_pthread_attr(pthread_attr_t *attr, int priority);
407 + #endif
408  
409   // Various definitions
410   typedef struct rgb_color {
# Line 354 | Line 414 | typedef struct rgb_color {
414          uint8           alpha;
415   } rgb_color;
416  
417 + // X11 display fast locks
418 + #ifdef HAVE_SPINLOCKS
419 + #define X11_LOCK_TYPE spinlock_t
420 + #define X11_LOCK_INIT SPIN_LOCK_UNLOCKED
421 + #define XDisplayLock() spin_lock(&x_display_lock)
422 + #define XDisplayUnlock() spin_unlock(&x_display_lock)
423 + #elif defined(HAVE_PTHREADS)
424 + #define X11_LOCK_TYPE pthread_mutex_t
425 + #define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER
426 + #define XDisplayLock() pthread_mutex_lock(&x_display_lock);
427 + #define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock);
428 + #else
429 + #define XDisplayLock()
430 + #define XDisplayUnlock()
431 + #endif
432 + #ifdef X11_LOCK_TYPE
433 + extern X11_LOCK_TYPE x_display_lock;
434 + #endif
435 +
436   // Macro for calling MacOS routines
437 < #define CallMacOS(type, tvect) call_macos((uint32)tvect)
438 < #define CallMacOS1(type, tvect, arg1) call_macos1((uint32)tvect, (uint32)arg1)
439 < #define CallMacOS2(type, tvect, arg1, arg2) call_macos2((uint32)tvect, (uint32)arg1, (uint32)arg2)
440 < #define CallMacOS3(type, tvect, arg1, arg2, arg3) call_macos3((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3)
441 < #define CallMacOS4(type, tvect, arg1, arg2, arg3, arg4) call_macos4((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4)
442 < #define CallMacOS5(type, tvect, arg1, arg2, arg3, arg4, arg5) call_macos5((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5)
443 < #define CallMacOS6(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6) call_macos6((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5, (uint32)arg6)
444 < #define CallMacOS7(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6, arg7) call_macos7((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5, (uint32)arg6, (uint32)arg7)
437 > #define CallMacOS(type, tvect) call_macos((uintptr)tvect)
438 > #define CallMacOS1(type, tvect, arg1) call_macos1((uintptr)tvect, (uintptr)arg1)
439 > #define CallMacOS2(type, tvect, arg1, arg2) call_macos2((uintptr)tvect, (uintptr)arg1, (uintptr)arg2)
440 > #define CallMacOS3(type, tvect, arg1, arg2, arg3) call_macos3((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3)
441 > #define CallMacOS4(type, tvect, arg1, arg2, arg3, arg4) call_macos4((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4)
442 > #define CallMacOS5(type, tvect, arg1, arg2, arg3, arg4, arg5) call_macos5((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5)
443 > #define CallMacOS6(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6) call_macos6((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5, (uintptr)arg6)
444 > #define CallMacOS7(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6, arg7) call_macos7((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5, (uintptr)arg6, (uintptr)arg7)
445  
446   #ifdef __cplusplus
447   extern "C" {

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