ViewVC Help
View File | Revision Log | Show Annotations | Revision Graph | Root Listing
root/cebix/SheepShaver/src/Unix/sysdeps.h
(Generate patch)

Comparing SheepShaver/src/Unix/sysdeps.h (file contents):
Revision 1.13 by gbeauche, 2003-10-26T14:16:37Z vs.
Revision 1.33 by gbeauche, 2004-06-15T21:37:22Z

# Line 1 | Line 1
1   /*
2   *  sysdeps.h - System dependent definitions for Linux
3   *
4 < *  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4 > *  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5   *
6   *  This program is free software; you can redistribute it and/or modify
7   *  it under the terms of the GNU General Public License as published by
# Line 44 | Line 44
44   #include <string.h>
45   #include <signal.h>
46  
47 + #ifdef HAVE_PTHREADS
48 + # include <pthread.h>
49 + #endif
50 +
51   #ifdef HAVE_FCNTL_H
52   # include <fcntl.h>
53   #endif
# Line 68 | Line 72
72   #define POWERPC_ROM 1
73  
74   #if EMULATED_PPC
71 // Handle interrupts asynchronously?
72 #define ASYNC_IRQ 0
75   // Mac ROM is write protected when banked memory is used
76   #if REAL_ADDRESSING || DIRECT_ADDRESSING
77   # define ROM_IS_WRITE_PROTECTED 0
# Line 78 | Line 80
80   # define ROM_IS_WRITE_PROTECTED 1
81   #endif
82   // Configure PowerPC emulator
83 < #define PPC_CHECK_INTERRUPTS (ASYNC_IRQ ? 0 : 1)
84 < #define PPC_NO_LAZY_PC_UPDATE 1
85 < //#define PPC_NO_DECODE_CACHE 1
83 > #define PPC_REENTRANT_JIT 1
84 > #define PPC_CHECK_INTERRUPTS 1
85 > #define PPC_DECODE_CACHE 1
86   #define PPC_FLIGHT_RECORDER 1
87 + #define PPC_PROFILE_COMPILE_TIME 0
88 + #define PPC_PROFILE_GENERIC_CALLS 0
89 + #define KPX_MAX_CPUS 1
90 + #if ENABLE_DYNGEN
91 + // Don't bother with predecode cache when using JIT
92 + #define PPC_ENABLE_JIT 1
93 + #undef  PPC_DECODE_CACHE
94 + #endif
95 + #if defined(__i386__)
96 + #define DYNGEN_ASM_OPTS 1
97 + #endif
98   #else
99   // Mac ROM is write protected
100   #define ROM_IS_WRITE_PROTECTED 1
# Line 132 | Line 145 | typedef int64 intptr;
145   #error "Unsupported size of pointer"
146   #endif
147  
148 < // Helper functions to byteswap data
148 > /**
149 > *              Helper functions to byteswap data
150 > **/
151 >
152 > #if defined(__GNUC__)
153 > #if defined(__x86_64__) || defined(__i386__)
154 > // Linux/AMD64 currently has no asm optimized bswap_32() in <byteswap.h>
155 > #define opt_bswap_32 do_opt_bswap_32
156 > static inline uint32 do_opt_bswap_32(uint32 x)
157 > {
158 >  uint32 v;
159 >  __asm__ __volatile__ ("bswap %0" : "=r" (v) : "0" (x));
160 >  return v;
161 > }
162 > #endif
163 > #endif
164 >
165   #ifdef HAVE_BYTESWAP_H
166   #include <byteswap.h>
167   #endif
168  
169 + #ifdef  opt_bswap_16
170 + #undef  bswap_16
171 + #define bswap_16 opt_bswap_16
172 + #endif
173   #ifndef bswap_16
174   #define bswap_16 generic_bswap_16
175   #endif
# Line 146 | Line 179 | static inline uint16 generic_bswap_16(ui
179    return ((x & 0xff) << 8) | ((x >> 8) & 0xff);
180   }
181  
182 + #ifdef  opt_bswap_32
183 + #undef  bswap_32
184 + #define bswap_32 opt_bswap_32
185 + #endif
186   #ifndef bswap_32
187   #define bswap_32 generic_bswap_32
188   #endif
# Line 158 | Line 195 | static inline uint32 generic_bswap_32(ui
195                    ((x & 0x000000ff) << 24) );
196   }
197  
198 + #if defined(__i386__)
199 + #define opt_bswap_64 do_opt_bswap_64
200 + static inline uint64 do_opt_bswap_64(uint64 x)
201 + {
202 +  return (bswap_32(x >> 32) | (((uint64)bswap_32((uint32)x)) << 32));
203 + }
204 + #endif
205 +
206 + #ifdef  opt_bswap_64
207 + #undef  bswap_64
208 + #define bswap_64 opt_bswap_64
209 + #endif
210   #ifndef bswap_64
211   #define bswap_64 generic_bswap_64
212   #endif
# Line 187 | Line 236 | static inline uint64 tswap64(uint64 x) {
236   // spin locks
237   #ifdef __GNUC__
238  
239 < #ifdef __powerpc__
239 > #if defined(__powerpc__) || defined(__ppc__)
240   #define HAVE_TEST_AND_SET 1
241 < static inline int testandset(int *p)
241 > static inline int testandset(volatile int *p)
242   {
243          int ret;
244 <        __asm__ __volatile__("0:    lwarx %0,0,%1 ;"
245 <                                                 "      xor. %0,%3,%0;"
246 <                                                 "      bne 1f;"
247 <                                                 "      stwcx. %2,0,%1;"
248 <                                                 "      bne- 0b;"
244 >        __asm__ __volatile__("0:    lwarx       %0,0,%1\n"
245 >                                                 "      xor.    %0,%3,%0\n"
246 >                                                 "      bne             1f\n"
247 >                                                 "      stwcx.  %2,0,%1\n"
248 >                                                 "      bne-    0b\n"
249                                                   "1:    "
250                                                   : "=&r" (ret)
251                                                   : "r" (p), "r" (1), "r" (0)
# Line 205 | Line 254 | static inline int testandset(int *p)
254   }
255   #endif
256  
257 < #ifdef __i386__
257 > /* FIXME: SheepShaver occasionnally hangs with those locks */
258 > #if 0 && (defined(__i386__) || defined(__x86_64__))
259   #define HAVE_TEST_AND_SET 1
260 < static inline int testandset(int *p)
260 > static inline int testandset(volatile int *p)
261   {
262 <        char ret;
263 <        long int readval;
264 <        
265 <        __asm__ __volatile__("lock; cmpxchgl %3, %1; sete %0"
266 <                                                 : "=q" (ret), "=m" (*p), "=a" (readval)
217 <                                                 : "r" (1), "m" (*p), "a" (0)
262 >        long int ret;
263 >        /* Note: the "xchg" instruction does not need a "lock" prefix */
264 >        __asm__ __volatile__("xchgl %k0, %1"
265 >                                                 : "=r" (ret), "=m" (*p)
266 >                                                 : "0" (1), "m" (*p)
267                                                   : "memory");
268          return ret;
269   }
# Line 222 | Line 271 | static inline int testandset(int *p)
271  
272   #ifdef __s390__
273   #define HAVE_TEST_AND_SET 1
274 < static inline int testandset(int *p)
274 > static inline int testandset(volatile int *p)
275   {
276          int ret;
277  
# Line 237 | Line 286 | static inline int testandset(int *p)
286  
287   #ifdef __alpha__
288   #define HAVE_TEST_AND_SET 1
289 < static inline int testandset(int *p)
289 > static inline int testandset(volatile int *p)
290   {
291          int ret;
292          unsigned long one;
# Line 257 | Line 306 | static inline int testandset(int *p)
306  
307   #ifdef __sparc__
308   #define HAVE_TEST_AND_SET 1
309 < static inline int testandset(int *p)
309 > static inline int testandset(volatile int *p)
310   {
311          int ret;
312  
# Line 272 | Line 321 | static inline int testandset(int *p)
321  
322   #ifdef __arm__
323   #define HAVE_TEST_AND_SET 1
324 < static inline int testandset(int *p)
324 > static inline int testandset(volatile int *p)
325   {
326          register unsigned int ret;
327          __asm__ __volatile__("swp %0, %1, [%2]"
# Line 285 | Line 334 | static inline int testandset(int *p)
334  
335   #endif /* __GNUC__ */
336  
337 < #if HAVE_TEST_AND_SET
289 < #define HAVE_SPINLOCKS 1
290 < typedef int spinlock_t;
337 > typedef volatile int spinlock_t;
338  
339   static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
340  
341 + #if HAVE_TEST_AND_SET
342 + #define HAVE_SPINLOCKS 1
343   static inline void spin_lock(spinlock_t *lock)
344   {
345          while (testandset(lock));
# Line 305 | Line 354 | static inline int spin_trylock(spinlock_
354   {
355          return !testandset(lock);
356   }
357 + #else
358 + static inline void spin_lock(spinlock_t *lock)
359 + {
360 + }
361 +
362 + static inline void spin_unlock(spinlock_t *lock)
363 + {
364 + }
365 +
366 + static inline int spin_trylock(spinlock_t *lock)
367 + {
368 +        return 1;
369 + }
370   #endif
371  
372   // Time data type for Time Manager emulation
# Line 314 | Line 376 | typedef struct timespec tm_time_t;
376   typedef struct timeval tm_time_t;
377   #endif
378  
379 + // Timing functions
380 + extern uint64 GetTicks_usec(void);
381 + extern void Delay_usec(uint32 usec);
382 +
383 + #if defined(HAVE_PTHREADS) || (defined(__linux__) && defined(__powerpc__))
384   // Setup pthread attributes
385   extern void Set_pthread_attr(pthread_attr_t *attr, int priority);
386 + #endif
387  
388   // Various definitions
389   typedef struct rgb_color {
# Line 325 | Line 393 | typedef struct rgb_color {
393          uint8           alpha;
394   } rgb_color;
395  
396 + // X11 display fast locks
397 + #ifdef HAVE_SPINLOCKS
398 + #define X11_LOCK_TYPE spinlock_t
399 + #define X11_LOCK_INIT SPIN_LOCK_UNLOCKED
400 + #define XDisplayLock() spin_lock(&x_display_lock)
401 + #define XDisplayUnlock() spin_unlock(&x_display_lock)
402 + #elif defined(HAVE_PTHREADS)
403 + #define X11_LOCK_TYPE pthread_mutex_t
404 + #define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER
405 + #define XDisplayLock() pthread_mutex_lock(&x_display_lock);
406 + #define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock);
407 + #else
408 + #define XDisplayLock()
409 + #define XDisplayUnlock()
410 + #endif
411 + #ifdef X11_LOCK_TYPE
412 + extern X11_LOCK_TYPE x_display_lock;
413 + #endif
414 +
415   // Macro for calling MacOS routines
416   #define CallMacOS(type, tvect) call_macos((uint32)tvect)
417   #define CallMacOS1(type, tvect, arg1) call_macos1((uint32)tvect, (uint32)arg1)

Diff Legend

Removed lines
+ Added lines
< Changed lines
> Changed lines