ViewVC Help
View File | Revision Log | Show Annotations | Revision Graph | Root Listing
root/cebix/SheepShaver/src/Unix/ppc_asm.tmpl
Revision: 1.8
Committed: 2009-08-18T18:26:11Z (15 years, 2 months ago) by asvitkine
Branch: MAIN
CVS Tags: HEAD
Changes since 1.7: +2 -2 lines
Log Message:
[Michael Schmitt]
Attached is a patch to SheepShaver to fix memory allocation problems when OS X 10.5 is the host. It also relaxes the 512 MB RAM limit on OS X hosts.


Problem
-------
Some users have been unable to run SheepShaver on OS X 10.5 (Leopard) hosts. The symptom is error "ERROR: Cannot map RAM: File already exists".

SheepShaver allocates RAM at fixed addresses. If it is running in "Real" addressing mode, and can't allocate at address 0, then it was hard-coded to allocate the RAM area at 0x20000000. The ROM area as allocated at 0x40800000.

The normal configuration is for SheepShaver to run under SDL, which is a Cocoa wrapper. By the time SheepShaver does its memory allocations, the Cocoa application has already started. The result is the SheepShaver memory address space already contains libraries, fonts, Input Managers, and IOKit areas.

On Leopard hosts these areas can land on the same addresses SheepShaver needs, so SheepShaver's memory allocation fails.


Solution
--------
The approach is to change SheepShaver (on Unix & OS X hosts) to allocate the RAM area anywhere it can find the space, rather than at a fixed address.

This could result in the RAM allocated higher than the ROM area, which causes a crash. To prevent this from occurring, the RAM and ROM areas are allocated contiguously.

Previously the ROM starting address was a constant ROM_BASE, which was used throughout the source files. The ROM start address is now a variable ROMBase. ROMBase is allocated and set by main_*.cpp just like RAMBase.

A side-effect of this change is that it lifts the 512 MB RAM limit for OS X hosts. The limit was because the fixed RAM and ROM addresses were such that the RAM could only be 512 MB before it overlapped the ROM area.


Impact
------
The change to make ROMBase a variable is throughout all hosts & addressing modes.

The RAM and ROM areas will only shift when run on Unix & OS X hosts, otherwise the same fixed allocation address is used as before.

This change is limited to "Real" addressing mode. Unlike Basilisk II, SheepShaver *pre-calculates* the offset for "Direct" addressing mode; the offset is compiled into the program. If the RAM address were allowed to shift, it could result in the RAM area wrapping around address 0.


Changes to main_unix.cpp
------------------------
1. Real addressing mode no longer defines a RAM_BASE constant.

2. The base address of the Mac ROM (ROMBase) is defined and exported by this program.

3. Memory management helper vm_mac_acquire is renamed to vm_mac_acquire_fixed. Added a new memory management helper vm_mac_acquire, which allocates memory at any address.

4. Changed and rearranged the allocation of RAM and ROM areas.

Before it worked like this:

  - Allocate ROM area
  - If can, attempt to allocate RAM at address zero
  - If RAM not allocated at 0, allocate at fixed address

We still want to try allocating the RAM at zero, and if using DIRECT addressing we're still going to use the fixed addresses. So we don't know where the ROM should be until after we do the RAM. The new logic is:

  - If can, attempt to allocate RAM at address zero
  - If RAM not allocated at 0
      if REAL addressing
         allocate RAM and ROM together. The ROM address is aligned to a 1 MB boundary
      else (direct addressing)
         allocate RAM at fixed address
  - If ROM hasn't been allocated yet, allocate at fixed address

5. Calculate ROMBase and ROMBaseHost based on where the ROM was loaded.

6. There is a crash if the RAM is allocated too high. To try and catch this, check if it was allocated higher than the kernel data address.

7. Change subsequent code from using constant ROM_BASE to variable ROMBase.


Changes to Other Programs
-------------------------
emul_op.cpp, main.cpp, name_registery.cpp, rom_patches.cpp, rsrc_patches.cpp, emul_ppc.cpp, sheepshaver_glue.cpp, ppc-translate-cpp:
Change from constant ROM_BASE to variable ROMBase.

ppc_asm.S: It was setting register to a hard-coded literal address: 0x40b0d000. Changed to set it to ROMBase + 0x30d000.

ppc_asm.tmpl: It defined a macro ASM_LO16 but it assumed that the macro would always be used with operands that included a register specification. This is not true. Moved the register specification from the macro to the macro invocations.

main_beos.cpp, main_windows.cpp: Since the subprograms are all expecting a variable ROMBase, all the main_*.cpp pgrams have to define and export it. The ROM_BASE constant is moved here for consistency. The mains for beos and windows just allocate the ROM at the same fixed address as before, set ROMBaseHost and ROMBase to that address, and then use ROMBase for the subsequent code.

cpu_emulation.h: removed ROM_BASE constant. This value is moved to the main_*.cpp modules, to be consistent with RAM_BASE.

user_strings_unix.cpp, user_strings_unix.h: Added new error messages related to errors that occur when the RAM and ROM are allocated anywhere.

File Contents

# User Rev Content
1 gbeauche 1.5 /* Define usage of "reserved" registers */
2     #if defined(__linux__)
3     #define SYSTEM_CLOBBERS_R2 1 /* Pointer to Thread Local Storage */
4     #define SYSTEM_CLOBBERS_R13 1 /* Pointer to .sdata section */
5     #endif
6    
7     #ifdef __ASSEMBLY__
8     /* Helper macros */
9     #ifdef SYSTEM_CLOBBERS_R2
10     #define RESTORE_SYSTEM_R2 lwz r2,XLM_TOC(0)
11     #define SAVE_SYSTEM_R2 stw r2,XLM_TOC(0)
12     #else
13     #define RESTORE_SYSTEM_R2
14     #define SAVE_SYSTEM_R2
15     #endif
16     #ifdef SYSTEM_CLOBBERS_R13
17     #define RESTORE_SYSTEM_R13 lwz r13,XLM_R13(0)
18     #define SAVE_SYSTEM_R13 stw r13,XLM_R13(0)
19     #else
20     #define RESTORE_SYSTEM_R13
21     #define SAVE_SYSTEM_R13
22     #endif
23    
24 gbeauche 1.7 /* Helper macros */
25     #define xglue(x, y) x ## y
26     #define glue(x, y) xglue(x, y)
27    
28 gbeauche 1.5 /* Apple assembler perticularities */
29 gbeauche 1.2 #if (defined(__APPLE__) && defined(__MACH__))
30 gbeauche 1.7 #define C_SYMBOL_NAME(NAME) glue(_, NAME)
31     #define ASM_TYPE(NAME, TYPE) /* nothing */
32     #define ASM_ALIGN_2(EXP) EXP
33     #define ASM_HA16(VAR) ha16(VAR)
34 asvitkine 1.8 #define ASM_LO16(VAR) lo16(VAR)
35 gbeauche 1.3 #define ASM_MACRO_END .endmacro
36 gbeauche 1.7 #define ASM_MACRO_ARG_SEP ,
37 gbeauche 1.6 #define ASM_MACRO_ARG0_DEF /* nothing! */
38     #define ASM_MACRO_ARG0 $0
39 gbeauche 1.7 #define ASM_MACRO_ARG1_DEF /* nothing! */
40 gbeauche 1.6 #define ASM_MACRO_ARG1 $1
41 gbeauche 1.7 #define ASM_MACRO_ARG2_DEF /* nothing! */
42     #define ASM_MACRO_ARG2 $2
43     #define ASM_MACRO_ARG3_DEF /* nothing! */
44     #define ASM_MACRO_ARG3 $3
45 gbeauche 1.3 #endif
46    
47     /* Defaults for GNU assembler */
48 gbeauche 1.7 #ifndef ASM_TYPE
49     #define ASM_TYPE(NAME, TYPE) .type NAME, TYPE
50     #endif
51     #ifndef ASM_ALIGN_2
52     #define ASM_ALIGN_2(EXP) (1 << (EXP))
53     #endif
54     #ifndef ASM_HA16
55     #define ASM_HA16(VAR) VAR@ha
56     #endif
57     #ifndef ASM_LO16
58 asvitkine 1.8 #define ASM_LO16(VAR) VAR@l
59 gbeauche 1.7 #endif
60 gbeauche 1.3 #ifndef ASM_MACRO_START
61     #define ASM_MACRO_START .macro
62     #endif
63     #ifndef ASM_MACRO_END
64     #define ASM_MACRO_END .endm
65 gbeauche 1.2 #endif
66 gbeauche 1.7 #ifndef ASM_MACRO_ARG_SEP
67     #define ASM_MACRO_ARG_SEP
68     #endif
69 gbeauche 1.6 #ifndef ASM_MACRO_ARG0_DEF
70     #define ASM_MACRO_ARG0_DEF __asm_macro_arg0
71     #define ASM_MACRO_ARG0 \__asm_macro_arg0
72     #define ASM_MACRO_ARG1_DEF , __asm_macro_arg1
73     #define ASM_MACRO_ARG1 \__asm_macro_arg1
74 gbeauche 1.7 #define ASM_MACRO_ARG2_DEF , __asm_macro_arg2
75     #define ASM_MACRO_ARG2 \__asm_macro_arg2
76     #define ASM_MACRO_ARG3_DEF , __asm_macro_arg3
77     #define ASM_MACRO_ARG3 \__asm_macro_arg3
78 gbeauche 1.6 #endif
79 gbeauche 1.2 #ifndef C_SYMBOL_NAME
80 gbeauche 1.3 #define C_SYMBOL_NAME(NAME) NAME
81 gbeauche 1.2 #endif
82     #ifndef ASM_GLOBAL_DIRECTIVE
83 gbeauche 1.3 #define ASM_GLOBAL_DIRECTIVE .globl
84 gbeauche 1.2 #endif
85    
86 cebix 1.1 /* Register names */
87 gbeauche 1.4 #if defined(__linux__) || defined(__NetBSD__)
88 cebix 1.1 #define r0 0
89     #define r1 1
90     #define r2 2
91     #define r3 3
92     #define r4 4
93     #define r5 5
94     #define r6 6
95     #define r7 7
96     #define r8 8
97     #define r9 9
98     #define r10 10
99     #define r11 11
100     #define r12 12
101     #define r13 13
102     #define r14 14
103     #define r15 15
104     #define r16 16
105     #define r17 17
106     #define r18 18
107     #define r19 19
108     #define r20 20
109     #define r21 21
110     #define r22 22
111     #define r23 23
112     #define r24 24
113     #define r25 25
114     #define r26 26
115     #define r27 27
116     #define r28 28
117     #define r29 29
118     #define r30 30
119     #define r31 31
120 gbeauche 1.2 #endif
121 cebix 1.1
122 gbeauche 1.4 #if defined(__linux__) || defined(__NetBSD__)
123 cebix 1.1 #define f0 0
124     #define f1 1
125     #define f2 2
126     #define f3 3
127     #define f4 4
128     #define f5 5
129     #define f6 6
130     #define f7 7
131     #define f8 8
132     #define f9 9
133     #define f10 10
134     #define f11 11
135     #define f12 12
136     #define f13 13
137     #define f14 14
138     #define f15 15
139     #define f16 16
140     #define f17 17
141     #define f18 18
142     #define f19 19
143     #define f20 20
144     #define f21 21
145     #define f22 22
146     #define f23 23
147     #define f24 24
148     #define f25 25
149     #define f26 26
150     #define f27 27
151     #define f28 28
152     #define f29 29
153     #define f30 30
154     #define f31 31
155 gbeauche 1.2 #endif
156 gbeauche 1.5 #endif