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cebix |
1.1 |
/* |
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* CPUC64.cpp - 6510 (C64) emulation (line based) |
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* |
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cebix |
1.6 |
* Frodo (C) 1994-1997,2002-2004 Christian Bauer |
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cebix |
1.1 |
* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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/* |
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* Notes: |
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* ------ |
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* |
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* - The EmulateLine() function is called for every emulated |
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* raster line. It has a cycle counter that is decremented |
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* by every executed opcode and if the counter goes below |
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* zero, the function returns. |
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* - Memory configurations: |
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* $01 $a000-$bfff $d000-$dfff $e000-$ffff |
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* ----------------------------------------------- |
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* 0 RAM RAM RAM |
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* 1 RAM Char ROM RAM |
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* 2 RAM Char ROM Kernal ROM |
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* 3 Basic ROM Char ROM Kernal ROM |
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* 4 RAM RAM RAM |
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* 5 RAM I/O RAM |
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* 6 RAM I/O Kernal ROM |
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* 7 Basic ROM I/O Kernal ROM |
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* - All memory accesses are done with the read_byte() and |
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* write_byte() functions which also do the memory address |
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* decoding. The read_zp() and write_zp() functions allow |
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* faster access to the zero page, the pop_byte() and |
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* push_byte() macros for the stack. |
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* - If a write occurs to addresses 0 or 1, new_config is |
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* called to check whether the memory configuration has |
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* changed |
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* - The PC is either emulated with a 16 bit address or a |
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* direct memory pointer (for faster access), depending on |
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* the PC_IS_POINTER #define. In the latter case, a second |
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* pointer, pc_base, is kept to allow recalculating the |
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* 16 bit 6510 PC if it has to be pushed on the stack. |
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* - The possible interrupt sources are: |
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* INT_VICIRQ: I flag is checked, jump to ($fffe) |
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* INT_CIAIRQ: I flag is checked, jump to ($fffe) |
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* INT_NMI: Jump to ($fffa) |
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* INT_RESET: Jump to ($fffc) |
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* - Interrupts are not checked before every opcode but only |
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* at certain times: |
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* On entering EmulateLine() |
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* On CLI |
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* On PLP if the I flag was cleared |
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* On RTI if the I flag was cleared |
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* - The z_flag variable has the inverse meaning of the |
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* 6510 Z flag |
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* - Only the highest bit of the n_flag variable is used |
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* - The $f2 opcode that would normally crash the 6510 is |
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* used to implement emulator-specific functions, mainly |
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* those for the IEC routines |
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* |
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* Incompatibilities: |
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* ------------------ |
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* |
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* - If PC_IS_POINTER is set, neither branches accross memory |
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* areas nor jumps to I/O space are possible |
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* - Extra cycles for crossing page boundaries are not |
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* accounted for |
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* - The cassette sense line is always closed |
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*/ |
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#include "sysdeps.h" |
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#include "CPUC64.h" |
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#include "C64.h" |
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#include "VIC.h" |
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#include "SID.h" |
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#include "CIA.h" |
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#include "REU.h" |
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#include "IEC.h" |
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#include "Display.h" |
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#include "Version.h" |
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enum { |
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INT_RESET = 3 |
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}; |
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/* |
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* 6510 constructor: Initialize registers |
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*/ |
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MOS6510::MOS6510(C64 *c64, uint8 *Ram, uint8 *Basic, uint8 *Kernal, uint8 *Char, uint8 *Color) |
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: the_c64(c64), ram(Ram), basic_rom(Basic), kernal_rom(Kernal), char_rom(Char), color_ram(Color) |
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{ |
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a = x = y = 0; |
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sp = 0xff; |
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n_flag = z_flag = 0; |
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v_flag = d_flag = c_flag = false; |
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i_flag = true; |
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dfff_byte = 0x55; |
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borrowed_cycles = 0; |
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} |
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/* |
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* Reset CPU asynchronously |
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*/ |
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void MOS6510::AsyncReset(void) |
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{ |
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interrupt.intr[INT_RESET] = true; |
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} |
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/* |
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* Raise NMI asynchronously (Restore key) |
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*/ |
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void MOS6510::AsyncNMI(void) |
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{ |
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if (!nmi_state) |
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interrupt.intr[INT_NMI] = true; |
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} |
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/* |
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* Memory configuration has probably changed |
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*/ |
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void MOS6510::new_config(void) |
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{ |
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uint8 port = ~ram[0] | ram[1]; |
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basic_in = (port & 3) == 3; |
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kernal_in = port & 2; |
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char_in = (port & 3) && !(port & 4); |
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io_in = (port & 3) && (port & 4); |
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} |
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/* |
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* Read a byte from I/O / ROM space |
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*/ |
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inline uint8 MOS6510::read_byte_io(uint16 adr) |
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{ |
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switch (adr >> 12) { |
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case 0xa: |
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case 0xb: |
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if (basic_in) |
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return basic_rom[adr & 0x1fff]; |
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else |
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return ram[adr]; |
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case 0xc: |
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return ram[adr]; |
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case 0xd: |
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if (io_in) |
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switch ((adr >> 8) & 0x0f) { |
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case 0x0: // VIC |
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case 0x1: |
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case 0x2: |
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case 0x3: |
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return TheVIC->ReadRegister(adr & 0x3f); |
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case 0x4: // SID |
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case 0x5: |
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case 0x6: |
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case 0x7: |
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return TheSID->ReadRegister(adr & 0x1f); |
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case 0x8: // Color RAM |
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case 0x9: |
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case 0xa: |
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case 0xb: |
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return color_ram[adr & 0x03ff] | rand() & 0xf0; |
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case 0xc: // CIA 1 |
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return TheCIA1->ReadRegister(adr & 0x0f); |
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case 0xd: // CIA 2 |
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return TheCIA2->ReadRegister(adr & 0x0f); |
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case 0xe: // REU/Open I/O |
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case 0xf: |
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if ((adr & 0xfff0) == 0xdf00) |
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return TheREU->ReadRegister(adr & 0x0f); |
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else if (adr < 0xdfa0) |
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return rand(); |
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else |
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return read_emulator_id(adr & 0x7f); |
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} |
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else if (char_in) |
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return char_rom[adr & 0x0fff]; |
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else |
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return ram[adr]; |
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case 0xe: |
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case 0xf: |
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if (kernal_in) |
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return kernal_rom[adr & 0x1fff]; |
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else |
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return ram[adr]; |
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default: // Can't happen |
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return 0; |
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} |
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} |
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/* |
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* Read a byte from the CPU's address space |
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*/ |
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uint8 MOS6510::read_byte(uint16 adr) |
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{ |
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if (adr < 0xa000) |
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return ram[adr]; |
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else |
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return read_byte_io(adr); |
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} |
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/* |
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* $dfa0-$dfff: Emulator identification |
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*/ |
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const char frodo_id[0x5c] = "FRODO\r(C) 1994-1997 CHRISTIAN BAUER"; |
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uint8 MOS6510::read_emulator_id(uint16 adr) |
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{ |
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switch (adr) { |
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case 0x7c: // $dffc: revision |
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return FRODO_REVISION << 4; |
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case 0x7d: // $dffd: version |
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return FRODO_VERSION; |
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case 0x7e: // $dffe returns 'F' (Frodo ID) |
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return 'F'; |
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case 0x7f: // $dfff alternates between $55 and $aa |
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dfff_byte = ~dfff_byte; |
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return dfff_byte; |
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default: |
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return frodo_id[adr - 0x20]; |
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} |
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} |
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/* |
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* Read a word (little-endian) from the CPU's address space |
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*/ |
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#if LITTLE_ENDIAN_UNALIGNED |
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inline uint16 MOS6510::read_word(uint16 adr) |
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{ |
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switch (adr >> 12) { |
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case 0x0: |
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case 0x1: |
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case 0x2: |
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case 0x3: |
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case 0x4: |
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case 0x5: |
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case 0x6: |
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case 0x7: |
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case 0x8: |
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case 0x9: |
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return *(uint16*)&ram[adr]; |
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break; |
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case 0xa: |
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case 0xb: |
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if (basic_in) |
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return *(uint16*)&basic_rom[adr & 0x1fff]; |
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else |
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return *(uint16*)&ram[adr]; |
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case 0xc: |
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return *(uint16*)&ram[adr]; |
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case 0xd: |
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if (io_in) |
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return read_byte(adr) | (read_byte(adr+1) << 8); |
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else if (char_in) |
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return *(uint16*)&char_rom[adr & 0x0fff]; |
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else |
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return *(uint16*)&ram[adr]; |
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case 0xe: |
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case 0xf: |
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if (kernal_in) |
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return *(uint16*)&kernal_rom[adr & 0x1fff]; |
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else |
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return *(uint16*)&ram[adr]; |
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default: // Can't happen |
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return 0; |
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} |
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} |
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#else |
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inline uint16 MOS6510::read_word(uint16 adr) |
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{ |
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return read_byte(adr) | (read_byte(adr+1) << 8); |
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} |
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#endif |
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/* |
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* Write byte to I/O space |
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*/ |
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void MOS6510::write_byte_io(uint16 adr, uint8 byte) |
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{ |
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if (adr >= 0xe000) { |
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ram[adr] = byte; |
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if (adr == 0xff00) |
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TheREU->FF00Trigger(); |
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} else if (io_in) |
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switch ((adr >> 8) & 0x0f) { |
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case 0x0: // VIC |
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case 0x1: |
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case 0x2: |
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case 0x3: |
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TheVIC->WriteRegister(adr & 0x3f, byte); |
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return; |
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case 0x4: // SID |
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case 0x5: |
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case 0x6: |
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case 0x7: |
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TheSID->WriteRegister(adr & 0x1f, byte); |
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return; |
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case 0x8: // Color RAM |
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case 0x9: |
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case 0xa: |
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case 0xb: |
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color_ram[adr & 0x03ff] = byte & 0x0f; |
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return; |
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case 0xc: // CIA 1 |
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TheCIA1->WriteRegister(adr & 0x0f, byte); |
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return; |
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case 0xd: // CIA 2 |
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TheCIA2->WriteRegister(adr & 0x0f, byte); |
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return; |
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case 0xe: // REU/Open I/O |
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case 0xf: |
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if ((adr & 0xfff0) == 0xdf00) |
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TheREU->WriteRegister(adr & 0x0f, byte); |
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return; |
| 349 |
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} |
| 350 |
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else |
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ram[adr] = byte; |
| 352 |
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} |
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/* |
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* Write a byte to the CPU's address space |
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*/ |
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inline void MOS6510::write_byte(uint16 adr, uint8 byte) |
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{ |
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if (adr < 0xd000) { |
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ram[adr] = byte; |
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if (adr < 2) |
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new_config(); |
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} else |
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write_byte_io(adr, byte); |
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} |
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/* |
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* Read a byte from the zeropage |
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*/ |
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inline uint8 MOS6510::read_zp(uint16 adr) |
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{ |
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return ram[adr]; |
| 377 |
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} |
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/* |
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* Read a word (little-endian) from the zeropage |
| 382 |
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*/ |
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inline uint16 MOS6510::read_zp_word(uint16 adr) |
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{ |
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// !! zeropage word addressing wraps around !! |
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#if LITTLE_ENDIAN_UNALIGNED |
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return *(uint16 *)&ram[adr & 0xff]; |
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#else |
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return ram[adr & 0xff] | (ram[(adr+1) & 0xff] << 8); |
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#endif |
| 392 |
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} |
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| 394 |
|
|
|
| 395 |
|
|
/* |
| 396 |
|
|
* Write a byte to the zeropage |
| 397 |
|
|
*/ |
| 398 |
|
|
|
| 399 |
|
|
inline void MOS6510::write_zp(uint16 adr, uint8 byte) |
| 400 |
|
|
{ |
| 401 |
|
|
ram[adr] = byte; |
| 402 |
|
|
|
| 403 |
|
|
// Check if memory configuration may have changed. |
| 404 |
|
|
if (adr < 2) |
| 405 |
|
|
new_config(); |
| 406 |
|
|
} |
| 407 |
|
|
|
| 408 |
|
|
|
| 409 |
|
|
/* |
| 410 |
|
|
* Read byte from 6510 address space with special memory config (used by SAM) |
| 411 |
|
|
*/ |
| 412 |
|
|
|
| 413 |
|
|
uint8 MOS6510::ExtReadByte(uint16 adr) |
| 414 |
|
|
{ |
| 415 |
|
|
// Save old memory configuration |
| 416 |
|
|
bool bi = basic_in, ki = kernal_in, ci = char_in, ii = io_in; |
| 417 |
|
|
|
| 418 |
|
|
// Set new configuration |
| 419 |
|
|
basic_in = (ExtConfig & 3) == 3; |
| 420 |
|
|
kernal_in = ExtConfig & 2; |
| 421 |
|
|
char_in = (ExtConfig & 3) && ~(ExtConfig & 4); |
| 422 |
|
|
io_in = (ExtConfig & 3) && (ExtConfig & 4); |
| 423 |
|
|
|
| 424 |
|
|
// Read byte |
| 425 |
|
|
uint8 byte = read_byte(adr); |
| 426 |
|
|
|
| 427 |
|
|
// Restore old configuration |
| 428 |
|
|
basic_in = bi; kernal_in = ki; char_in = ci; io_in = ii; |
| 429 |
|
|
|
| 430 |
|
|
return byte; |
| 431 |
|
|
} |
| 432 |
|
|
|
| 433 |
|
|
|
| 434 |
|
|
/* |
| 435 |
|
|
* Write byte to 6510 address space with special memory config (used by SAM) |
| 436 |
|
|
*/ |
| 437 |
|
|
|
| 438 |
|
|
void MOS6510::ExtWriteByte(uint16 adr, uint8 byte) |
| 439 |
|
|
{ |
| 440 |
|
|
// Save old memory configuration |
| 441 |
|
|
bool bi = basic_in, ki = kernal_in, ci = char_in, ii = io_in; |
| 442 |
|
|
|
| 443 |
|
|
// Set new configuration |
| 444 |
|
|
basic_in = (ExtConfig & 3) == 3; |
| 445 |
|
|
kernal_in = ExtConfig & 2; |
| 446 |
|
|
char_in = (ExtConfig & 3) && ~(ExtConfig & 4); |
| 447 |
|
|
io_in = (ExtConfig & 3) && (ExtConfig & 4); |
| 448 |
|
|
|
| 449 |
|
|
// Write byte |
| 450 |
|
|
write_byte(adr, byte); |
| 451 |
|
|
|
| 452 |
|
|
// Restore old configuration |
| 453 |
|
|
basic_in = bi; kernal_in = ki; char_in = ci; io_in = ii; |
| 454 |
|
|
} |
| 455 |
|
|
|
| 456 |
|
|
|
| 457 |
|
|
/* |
| 458 |
|
|
* Read byte from 6510 address space with current memory config (used by REU) |
| 459 |
|
|
*/ |
| 460 |
|
|
|
| 461 |
|
|
uint8 MOS6510::REUReadByte(uint16 adr) |
| 462 |
|
|
{ |
| 463 |
|
|
return read_byte(adr); |
| 464 |
|
|
} |
| 465 |
|
|
|
| 466 |
|
|
|
| 467 |
|
|
/* |
| 468 |
|
|
* Write byte to 6510 address space with current memory config (used by REU) |
| 469 |
|
|
*/ |
| 470 |
|
|
|
| 471 |
|
|
void MOS6510::REUWriteByte(uint16 adr, uint8 byte) |
| 472 |
|
|
{ |
| 473 |
|
|
write_byte(adr, byte); |
| 474 |
|
|
} |
| 475 |
|
|
|
| 476 |
|
|
|
| 477 |
|
|
/* |
| 478 |
|
|
* Jump to address |
| 479 |
|
|
*/ |
| 480 |
|
|
|
| 481 |
|
|
#if PC_IS_POINTER |
| 482 |
cebix |
1.3 |
#define jump(adr) \ |
| 483 |
|
|
if ((adr) < 0xa000) { \ |
| 484 |
|
|
pc = ram + (adr); \ |
| 485 |
|
|
pc_base = ram; \ |
| 486 |
|
|
} else { \ |
| 487 |
|
|
switch ((adr) >> 12) { \ |
| 488 |
|
|
case 0xa: \ |
| 489 |
|
|
case 0xb: \ |
| 490 |
|
|
if (basic_in) { \ |
| 491 |
|
|
pc = basic_rom + ((adr) & 0x1fff); \ |
| 492 |
|
|
pc_base = basic_rom - 0xa000; \ |
| 493 |
|
|
} else { \ |
| 494 |
|
|
pc = ram + (adr); \ |
| 495 |
|
|
pc_base = ram; \ |
| 496 |
|
|
} \ |
| 497 |
|
|
break; \ |
| 498 |
|
|
case 0xc: \ |
| 499 |
|
|
pc = ram + (adr); \ |
| 500 |
|
|
pc_base = ram; \ |
| 501 |
|
|
break; \ |
| 502 |
|
|
case 0xd: \ |
| 503 |
|
|
if (io_in) { \ |
| 504 |
|
|
illegal_jump(pc-pc_base, (adr)); \ |
| 505 |
|
|
} else if (char_in) { \ |
| 506 |
|
|
pc = char_rom + ((adr) & 0x0fff); \ |
| 507 |
|
|
pc_base = char_rom - 0xd000; \ |
| 508 |
|
|
} else { \ |
| 509 |
|
|
pc = ram + (adr); \ |
| 510 |
|
|
pc_base = ram; \ |
| 511 |
|
|
} \ |
| 512 |
|
|
break; \ |
| 513 |
|
|
case 0xe: \ |
| 514 |
|
|
case 0xf: \ |
| 515 |
|
|
if (kernal_in) { \ |
| 516 |
|
|
pc = kernal_rom + ((adr) & 0x1fff); \ |
| 517 |
|
|
pc_base = kernal_rom - 0xe000; \ |
| 518 |
|
|
} else { \ |
| 519 |
|
|
pc = ram + (adr); \ |
| 520 |
|
|
pc_base = ram; \ |
| 521 |
|
|
} \ |
| 522 |
|
|
break; \ |
| 523 |
|
|
} \ |
| 524 |
|
|
} |
| 525 |
cebix |
1.1 |
#else |
| 526 |
cebix |
1.3 |
#define jump(adr) pc = (adr) |
| 527 |
cebix |
1.1 |
#endif |
| 528 |
|
|
|
| 529 |
|
|
|
| 530 |
|
|
/* |
| 531 |
|
|
* Adc instruction |
| 532 |
|
|
*/ |
| 533 |
|
|
|
| 534 |
|
|
void MOS6510::do_adc(uint8 byte) |
| 535 |
|
|
{ |
| 536 |
|
|
if (!d_flag) { |
| 537 |
cebix |
1.3 |
uint16 tmp = a + (byte) + (c_flag ? 1 : 0); |
| 538 |
cebix |
1.1 |
c_flag = tmp > 0xff; |
| 539 |
cebix |
1.3 |
v_flag = !((a ^ (byte)) & 0x80) && ((a ^ tmp) & 0x80); |
| 540 |
cebix |
1.1 |
z_flag = n_flag = a = tmp; |
| 541 |
|
|
} else { |
| 542 |
|
|
uint16 al, ah; |
| 543 |
cebix |
1.3 |
al = (a & 0x0f) + ((byte) & 0x0f) + (c_flag ? 1 : 0); |
| 544 |
|
|
if (al > 9) al += 6; |
| 545 |
|
|
ah = (a >> 4) + ((byte) >> 4); |
| 546 |
cebix |
1.1 |
if (al > 0x0f) ah++; |
| 547 |
cebix |
1.3 |
z_flag = a + (byte) + (c_flag ? 1 : 0); |
| 548 |
|
|
n_flag = ah << 4; |
| 549 |
|
|
v_flag = (((ah << 4) ^ a) & 0x80) && !((a ^ (byte)) & 0x80); |
| 550 |
|
|
if (ah > 9) ah += 6; |
| 551 |
|
|
c_flag = ah > 0x0f; |
| 552 |
|
|
a = (ah << 4) | (al & 0x0f); |
| 553 |
cebix |
1.1 |
} |
| 554 |
|
|
} |
| 555 |
|
|
|
| 556 |
|
|
|
| 557 |
|
|
/* |
| 558 |
|
|
* Sbc instruction |
| 559 |
|
|
*/ |
| 560 |
|
|
|
| 561 |
|
|
void MOS6510::do_sbc(uint8 byte) |
| 562 |
|
|
{ |
| 563 |
cebix |
1.3 |
uint16 tmp = a - (byte) - (c_flag ? 0 : 1); |
| 564 |
cebix |
1.1 |
if (!d_flag) { |
| 565 |
|
|
c_flag = tmp < 0x100; |
| 566 |
cebix |
1.3 |
v_flag = ((a ^ tmp) & 0x80) && ((a ^ (byte)) & 0x80); |
| 567 |
cebix |
1.1 |
z_flag = n_flag = a = tmp; |
| 568 |
|
|
} else { |
| 569 |
|
|
uint16 al, ah; |
| 570 |
cebix |
1.3 |
al = (a & 0x0f) - ((byte) & 0x0f) - (c_flag ? 0 : 1); |
| 571 |
|
|
ah = (a >> 4) - ((byte) >> 4); |
| 572 |
cebix |
1.1 |
if (al & 0x10) { |
| 573 |
cebix |
1.3 |
al -= 6; |
| 574 |
cebix |
1.1 |
ah--; |
| 575 |
|
|
} |
| 576 |
cebix |
1.3 |
if (ah & 0x10) ah -= 6; |
| 577 |
|
|
c_flag = tmp < 0x100; |
| 578 |
|
|
v_flag = ((a ^ tmp) & 0x80) && ((a ^ (byte)) & 0x80); |
| 579 |
cebix |
1.1 |
z_flag = n_flag = tmp; |
| 580 |
cebix |
1.3 |
a = (ah << 4) | (al & 0x0f); |
| 581 |
cebix |
1.1 |
} |
| 582 |
|
|
} |
| 583 |
|
|
|
| 584 |
|
|
|
| 585 |
|
|
/* |
| 586 |
|
|
* Get 6510 register state |
| 587 |
|
|
*/ |
| 588 |
|
|
|
| 589 |
|
|
void MOS6510::GetState(MOS6510State *s) |
| 590 |
|
|
{ |
| 591 |
|
|
s->a = a; |
| 592 |
|
|
s->x = x; |
| 593 |
|
|
s->y = y; |
| 594 |
|
|
|
| 595 |
|
|
s->p = 0x20 | (n_flag & 0x80); |
| 596 |
|
|
if (v_flag) s->p |= 0x40; |
| 597 |
|
|
if (d_flag) s->p |= 0x08; |
| 598 |
|
|
if (i_flag) s->p |= 0x04; |
| 599 |
|
|
if (!z_flag) s->p |= 0x02; |
| 600 |
|
|
if (c_flag) s->p |= 0x01; |
| 601 |
cebix |
1.3 |
|
| 602 |
cebix |
1.1 |
s->ddr = ram[0]; |
| 603 |
|
|
s->pr = ram[1] & 0x3f; |
| 604 |
|
|
|
| 605 |
|
|
#if PC_IS_POINTER |
| 606 |
|
|
s->pc = pc - pc_base; |
| 607 |
|
|
#else |
| 608 |
|
|
s->pc = pc; |
| 609 |
|
|
#endif |
| 610 |
|
|
s->sp = sp | 0x0100; |
| 611 |
|
|
|
| 612 |
|
|
s->intr[INT_VICIRQ] = interrupt.intr[INT_VICIRQ]; |
| 613 |
|
|
s->intr[INT_CIAIRQ] = interrupt.intr[INT_CIAIRQ]; |
| 614 |
|
|
s->intr[INT_NMI] = interrupt.intr[INT_NMI]; |
| 615 |
|
|
s->intr[INT_RESET] = interrupt.intr[INT_RESET]; |
| 616 |
|
|
s->nmi_state = nmi_state; |
| 617 |
|
|
s->dfff_byte = dfff_byte; |
| 618 |
|
|
s->instruction_complete = true; |
| 619 |
|
|
} |
| 620 |
|
|
|
| 621 |
|
|
|
| 622 |
|
|
/* |
| 623 |
|
|
* Restore 6510 state |
| 624 |
|
|
*/ |
| 625 |
|
|
|
| 626 |
|
|
void MOS6510::SetState(MOS6510State *s) |
| 627 |
|
|
{ |
| 628 |
|
|
a = s->a; |
| 629 |
|
|
x = s->x; |
| 630 |
|
|
y = s->y; |
| 631 |
|
|
|
| 632 |
|
|
n_flag = s->p; |
| 633 |
|
|
v_flag = s->p & 0x40; |
| 634 |
|
|
d_flag = s->p & 0x08; |
| 635 |
|
|
i_flag = s->p & 0x04; |
| 636 |
|
|
z_flag = !(s->p & 0x02); |
| 637 |
|
|
c_flag = s->p & 0x01; |
| 638 |
|
|
|
| 639 |
|
|
ram[0] = s->ddr; |
| 640 |
|
|
ram[1] = s->pr; |
| 641 |
|
|
new_config(); |
| 642 |
|
|
|
| 643 |
|
|
jump(s->pc); |
| 644 |
|
|
sp = s->sp & 0xff; |
| 645 |
|
|
|
| 646 |
|
|
interrupt.intr[INT_VICIRQ] = s->intr[INT_VICIRQ]; |
| 647 |
|
|
interrupt.intr[INT_CIAIRQ] = s->intr[INT_CIAIRQ]; |
| 648 |
|
|
interrupt.intr[INT_NMI] = s->intr[INT_NMI]; |
| 649 |
|
|
interrupt.intr[INT_RESET] = s->intr[INT_RESET]; |
| 650 |
|
|
nmi_state = s->nmi_state; |
| 651 |
|
|
dfff_byte = s->dfff_byte; |
| 652 |
|
|
} |
| 653 |
|
|
|
| 654 |
|
|
|
| 655 |
|
|
/* |
| 656 |
|
|
* Reset CPU |
| 657 |
|
|
*/ |
| 658 |
|
|
|
| 659 |
|
|
void MOS6510::Reset(void) |
| 660 |
|
|
{ |
| 661 |
|
|
// Delete 'CBM80' if present |
| 662 |
|
|
if (ram[0x8004] == 0xc3 && ram[0x8005] == 0xc2 && ram[0x8006] == 0xcd |
| 663 |
|
|
&& ram[0x8007] == 0x38 && ram[0x8008] == 0x30) |
| 664 |
|
|
ram[0x8004] = 0; |
| 665 |
|
|
|
| 666 |
|
|
// Initialize extra 6510 registers and memory configuration |
| 667 |
|
|
ram[0] = ram[1] = 0; |
| 668 |
|
|
new_config(); |
| 669 |
|
|
|
| 670 |
|
|
// Clear all interrupt lines |
| 671 |
|
|
interrupt.intr_any = 0; |
| 672 |
|
|
nmi_state = false; |
| 673 |
|
|
|
| 674 |
|
|
// Read reset vector |
| 675 |
|
|
jump(read_word(0xfffc)); |
| 676 |
|
|
} |
| 677 |
|
|
|
| 678 |
|
|
|
| 679 |
|
|
/* |
| 680 |
|
|
* Illegal opcode encountered |
| 681 |
|
|
*/ |
| 682 |
|
|
|
| 683 |
|
|
void MOS6510::illegal_op(uint8 op, uint16 at) |
| 684 |
|
|
{ |
| 685 |
|
|
char illop_msg[80]; |
| 686 |
|
|
|
| 687 |
|
|
sprintf(illop_msg, "Illegal opcode %02x at %04x.", op, at); |
| 688 |
|
|
ShowRequester(illop_msg, "Reset"); |
| 689 |
|
|
the_c64->Reset(); |
| 690 |
|
|
Reset(); |
| 691 |
|
|
} |
| 692 |
|
|
|
| 693 |
|
|
|
| 694 |
|
|
/* |
| 695 |
|
|
* Jump to illegal address space (PC_IS_POINTER only) |
| 696 |
|
|
*/ |
| 697 |
|
|
|
| 698 |
|
|
void MOS6510::illegal_jump(uint16 at, uint16 to) |
| 699 |
|
|
{ |
| 700 |
|
|
char illop_msg[80]; |
| 701 |
|
|
|
| 702 |
|
|
sprintf(illop_msg, "Jump to I/O space at %04x to %04x.", at, to); |
| 703 |
|
|
ShowRequester(illop_msg, "Reset"); |
| 704 |
|
|
the_c64->Reset(); |
| 705 |
|
|
Reset(); |
| 706 |
|
|
} |
| 707 |
|
|
|
| 708 |
|
|
|
| 709 |
|
|
/* |
| 710 |
|
|
* Stack macros |
| 711 |
|
|
*/ |
| 712 |
|
|
|
| 713 |
|
|
// Pop a byte from the stack |
| 714 |
|
|
#define pop_byte() ram[(++sp) | 0x0100] |
| 715 |
|
|
|
| 716 |
|
|
// Push a byte onto the stack |
| 717 |
|
|
#define push_byte(byte) (ram[(sp--) & 0xff | 0x0100] = (byte)) |
| 718 |
|
|
|
| 719 |
|
|
// Pop processor flags from the stack |
| 720 |
|
|
#define pop_flags() \ |
| 721 |
|
|
n_flag = tmp = pop_byte(); \ |
| 722 |
|
|
v_flag = tmp & 0x40; \ |
| 723 |
|
|
d_flag = tmp & 0x08; \ |
| 724 |
|
|
i_flag = tmp & 0x04; \ |
| 725 |
|
|
z_flag = !(tmp & 0x02); \ |
| 726 |
|
|
c_flag = tmp & 0x01; |
| 727 |
|
|
|
| 728 |
|
|
// Push processor flags onto the stack |
| 729 |
|
|
#define push_flags(b_flag) \ |
| 730 |
|
|
tmp = 0x20 | (n_flag & 0x80); \ |
| 731 |
|
|
if (v_flag) tmp |= 0x40; \ |
| 732 |
|
|
if (b_flag) tmp |= 0x10; \ |
| 733 |
|
|
if (d_flag) tmp |= 0x08; \ |
| 734 |
|
|
if (i_flag) tmp |= 0x04; \ |
| 735 |
|
|
if (!z_flag) tmp |= 0x02; \ |
| 736 |
|
|
if (c_flag) tmp |= 0x01; \ |
| 737 |
|
|
push_byte(tmp); |
| 738 |
|
|
|
| 739 |
|
|
|
| 740 |
|
|
/* |
| 741 |
|
|
* Emulate cycles_left worth of 6510 instructions |
| 742 |
|
|
* Returns number of cycles of last instruction |
| 743 |
|
|
*/ |
| 744 |
|
|
|
| 745 |
|
|
int MOS6510::EmulateLine(int cycles_left) |
| 746 |
|
|
{ |
| 747 |
|
|
uint8 tmp, tmp2; |
| 748 |
|
|
uint16 adr; // Used by read_adr_abs()! |
| 749 |
|
|
int last_cycles = 0; |
| 750 |
|
|
|
| 751 |
|
|
// Any pending interrupts? |
| 752 |
|
|
if (interrupt.intr_any) { |
| 753 |
|
|
handle_int: |
| 754 |
cebix |
1.3 |
if (interrupt.intr[INT_RESET]) { |
| 755 |
cebix |
1.1 |
Reset(); |
| 756 |
|
|
|
| 757 |
cebix |
1.3 |
} else if (interrupt.intr[INT_NMI]) { |
| 758 |
cebix |
1.1 |
interrupt.intr[INT_NMI] = false; // Simulate an edge-triggered input |
| 759 |
|
|
#if PC_IS_POINTER |
| 760 |
|
|
push_byte((pc-pc_base) >> 8); push_byte(pc-pc_base); |
| 761 |
|
|
#else |
| 762 |
|
|
push_byte(pc >> 8); push_byte(pc); |
| 763 |
|
|
#endif |
| 764 |
|
|
push_flags(false); |
| 765 |
|
|
i_flag = true; |
| 766 |
cebix |
1.3 |
adr = read_word(0xfffa); |
| 767 |
|
|
jump(adr); |
| 768 |
cebix |
1.1 |
last_cycles = 7; |
| 769 |
|
|
|
| 770 |
|
|
} else if ((interrupt.intr[INT_VICIRQ] || interrupt.intr[INT_CIAIRQ]) && !i_flag) { |
| 771 |
|
|
#if PC_IS_POINTER |
| 772 |
|
|
push_byte((pc-pc_base) >> 8); push_byte(pc-pc_base); |
| 773 |
|
|
#else |
| 774 |
|
|
push_byte(pc >> 8); push_byte(pc); |
| 775 |
|
|
#endif |
| 776 |
|
|
push_flags(false); |
| 777 |
|
|
i_flag = true; |
| 778 |
cebix |
1.3 |
adr = read_word(0xfffe); |
| 779 |
|
|
jump(adr); |
| 780 |
cebix |
1.1 |
last_cycles = 7; |
| 781 |
|
|
} |
| 782 |
|
|
} |
| 783 |
|
|
|
| 784 |
cebix |
1.4 |
#include "CPU_emulline.h" |
| 785 |
cebix |
1.1 |
|
| 786 |
|
|
// Extension opcode |
| 787 |
|
|
case 0xf2: |
| 788 |
|
|
#if PC_IS_POINTER |
| 789 |
|
|
if ((pc-pc_base) < 0xe000) { |
| 790 |
|
|
illegal_op(0xf2, pc-pc_base-1); |
| 791 |
|
|
#else |
| 792 |
|
|
if (pc < 0xe000) { |
| 793 |
|
|
illegal_op(0xf2, pc-1); |
| 794 |
|
|
#endif |
| 795 |
|
|
break; |
| 796 |
|
|
} |
| 797 |
|
|
switch (read_byte_imm()) { |
| 798 |
|
|
case 0x00: |
| 799 |
|
|
ram[0x90] |= TheIEC->Out(ram[0x95], ram[0xa3] & 0x80); |
| 800 |
|
|
c_flag = false; |
| 801 |
|
|
jump(0xedac); |
| 802 |
|
|
break; |
| 803 |
|
|
case 0x01: |
| 804 |
|
|
ram[0x90] |= TheIEC->OutATN(ram[0x95]); |
| 805 |
|
|
c_flag = false; |
| 806 |
|
|
jump(0xedac); |
| 807 |
|
|
break; |
| 808 |
|
|
case 0x02: |
| 809 |
|
|
ram[0x90] |= TheIEC->OutSec(ram[0x95]); |
| 810 |
|
|
c_flag = false; |
| 811 |
|
|
jump(0xedac); |
| 812 |
|
|
break; |
| 813 |
|
|
case 0x03: |
| 814 |
cebix |
1.5 |
ram[0x90] |= TheIEC->In(a); |
| 815 |
cebix |
1.1 |
set_nz(a); |
| 816 |
|
|
c_flag = false; |
| 817 |
|
|
jump(0xedac); |
| 818 |
|
|
break; |
| 819 |
|
|
case 0x04: |
| 820 |
|
|
TheIEC->SetATN(); |
| 821 |
|
|
jump(0xedfb); |
| 822 |
|
|
break; |
| 823 |
|
|
case 0x05: |
| 824 |
|
|
TheIEC->RelATN(); |
| 825 |
|
|
jump(0xedac); |
| 826 |
|
|
break; |
| 827 |
|
|
case 0x06: |
| 828 |
|
|
TheIEC->Turnaround(); |
| 829 |
|
|
jump(0xedac); |
| 830 |
|
|
break; |
| 831 |
|
|
case 0x07: |
| 832 |
|
|
TheIEC->Release(); |
| 833 |
|
|
jump(0xedac); |
| 834 |
|
|
break; |
| 835 |
|
|
default: |
| 836 |
|
|
#if PC_IS_POINTER |
| 837 |
|
|
illegal_op(0xf2, pc-pc_base-1); |
| 838 |
|
|
#else |
| 839 |
|
|
illegal_op(0xf2, pc-1); |
| 840 |
|
|
#endif |
| 841 |
|
|
break; |
| 842 |
|
|
} |
| 843 |
|
|
break; |
| 844 |
|
|
} |
| 845 |
|
|
} |
| 846 |
|
|
return last_cycles; |
| 847 |
|
|
} |
