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<TITLE>Frodo, Frodo PC and Frodo SC</TITLE> |
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<H1>Frodo, Frodo PC and Frodo SC</H1> |
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Frodo comes in three 'flavours' that allow you to decide between speed |
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and accuracy of the emulation. |
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<H2>The line-based emulation 'Frodo'</H2> |
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<B>Frodo</B> is a line-based emulation, i.e. the activities that happen |
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in parallel during one video line in the real C64 are emulated one after |
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the other for the different chips. This offers a reasonable degree of |
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precision of the emulation at a decent speed. There are some things that |
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cannot be emulated with this technique, but it works fine with about |
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80% of all C64 programs and it is also the fastest of the three Frodo |
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versions. |
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<H2>The improved line-based emulation 'Frodo PC'</H2> |
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<B>Frodo PC</B> is also a line-based emulation but it has some improvements |
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over the standard Frodo: |
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<UL> |
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<LI>Code in chip registers can be executed |
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<LI>Correct calculation of 6510 instruction cycles |
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<LI>More precise CIA emulation |
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</UL> |
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Programs that don't work on the standard Frodo or that produce an |
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"Illegal jump to I/O space" message might work with Frodo PC. However, |
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Frodo PC is a bit slower. |
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<HR> |
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<H2>The single-cycle emulation 'Frodo SC'</H2> |
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<B>Frodo SC</B> is a special version of Frodo that doesn't work with a |
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line-based emulation but instead with a cycle-based one. That means that |
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the emulator switches between 6510 and VIC in every emulated ø2 clock |
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phase. By doing this, Frodo SC achieves an extreme precision (nearly all |
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$d011 and $d016 effects can be emulated), but at the expense of speed. |
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In the settings options, Frodo SC differs from Frodo/Frodo PC in only |
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a few points: |
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<UL> |
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<LI>The "Cycles per line" settings are not available as the timing of Frodo SC is hardcoded |
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<LI>The "Clear CIA IRC on write" hack is not necessary |
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</UL> |
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Apart from that, Frodo SC is operated in the same way as Frodo and also |
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uses the same settings. Frodo SC has only a few incompatibilities to a |
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real C64: |
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<LI>On the left and right side of the screen, sprites are not clipped but blanked out |
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<LI>Sprite collisions are only detected within the visible screen area (excluding borders) |
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<LI>The sprite data fetch ignores the state of BA |
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<LI>On BA low and AEC high, the VIC always reads $f in D8-D11 |
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<LI>Color register modifications are visible 7 pixels too late |
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<LI>The TOD clock should not be stopped on a read access, but be latched |
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<LI>The SDR interrupt is faked |
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<LI>Some small incompatibilities with the CIA timers |
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<LI>The readable SID registers are not emulated correctly |
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</UL> |
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